AMS Circuit Design Engineer Experience : 2 to 8 Years. Location : Hyderabad. Notice Period : 30 to 60 days. B.Tech or M.Tech. in Electronics and Electrical Engineering from an institute of repute. 2 to 8 years of experience in Analog and SERDES IP Circuit Design. The candidate should have relevant experience in following Analog IPs like GPIO, RCOMP, ADC, DAC, LDO, PLL, Thermal Sensor, Voltage Monitor, Process Monitor and their blocks and SERDES IPs i.e. DLL, PLL, Clocking path Analysis, SERDES System Design and Analysis, Power Delivery Analysis, Transmitter (With or without equalization FFE), Receiver (with equalization – CTLE, DFE), Channel Analysis, LDO, RCOMP, Sensors – Process Monitor, Temp Sensor, Voltage Sensor, GPIOs, High Speed View / Test IOs, DFX, High Speed ADC etc. The candidate should have knowledge of one of the following SERDES protocols i.e. DDR IO, UCIe, PCIe, HBMIO, HDMI, MIPI – CDPHY, HDMI etc. The candidate should be well versed with the design tools like Cadence Virtuoso, Spectre / HSpice Simulators, High Speed Simulator APS/XA, Waveform viewer etc. Knowledge and expertise in .lib generation and other views generation will be preferred. Expertise in any scripting language (e.g. PERL, TCL, Python, SKILL) will be also be preferred. The candidate necessarily should have very good communication skills and should be a team player. The candidate should be having problem solving approach and should be able to report blocking issues during the project, as required. About Company ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future. Show more Show less

Location Chennai - Tamil Nadu, India Pacesetting. Passionate. Together. HELLA is a listed, internationally positioned automotive supplier operating under the umbrella brand FORVIA. Within this de facto group, HELLA stands for high-performance lighting technology and automotive electronics. At the same time, the Company covers a broad service and product portfolio for the spare parts and workshop business as well as for manufacturers of special-purpose vehicles with its Lifecycle Solutions business group. HELLA has around 36,000 employees at more than 125 locations worldwide and generated consolidated sales of € 6.3 billion in the fiscal year 2021/2022. YOUR TASKS Identify and implement automation opportunities to enhance CAE simulation efficiency and reduce manual effort. Develop and deploy custom tools and scripts to streamline workflows for FEA, CFD, and Moldflow simulations across various domains. Create and validate cross-platform automation scripts (TCL,TK, Python) for both Windows and Linux environments. Manage source code versioning and ensure collaborative development with proper traceability. Facilitate tool migration and assess compatibility during software upgrades, ensuring seamless transitions to updated versions of HyperWorks. Support simulation activities in areas such lighting systems. Train and support the global team in adopting the automated workflow, ensuring consistency and efficiency across international teams. Contribute to team growth by mentoring colleagues and promoting knowledge sharing in CAE automation practices. Your Qualifications Bachelor’s degree (BE/BTech) or higher in Mechanical Engineering or a related field 3 to 10 years of hands-on experience in CAE process automation Proficient in Python,TCL,TK, and Shell scripting for simulation workflow development Solid working knowledge of HyperMesh, HyperView, HyperGraph, Abaqus, and at least one fatigue analysis solver Basic understanding of mechanical engineering principles, including strength of materials, vibrations, design, and manufacturing processes Foundational knowledge of Finite Element Analysis (FEA) concepts and methodologies Skilled in using MS Office tools for documentation, reporting Excellent written and verbal communication skills in English Take the opportunity to reveal your potential within a global company that offers you the best possible conditions for progressing in your career. Please send us your application through our careers portal, citing reference number req15851. HELLA India Automotive Pvt Ltd. Gokulakrishnan Vijayakumar Show more Show less

Company Overview KLA is a global leader in diversified electronics for the semiconductor manufacturing ecosystem. Virtually every electronic device in the world is produced using our technologies. No laptop, smartphone, wearable device, voice-controlled gadget, flexible screen, VR device or smart car would have made it into your hands without us. KLA invents systems and solutions for the manufacturing of wafers and reticles, integrated circuits, packaging, printed circuit boards and flat panel displays. The innovative ideas and devices that are advancing humanity all begin with inspiration, research and development. KLA focuses more than average on innovation and we invest 15% of sales back into R&D. Our expert teams of physicists, engineers, data scientists and problem-solvers work together with the world’s leading technology providers to accelerate the delivery of tomorrow’s electronic devices. Life here is exciting and our teams thrive on tackling really hard problems. There is never a dull moment with us. Group/Division The Information Technology (IT) group at KLA is involved in every aspect of the global business. IT’s mission is to enable business growth and productivity by connecting people, process, and technology. It focuses not only on enhancing the technology that enables our business to thrive but also on how employees use and are empowered by technology. This integrated approach to customer service, creativity and technological excellence enables employee productivity, business analytics, and process excellence. Job Description/Preferred Qualifications 7-8 years of working experience in developing and configuring solutions on Enovia 3DExperience platform Working experience on CAD Integrations with Enovia PLM, major CAD / PDM systems like Creo/ PDMLink, SolidWorks/EPDM, Inventor Vault, Solid Edge, etc. Working experience on Enovia CAD integration technologies like PowerBy, XPDM architectures and related Working experience of 3DExperience Enovia data model (Classic and UPS) Working experience in UPS data model & 3D Visualization and related 3DExperience apps like Product Structure, 3D Visualization, 3D Issue & Markups, 3D Play, etc. Experience in CAD data migrations is a plus Working experience in Web-services based integration architecture Experience in MQL scripts and TCL programming, JPOs, 3D Experience web and widget development Familiarity with databases such as Oracle and proficiency in SQL Strong written and oral communication skills and solution presentation capabilities Good Problem-solving attitude with analytical skills Minimum Qualifications Doctorate (Academic) Degree and 0 years related work experience; Master's Level Degree and related work experience of 3 years; Bachelor's Level Degree and related work experience of 5 years We offer a competitive, family friendly total rewards package. We design our programs to reflect our commitment to an inclusive environment, while ensuring we provide benefits that meet the diverse needs of our employees. KLA is proud to be an equal opportunity employer Be aware of potentially fraudulent job postings or suspicious recruiting activity by persons that are currently posing as KLA employees. KLA never asks for any financial compensation to be considered for an interview, to become an employee, or for equipment. Further, KLA does not work with any recruiters or third parties who charge such fees either directly or on behalf of KLA. Please ensure that you have searched KLA’s Careers website for legitimate job postings. KLA follows a recruiting process that involves multiple interviews in person or on video conferencing with our hiring managers. If you are concerned that a communication, an interview, an offer of employment, or that an employee is not legitimate, please send an email to talent.acquisition@kla.com to confirm the person you are communicating with is an employee. We take your privacy very seriously and confidentially handle your information. Show more Show less

Location: Bangalore, India In fast changing markets, customers worldwide rely on Thales. Thales is a business where brilliant people from all over the world come together to share ideas and inspire each other. In aerospace, transportation, defence, security and space, our architects design innovative solutions that make our tomorrow's possible. Thales is expanding its presence in India through the development a Group Engineering Competence Centre (ECC), reinforcing its position as a leader in all its markets. Launching in early 2019 in Bengaluru, the ECC will expand Thales’ footprint in its core business areas and cement its long-standing relationship with India. This ECC, the first of its kind in India, will focus on hardware, software and systems engineering capabilities for both the civil and defence sectors. India, and in particular Bengaluru, was chosen as the location for the new ECC due to the existing ecosystem – its proximity to the market, competence in research and development and abundance of skilled engineers. Both the needs of the local market and export markets will be catered for, meaning those who join Thales will have the opportunity of working on diverse projects with a high level of complexity, innovating in all the different markets we are present in. We’re inventing the future, right here, right now. By combining the curiosity to explore, the intelligence to question and the vision to create, together we’re transforming the world around us. FPGA Verification Thales India Engineering Competency Center (ECC) in Bangalore is seeking a FPGA professional to be part of Hardware engineering team. In this role, you will be responsible for Hardware subsystems architectural design, trade-off analysis, feasibility studies, Proposal preparation, detailed design and IVVQ for various Thales products (Defense and aerospace applications) including Obsolescence redesign. Qualifications: B. Tech in Electronics, Instrumentation engineering or equivalent with 3-15 years of relevant experience. Higher qualifications of Post-graduation is desirable. Avionics and Defense systems design is desirable. Responsibilities: Experience in Virtual Verification developing Test bench, Models, Checkers and Monitors using VHDL Preferable candidates with DO254 based VV execution Development of Virtual Verification Procedures and Virtual Verification Report Good hands on Python/Perl/TCL Collaborative work applying quality standards and internal processes Preparation of the associated project documentation and reviews Skills & experience: Must have strong experience in complete FPGA development life cycle (Technical feasibility, requirements, preliminary and detailed design, VV) Experience in Virtual Verification – VHDL Strong hands on Digital Design Good hands on Python/Perl/TCL Collaborative work applying quality standards and internal processes Preparation of the associated project documentation and reviews Must have experience to ensure the reporting progress of the project along with KPI Must have experience to manage risks and opportunities Must be rigorous, organized, autonomous and proactive, and motivated by a position within a multidisciplinary team. Must have demonstrated leadership skills on complex topics. At Thales we provide CAREERS and not only jobs. With Thales employing 80,000 employees in 68 countries our mobility policy enables thousands of employees each year to develop their careers at home and abroad, in their existing areas of expertise or by branching out into new fields. Together we believe that embracing flexibility is a smarter way of working. Great journeys start here, apply now! Show more Show less

Role Description Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time On time quality delivery approved by the project lead/manager Measures Of Outcomes Quality –verified using relevant metrics by Lead/Manager Timely delivery - verified using relevant metrics by Lead/Manager Reduction in cycle time and cost using innovative approaches Number of trainings attended Number of new projects handled Outputs Expected Quality of the deliverables: Ensure clean delivery of the design and module in-terms of ease in integration at the top level Meet functional spec / design guidelines 100% of the time without any deviation or limitation Documentation of the tasks and work performed Timely Delivery Meeting project timelines as requested by the program manager Support the team lead in intermediate tasks delivery Team Work Participation in team work; supporting team members/lead at the time of need Able to perform additional tasks in-case any team member(s) is not available Innovation & Creativity Automate repeated tasks to save design cycle time as a necessary approach Participation in technical discussion training forum Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one) EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Strong in Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills Good analytical reasoning and problem-solving skills with attention to details Able to deliver the tasks on-time per quality guidelines and GANTT in every instance. Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present to a level needed to execute the project Knowledge Examples Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.b. Strong understanding of the design flow and methodologies used in designing Understanding of the technical specs and assigned tasks: Understand the assigned tasks and have strong knowledge to execute the project tasks assigned by the client / manager as per shown skill Additional Comments Experience- 4+yrs Analog Layout Candidate should work independently on block level and chip level Analog layout design, coordinating with the circuit designer & the project lead. Candidate should have minimum 3+ years of hands-on experience in Analog layout. Custom layout experience in DAC, ADC, Band gap, Regulators, LDOs etc. Knowledge of finfet or technology exposure to 28nm or below is an added advantage. Full Understanding of IC fabrication and reliability issues. Full familiarity with Cadence-Virtuoso, PVS, ASSURA and Calibre tools. Outstanding written and verbal communication skills. Skills Analog Layout,Finfet,Cadence Virtuoso Show more Show less

Expert in implementing Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. In your new role you will: Responsible for SoC DFT Architecture definition/implementation/verification/silicon debug of SoC/Full Chip. Need to implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures. Responsible for ATPG, DRC analysis, Test coverage debug, Memory BIST implementation and verification. Owner ship of JTAG/BSCAN/iJTAG, P1500 implementation and verification, Stuck-at/TDF/Bridging/Cell-aware/iddq fault models. Good debug skills in ZERO delay and SDF based scan/MBIST/JTAG simulations. Hands on experience in analysis and debug of above-mentioned test domains. Hands of experience in post silicon debug of scan/MBIST patterns/yield fall out You are best equipped for this task if you have: ASIC flow understanding. Experienced in LEC, CLP, power analysis flow is preferred The ability to work as an individual and as part of a team to deliver complex SoCs starting from the creation of the DFT spec, implementation, verification, and Post silicon debug. In addition, be self-motivated with the initiative to seek constant improvements in the DFT design methodologies. The candidate must also possess strong initiative, analytical/problem solving skills, team working skills, ability to multitask and be able to work within a diverse team environment. Scripting skills such as PERL/TCL/Python are preferred Degree & Discipline: BE/B.Tech Electrical/Electronic or ME/M Tech in VLSI design. Experience in Industry: 12+ years of in DFT implementation, verification and post silicon debug areas. #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Job Title: Principal Verification Engineer Primary Location: Bengaluru, India Role Summary We are part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design. MME's Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards. Job Responsibility Responsible for the pre-silicon verification of IP modules or, IP subsystems Responsible for defining and writing IP verification plans based on requirements documents (industry standards, product requirements, IP architecture and IP implementation specifications) Interface to HW, FW, and SW design teams, as well as to architecture and system engineering teams, to understand functionality and application of the IP or subsystem. Responsible for executing verification plan according to the product specification and verification requirements defined by product architects. Responsible for architecting, developing, debugging and running UVM based verification environment for RTL simulation. Define and develop test cases in an appropriate verification framework. Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage. Job Qualification Degree in Electrical Engineering or Computer Science, with 10+ years of experience on IP/Sub-System Verification Proven experience in testbench design and development using UVM methodology for IP/Subsystem and SOC. Advanced knowledge of Verilog, System Verilog, C/C++, Shell. High proficiency in Metric Driven Verification concepts, functional and code coverage. High proficiency in directed and constrained random methodologies. Good knowledge of formal verification methodologies and assertions. Experience with debugging of designs pre- and post-silicon, in simulation and on the bench. Excellent written and verbal communication skill. Good knowledge in scripting like Perl, TCL or Python is a plus More information about NXP in India... Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we transform how the world uses information to enrich life for all. The pace is fast, collaboration occurs on a regular basis, and innovation is expected. As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and solve complex problems. This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge. You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the cross functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of cutting-edge NAND and System Micron products. The candidate's responsibility is to design, develop and debug the VHDL or Verilog based application and have good knowledge of FPGA platform development lifecycle. Key Responsibilities Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug. Develop efficient RTL design using Verilog or VHDL for FPGA implementation, ensuring optimal resource utilization. Drive complete FPGA design flow including synthesis, place and route, timing analysis and verification. Implement FPGA designs on hardware platforms using tools like Xilinx Vivado and optimize for performance, area and power and to create test bench and verification scripts. Debug and validate FPGA designs in hardware using tools such as oscilloscopes, logic analyzers, and signal tap. Optimize designs for speed, power, and resource usage based on the specific FPGA platform used. Collaborate with cross-functional teams, including Test Engineering & System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components. Provide engineering test solutions (HW & SW) for Product Development for NAND/System characterization and Silicon debug capabilities Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up Routinely communicate overall project status to leadership and cross functional product team Provide guidance through debug and resolution of product related issues Qualifications Successful candidates for this exciting opportunity will have: 9+ years of experience in RTL design, synthesis, timing closure, and verification methodologies. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and Storage System behavior, architecture and design Working experience on NAND and non-volatile System products Experience with non-volatile memory, logic analyzers, oscilloscopes, and/or Automated Test Equipment (ATE) is preferred Experience working on firmware development using C/C++ and good understanding of scripting languages including TCL, Perl/Python. Familiar working on Unix/Linux terminal. Hands-on experience with hardware bring-up and debugging and Understanding of hardware schematic and layout. Excellent data analysis, problem solving, and decision-making skills Ability to work independently in a very fast paced environment and adapt to change Drive to determine root-cause and provide corrective action for product issues Self-motivated and enthusiastic in a challenging, dynamic environment Demonstrated ability to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron Education Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering Course work in VLSI, semiconductor process is desirable, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

Job Details The Candidate will be involved in all aspects of DFT with prime focus on selected Deliverables. He/She will get exposure to SoC level DFT practices and Post-Silicon Debugs. The Team is responsible for delivering Ultra Low Power MCUs that will cater to today's IOT & Edge Processing Needs with applications varying from industrial to consumer wearable devices. Requirements BTech/ MTech with minimum 2years of Relevant Experience. Strong DFT Concepts with HandsON experience on DFT Tools & Methodologies. Experience on ATPG, Scan Insertion, DFT-DRCs, GLS, is preferred. Perl/TCL Scripting. Strong Analytical & Problem Solving Skills MBIST/LBIST is a plus More information about NXP in India... Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER The Role The position will involve working with a very experienced CPU physical design team. The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors in a fast-paced environment with cutting-edge technology. The Person Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities. Key Responsibilities Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure. Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA. Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR tools - Synopsys fusion compiler, Cadence, PrimeTime, StarRC, Calibre, Apache Redhawk Preferred Experience 12+ years of professional experience in physical design, preferably with high-performance designs. Must have closed high-performance IPs- CPU/GPU/DPU/memory controller, etc. Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation Versatility with scripts to automate design flow - Perl/Tcl/Python Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams Experience in advanced sub 7nm nodes Excellent physical design and timing background. A good understanding of computer architecture is preferred. Strong analytical/problem-solving skills and pronounced attention to detail. Academic Credentials Qualification: Bachelors or Masters in Electronics/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a motivated and skilled engineer with 3-7 years of experience in emulation solutions development. You bring a strong foundation in programming concepts using C/C++ and an understanding of digital design. Your expertise includes HDL languages such as System Verilog and Verilog, and you are familiar with protocols like AXI, AMBA, JTAG, AVB, CAN, and TSN. You thrive in collaborative environments and have excellent communication skills. Your educational background includes a B.E, B.Tech, or M.Tech in Electronic & Communication or Computer Science Engineering. You are passionate about developing cutting-edge emulation solutions for semiconductor customers and are eager to engage in both software development and synthesizable RTL development. What You’ll Be Doing: Developing emulation solutions for industry-standard protocols such as AXI, AMBA, JTAG, AVB, CAN, and TSN. Engaging in software development using C/C++ and synthesizable RTL development using Verilog. Verifying emulation solutions to ensure they meet the highest standards of quality and performance. Interacting with customers during the deployment and debugging phases to provide technical support and ensure successful implementation. Collaborating with cross-functional teams to integrate emulation solutions with other Synopsys products and technologies. Continuously improving and optimizing emulation solutions to meet evolving industry needs and standards. The Impact You Will Have: Enhancing the efficiency and performance of semiconductor design processes through advanced emulation solutions. Contributing to the development of high-performance silicon chips and software content that drive technological innovation. Supporting semiconductor customers in overcoming design and verification challenges, leading to successful product launches. Improving the reliability and functionality of emulation solutions, thereby increasing customer satisfaction and trust in Synopsys products. Driving continuous improvement and innovation within the emulation solutions domain. Facilitating seamless integration of emulation solutions with other Synopsys technologies, enhancing overall product offerings. What You’ll Need: Strong programming skills in C/C++ and understanding of OOPS concepts. Good understanding of digital design concepts. Knowledge of HDL languages such as System Verilog and Verilog. Experience with scripting languages like Perl or TCL is a plus. Understanding of ARM architecture is an added advantage. Knowledge of UVM and functional verification will be a plus. Who You Are: A team player with excellent communication skills. Detail-oriented and capable of working independently. Adaptable and eager to learn new technologies and methodologies. Proactive in identifying and solving problems. Passionate about delivering high-quality solutions. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing state-of-the-art emulation solutions for semiconductor customers. The team collaborates closely with other engineering groups within Synopsys to ensure seamless integration and optimal performance of our products. We value creativity, continuous learning, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We're looking for an Experienced RTL Design Engineer to join our Automotive Digital Interface Controller IP team. The Automotive Digital Design Engineer is expected to : Be responsible for specification development, architecture design and RTL development of Automotive specific features / enhancements. Proactively develop safety mechanisms that can be embedded within our IP and reused easily Work closely with the verification team and review verification plan mapping with the specification. Work with product teams to evaluate customer requirements related to quality, functional safety, and automotive reliability. Work closely with the Functional Safety and internal development teams on projects and task planning, progress tracking and reporting. Key Qualifications Must have BSEE in EE with 5+ years of relevant experience or MSEE with 4+ years of relevant experience. Must have proven experience working on Automotive SoC’s / Digital IP’s. Must have proven experience working of one or more of protocols at the IP level: DDR / PCIe / UCIe. Hands on experience with architecting / micro-architecture / detailed design from functional specifications. Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools. Lint, CDC, synthesis flow and static timing flows, formal checking, etc experience. Working knowledge / experience TCL, Perl, Python is added advantage. Has a solid desire to learn and explore new technologies. Performs in project leadership role & guides more junior peers with aspects of their job. Frequently networks with senior internal and external personnel in own area of expertise. Proficient in English. Formal training in ISO 26262 is preferred. Experience in qualifying systems with embedded hardware to various ISO 26262 ASIL levels up to ASIL D Experience with various ISO 26262 work products such as DFMEA; FMEDA; DFA Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

Alternate Job Titles: Sr. Application Engineer Senior Technical Support Engineer Senior Customer Success Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled professional with a passion for technology and customer success. You have a solid background in Physical Implementation RTL-GDS and are experienced in debugging and resolving Synth & PnR implementation challenges. You thrive on solving critical design challenges and are dedicated to enhancing QOR metrics to achieve best-in-class PPA and TAT targets. Your excellent communication skills enable you to effectively interface with customers and business unit personnel. You are self-motivated, detail-oriented, and committed to continuous learning and improvement. What You’ll Be Doing: Working on the latest Synopsys implementation technologies (Machine Learning, Physical Synthesis, Multi Source CTS) to solve complex PPA challenges faced by Synopsys customers. Developing and debugging RTL-GDS implementation methodologies and flows. Providing technical solutions by identifying design and/or EDA tool issues and offering appropriate resolutions for customers. Translating findings into requirements for R&D to improve tool behaviors with enhancements as adaptive long-term solutions. Deploying new technologies on the latest EDA versions and enabling customers to migrate to newer versions to achieve the best PPA. Proactively identifying customers' pain points and developing innovative solutions to address them. Collaborating closely with Synopsys R&D and product development teams to develop future technologies. Acting as a customer advocate while communicating with in-house R&D and serving as a product brand ambassador when engaging with customers. The Impact You Will Have: Driving customer satisfaction and success through exceptional technical support and solutions. Enhancing product quality by providing valuable feedback to the R&D team. Contributing to the continuous improvement of Synopsys tools and methodologies. Supporting the migration of customers to newer EDA versions, achieving optimal PPA. Strengthening relationships with customers and understanding their technical needs. Helping to displace competing implementation solutions through effective benchmarks. What You’ll Need: At least 2+ years of experience in Physical Implementation RTL-GDS. Experience in debugging and resolving Synth & PnR implementation challenges. Good exposure to methodology changes to achieve targeted PPA metrics for complex designs. Proficiency in Synopsys implementation tools is an advantage. Proficiency in scripting (Tcl, Unix, Perl). Excellent communication skills, including the ability to interface with customers and business unit personnel. Who You Are: Self-motivated and dedicated with excellent debugging skills. Customer-focused with a passion for delivering exceptional service. Analytical thinker with strong problem-solving abilities. Adaptable and able to work in a fast-paced, dynamic environment. Team player who collaborates effectively with colleagues and customers. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on providing world-class technical support to our customers. Our team is dedicated to ensuring the successful adoption and implementation of Synopsys products, driving customer satisfaction, and contributing to the continuous improvement of our solutions. We work closely with the R&D and product development teams to deliver comprehensive support and technical expertise. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Chennai Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Chennai Work Locations: T. Nagar Nungambakkam Vadapalani Velachery Thuraipakkam Marina Mall (Egattur) Shift Timing: 11:00 AM 8:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Support kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend shifts Work experience with a leading restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Kolkata Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Kolkata Work Locations: Salt Lake (City Centre Mall) Park Street (Opposite The Park Hotel) New Town (Axis Mall) Howrah (Avani Riverside Mall) Gariahat (Near Mukti World Mall) Shift Timing: 12:00 PM 9:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Assist kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend opportunity Experience working with a reputed restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Mumbai Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Mumbai Work Locations: Andheri West (Infinity Mall) Lower Parel (High Street Phoenix Mall) Thane (Viviana Mall) Malad (Inorbit Mall) Vashi (Raghuleela Mall) Shift Timing: 12:00 PM 9:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Assist kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend work Work experience with a leading restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

Embedded Linux kernel device driver development Lead Hyderabad, India Engineering 63507 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SOFTWARE DEVELOPMENT ENG INEER THE ROLE: AMD is looking for an embedded software engineer who is passionate embedded systems related problem solving, developing and optimizing drivers and improving overall system performance. You will be a member of a core team of incredibly talented industry specialists and will work with interesting yet challenging embedded projects. THE PERSON: The ideal candidate should be passionate about embedded software engineering and possess leadership skills to drive complex issues to resolution. Able to communicate effectively and work optimally with different teams across AMD. Must have: Minimum 12 years of experience in the embedded domain. Strong C/C++ programming skills. Proficiency in Python programming with at least 3-4 years of hands-on experience. Good understanding of object-oriented concepts. Excellent problem-solving and debugging skills. Strong communication and teamwork abilities. Good to have: Hands-on experience working with heterogeneous systems SoC. Experience with TCL scripting. Background in the silicon domain and hardware-software integration. Experience with bare-metal, RTOS, Linux kernel, and device driver programming. Knowledge of ARM processors and their architecture. Familiarity with version control systems like Git. ACADEMIC CREDENTIALS: Bachelor’s or Master's degree in ECE, CSE, EEE or equivalent #LI-SR4 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Power Architecture - Team Lead (PTPX, Power Artist) Hyderabad, India Engineering 65111 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role: We are looking for a technical leader to join and lead the SOC Power Modeling team in the AMD Client Computing and Graphics group. This role involves collaboration with many engineering teams including SoC architecture definition, IP design, integration/physical design, verification, platform architecture, software, and firmware. Contributions have a direct impact on the power & performance of AMD’s Client products. The Person: The candidate should have strong SOC design process experience from front end to tapeout. The candidate will lead a team working closely with the SOC design teams on RTL and emulation-based power estimation, simulation and design flow extraction. The candidate must be organized, self-motivated and able to work effectively on teams large and small across multiple sites. He or she must be able to prioritize assignments and drive them to completion. Strong verbal and written communication skills are essential for driving technical discussions to successful and actionable outcomes. Key Responsibilities: Team leader for Hyderabad based power modeling group, work with management to define department objectives and growth plans. Make recommendations to improve processes or procedures as appropriate. Implement changes to engineering processes based on new technologies or industry standards. Work with department management on recruiting, hiring, training, and team evaluations. Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design at SoC level. Lead team with power estimates during the pre-silicon design process using Power Artist/PTPX emulation environments and ensure power objectives and goals are met. Work with RTL and physical design teams to scientifically assess and manage tradeoffs with impacts of power management options such as, but not limited to clock and power gating, device type mix and physical implementation options. Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone. Improve power design flows in areas of power modeling, clock power analysis, structural power validation, IP power intent. Work with design verification in validating low power design features at SoC and IP level. Preferred Experience Extensive experience with Synopsys EDA tools, particularly PtPx/Power Artist. Detailed understanding of hardware emulation process, stimulus and EDA flow data extraction. Ability to define data reporting and requirements needs using EDA flows, Tcl and Python based scripting. Ability to work independently and lead a world-wide team. Excellent communication skills, written and verbal skills Academic Credentials PhD or Master of Science degree in Electrical Engineering, Computer architecture, or Computer Science. 10+ years of experience. #LI-RR1 #LI-Hybrid AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum Qualifications: Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 3+ years Hardware Engineering experience or related work experience. 3+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

RTL Design Engineer Hyderabad, India Engineering 58632 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Sr SILICON DESIGN ENGINEER THE ROLE: As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Job deliverables: Setup ASIC QA flows for RTL design quality checks. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC boundaries, power domains. Running Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, CLP steps. Come up with clock constraints, false paths, multi-cycle paths, IO delays, exceptions and waivers. Checking the flow errors, design errors & violations and reviewing the reports. Debugging CDC, RDC issues and come up with the RTL fixes. Supporting DFX team for DFX controller integration, Scan insertion, MBIST insertion and DFT DRC & MBIST checks. Handling multiple PNR blocks, building wrappers and propagating constraints, waivers, etc. Flows or Design porting to different technology libraries. Generating RAMs based on targeted memory compilers and integrating with the RTL. Running functional verification simulations as needed. Job Requirements: B.E/M.E/M.Tech or B.S/M.S in EE/CE with 5+ years of relevant experience ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes Digital design and experience with RTL design in Verilog/SystemVerilog Modern SOC tools including Spyglass, Questa CDC, Cadence Conformal, VCS simulation Preferred experience in AXI4 or NOC protocols or DRAM memory interfaces. TCL, Perl, Python scripting PREFERRED EXPERIENCE: Project level experience with design concepts and RTL implementation for same Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics Good understanding of computer organization/architecture ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-RP1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's Good hands-on experience on Floorplanning, PNR and STA flows Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc Good understanding on signoff domains– LEC/CLP/PDN knowledge, etc Good knowledge on Unix/Linux – Perl/TCL fundamentals/scripting Principal Duties and responsibilities: Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes. Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc) Quick learner with good analytical and problem solving skills Qualifications: 8+ years Hardware Engineering experience or related work experience. 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

MTS Software Development Eng. Hyderabad, India Engineering 58385 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS Product Engineer The Product Engineer position is in the Customer Enablement and Success group, located in Hyderabad, Telangana, India, for an experienced application engineer to focus on FPGA & ACAP design methodologies, compilation flows, design closure ease-of-use, tools specification, validation, documentation and key customers support. As a member of a highly seasoned Product Development Engineering team, the successful candidate will work closely with several R&D teams, internal application design teams and tier-1 customers to improve the user experience and productivity and enable the next generation of high performance computing designs across the UltraScale and Versal ACAP device families. Daily activities will include the following duties: Own a Vivado product area and become the future team champion to work on high impact projects and with key customers. Drive critical customer escalations to closure and contribute to new technologies rollout. Contribute to triaging reported issues in several Vivado product areas, such as design entry, NoC and IP design flows, compilation, and help engineering address them effectively. Actively explore innovative methodologies and their impact on flow and design practices for the new 7nm Versal ACAP family. Work closely with AMD Business Units (Data Center, Wired, Wireless, Emulation & Prototyping, Test Equipment) to improve their designs, products and customer experience. Develop and deliver training materials on new features and methodologies. Stay current with and propose the internal use of industry approaches, algorithms, and practices Education and Experience Requirements MS or equivalent work experience in Electrical Engineering or similar technology area, with minimum 8 years of relevant experience. Customer Awareness: Has excellent working knowledge of RTL-based design flows and expectations. Product Knowledge: Has good working knowledge of the entire FPGA or ASIC design process and tool flow, with intermediate-to-advanced understanding in timing analysis and closure. Scripting experience (Tcl, Perl, Python) is desired. Design Enablement: Has good understanding of design methodologies for system design, AXI protocol, network-on-chip, design closure. Problem Solving: Ability to handle and solve complex system level issues. Technical Communication: Can simplify and communicate even the most complex subjects, making options, tradeoffs, and impact clear. Can report out to management in a concise and actionable manner. Teamwork : Able to work with several teams across sites and domains with a positive attitude under variable workloads. #LI-MK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

MTS Synthesis Engineer Hyderabad, India Engineering 56350 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER THE ROLE: As part of AIG silicon team, you will have opportunity to work with some of the most talented and passionate engineers to create designs that push the performance, efficiency and scalability. We offer a fun, creative and flexible work environment with a shared vision to build products changing the world. THE PERSON: As a Synthesis design engineer, you will work with architects/designers for IP development KEY RESPONSIBILITIES: Design synthesis: Performing logical and physical synthesis of blocks in IP Design analysis: Analyzing and verifying that the design meets requirements for functionality, performance, and area Design constraints: Defining synthesis design constraints and resolving STA issues Timing analysis: Analyzing timing arc and liberty quality, and providing suggestions for fixing timing violations Design quality checks: Completing all design quality checks and data quality checks (CDC/RDC/LINT/No clock flops etc) Collaboration: Working with RTL engineers to fix timing issues Tool evaluation: Driving new tool evaluation and methodology refinement ECO Implementation :Develop/enhance auto ECO generation scripts for timing closure and ECO implementation Power: Low power optimizations/UPF PREFERRED EXPERIENCE: Synthesis engineers should have prior experience with: Synopsys tools for ASIC synthesis and timing constraints Strong background in Timing analysis and CDC Experience in CDC/RDC/LINT closure Familiar with power intent definition, implementation (UPF) Knowledge of various implementation and architectural techniques for low power optimization. Verilog and System Verilog Perl/TCL/Makefile scripting Power Analysis using Power Artist and PTPX LEC, LP signoff tools VLSI front end design steps Good communication skills and ability to work with global teams ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering and 7+ years of work experience #LI-PK1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Additional Job Description Qualcomm Noida CPU team is hiring for developing high performance and power optimized custom CPU cores. Individuals to Handle hardening complex HMs from RTL to GDS [ Synthesis, PNR, Timing ]. We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Desired experience: 12+ years of experience in Physical design, STA. Solid understanding industry standard tools for physical implementation [ Genus, Innovus, FC, PT, Tempus, Voltas and redhawk]. Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. 5 to 10 years of experience in static timing analysis, constraints and other physical implementation aspects. Solid understanding industry standard tools PT, Tempus, GENUS, Innovus, ICC etc. Solid grip on STA fixing aspects to solve extreme critical timing bottleneck paths. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.