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ASIC/SOC Front End DV (Design Verification) Engineer Proxelera

3.0 - 10.0 years

0 Lacs

hyderabad, telangana

On-site

Role Overview: As an ASIC/SOC Front End DV (Design Verification) Engineer, you will play a crucial role in the development of TB architecture definition and TB infrastructure/test coding for PCIe/Networking/IP Sub-Systems. Your responsibilities will include understanding product specifications, developing verification plans, test plans, coverage plans, assertions, and more. You will be expected to collaborate with team members, work on verification methodologies, and contribute to process improvements. Key Responsibilities: - Develop TB architectures and verification environments based on SV/UVM methodology - Create verification plans, test plans, coverage metrics, and assertions - Implement...

Posted 2 months ago

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