490 Systemverilog Jobs - Page 19

Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets innovative technology! As part of the heart of silicon development at Cisco, you'll engage in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices. Cisco Silicon One is the only unified silicon architecture that empowers customers to deploy top-tier silicon across diverse applications, from top-of-rack switches to expansive data centres. Be a part of shaping Cisco's progressive solutions by designing and testing advanced ASICs that integrate networking, compute, and storage into a single system. With tightly integrated hardware and software solutions, you'll gain exposure to all aspects of our systems, using the latest technology. We're seeking a dedicated ASIC engineer with a proven track record in high-performance products, ready to make a significant impact in the industry. Join us and push the boundaries of what's possible! Your Impact Develop test plans, cover points, and qualification tests Perform end-to-end verification of design blocks and top-level Build and maintain block, cluster, and top-level DV environment infrastructure Construct testbenches components like scoreboard, agents, sequencers, and monitors Write tests, debug regressions, and drive to module verification closure Collaborate with designers and verification engineers for cross-block verification Upgrade configuration/reset sequences (APIs) Develop environment and tests for emulation Ensure complete verification coverage through code, functional coverage, and gate level simulations Support post-silicon bring-up and optimize integration and performance Minimum Qualifications Bachelor’s Degree in EE, CE, or other related fields with 6+ years or Master’s Degree with 4+ years of ASIC design or verification experience Experience in developing verification environment for complex blocks from design specifications document Proficient in verifying complex blocks and/or clusters for ASIC using UVM/System Verilog. Scripting experience with Perl, Python, TCL, shell scripts. Preferred Qualifications Experience in Data center/ Hyper scaler /AI Networking technologies Proven experience meeting and delivering project milestones and deadlines. Ability to communicate technical concepts to audiences spanning executives to junior engineers to customers. Demonstrated ability in troubleshooting and debugging. Experience with Emulation and Formal Verification tools is a plus. #WeAreCisco #WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best. We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do! Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us! Show more Show less

Staff PCIe / CXL / D2D based memory expander Verification Location: Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for Highly talented Verification Engineers for the following roles. PCIe/CXL based memory expander - Verification Engineer: looking for experienced and talented professional for CXL based memory expander. Minimum Qualifications: BE/BTech in Electrical/Computer engineering with 6-8+ years of experience or Should have hands on experience in System Verilog, UVM and Object-Oriented Programming Proven track record in USB / PCIe / CXL / D2D IP verification both on FPGA and ASIC, with ability to bring up testbenches from scratch to defining test plan and sign-off for tape out. Integration and verification of complex System IP features. Work closely with RTL designers and SOC team to scope out integration and verification requirements. Good understanding of any memory protocol like DDR, ONFI, NAND, Flash SPI/QSPI. Proficiency in bus protocols AXI/AHB Proficiency in scripting languages like Perl, Python etc. Strong communication, collaboration, and interpersonal skills Strong analytical and problem-solving skills Preferred Qualifications: Experience in verification of PCIe/CXL based sub-system/SoC/IP. Knowledge of SoC with processor boot-flow. Knowledge of FPGA setup and running FPGA simulations. Experience in GLS is added advantage. Verification expertise in Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL protocols. Experience with compliance at the physical and transaction layers for PCIe/CXL endpoints or root ports. Analysing performance metrics of CXL / PCIe / D2D System-level verification experience for PCIe / CXL / D2D Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. We believe in excellence and we strive to achieve that through employee motivation, training and teamwork within a collaborative and innovative culture. Want to be apart of a fast paced team responsible for delivering high-speed ASICs for large, complex systems? Our team at Silicon Systems Technology Group (SST) is seeking ASIC Verification Engineers to verify next generation of ASICs for new core routers, switches, and firewalls. We are looking to hire sharp individuals with excellent communication, problem solving, and leadership skills. Opportunity Snapshot: At Juniper, you will have a significant opportunity to interact with system design teams across geographies. We are a team built on a foundation of open communications, empowerment, innovation, teamwork and customer success with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards. ASIC DV Engineer Experience: 5+ years Responsibilities: You will be exposed to the latest verification methodologies like UVM and enable complex feature verification suites. Architect and Develop block level verification environments for sub-system and fullchip using System Verilog and UVM methodology. (30%) Define, architect, code, and deliver verification suites/tests for ASICs that enable faster, denser, feature-rich systems. Use various front-end simulator tools (VCS/NC) to perform this activity. (25%) Verify large ASIC blocks independently and rapidly and sign off them for tape-out with analysis of code coverage, functional coverage and Gate level simulation. (30%) Work closely with logic designers to resolve bugs and software developers to assist in software and bring-up development. (10%) Develop Perl, Python and/or shell scripts to improve current verification infrastructure/methodology (5%) Required Skills: ASIC Verification using SystemVerilog Experience in constrained-random verification is a strong plus Experience with verification methodology like OVM/VMM/UVM Perl/Tcl scripting is strongly preferred Experience verifying networking protocols such as Ethernet is desirable Strong problem solving and ASIC debugging skills MSEE or BSEE is required with at least 5 years of ASIC Verification Experience. ASIC Design Engineer IND, KA, Bangalore Experience: 5+ years As part of our fast-paced chip design group, you will become an expert in building high-speed ASICs, from specifications to final netlist. You can pick and choose where you want to work on – design/ verification or timing closure/PD. As you are getting started in your career, we will let you explore your passions here. Open communications, empowerment, innovation, teamwork and customer success are the foundations of team culture. Thus, you set your own limits for learning, achievements and rewards. Responsibilities: You will start with a functional specification of a module and come up with a detailed micro-architecture specification – do not worry, you will have guidance from our senior engineers on how to go about this if you have not done this before. RTL coding – we prefer you know System Verilog and have done several school/intern projects (coding to synthesis) using this language. Write functional coverage/SVA (we will teach you how to do this if you haven’t done this before) Timing closure – work with PD to identify timing paths and fix timing in RTL to meet the frequency target. Debug issues in your block found by verification team. Use state-of-the-art EDA tools for various design checks. Recommended Skills Bachelor’s degree in Electrical Engineering required, Master’s strongly desired. Strong analytical/ problem solving skills. Should have taken courses for credit in digital logic design. Strong coding skills in Verilog/System Verilog through courses and intern projects Knowledge of Computer Architecture/networking protocols/machine learning through graduate level courses is a plus. Excellent written and verbal communications skills is good to have. Knowledge of Perl/Python is a plus #JuniperASICEngineeringIndia About Juniper Networks Juniper Networks challenges the inherent complexity that comes with networking and security in the multicloud era. We do this with products, solutions and services that transform the way people connect, work and live. We simplify the process of transitioning to a secure and automated multicloud environment to enable secure, AI-driven networks that connect the world. Additional information can be found at Juniper Networks (www.juniper.net) or connect with Juniper on Twitter, LinkedIn and Facebook. WHERE WILL YOU DO YOUR BEST WORK? Wherever you are in the world, whether it's downtown Sunnyvale or London, Westford or Bengaluru, Juniper is a place that was founded on disruptive thinking - where colleague innovation is not only valued, but expected. We believe that the great task of delivering a new network for the next decade is delivered through the creativity and commitment of our people. The Juniper Way is the commitment to all our colleagues that the culture and company inspire their best work-their life's work. At Juniper we believe this is more than a job - it's an opportunity to help change the world. At Juniper Networks, we are committed to elevating talent by creating a trust-based environment where we can all thrive together. If you think you have what it takes, but do not necessarily check every single box, please consider applying. We’d love to speak with you. Additional Information for United States jobs: ELIGIBILITY TO WORK AND E-VERIFY In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire. Juniper Networks participates in the E-Verify program. E-Verify is an Internet-based system operated by the Department of Homeland Security (DHS) in partnership with the Social Security Administration (SSA) that allows participating employers to electronically verify the employment eligibility of new hires and the validity of their Social Security Numbers. Information for applicants about E-Verify / E-Verify Información en español: This Company Participates in E-Verify / Este Empleador Participa en E-Verify Immigrant and Employee Rights Section (IER) - The Right to Work / El Derecho a Trabajar E-Verify® is a registered trademark of the U.S. Department of Homeland Security. Juniper is an Equal Opportunity workplace. We do not discriminate in employment decisions on the basis of race, color, religion, gender (including pregnancy), national origin, political affiliation, sexual orientation, gender identity or expression, marital status, disability, genetic information, age, veteran status, or any other applicable legally protected characteristic. All employment decisions are made on the basis of individual qualifications, merit, and business need. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Software Engineer Location: Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities & Skills The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP, MIPI, NVMe an added advantage. Education And Experience B. Tech /BE/M.Tech / ME with 3 to 6 years of relevant experience. Behavioral Skills Required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more efficiently. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Veloce Hycon empowers System-on-Chip (SoC) developers to achieve first-pass silicon success, streamlining the development process. It offers an outstanding hybrid solution that seamlessly integrates virtual models and user Register Transfer Level (RTL) for comprehensive pre-silicon validation. Users can rapidly boot Linux and Android on the hybrid platform to run benchmarks and critical workloads well before silicon availability and gain valuable insights into software performance and functionality, allowing for early optimization and bug detection. Users can switch from virtual to pure RTL modes on the fly, focusing on specific system components that require more accurate hardware emulation for detailed calibration. Reference platforms are part of the product that let the user get started out of box. This role is based in Hyderabad. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. Responsibilities for this role include: Develop functionally accurate SystemC/TLM software models for CPUs (ARM and RISC-V architectures) and other Hardware devices that can be used to compose Virtual Platforms. Verify the models functionality versus behavior model and/or RTL using SystemC and/or UVM/SystemVerilog and apply unit testing/debug and implement the test plan. Build Virtual Platform for Hardware designs on the System Level. Load/Boot Linux/Mentor Embedded Linux (MEL)/ Android on the Virtual Platform. Simulate and Debug Customer’s Software on the Virtual Platform Write professional Functional Specs and Design Documents. We don’t need hard workers, just super minds! Bachelor, Master, or Ph.D. degree or equivalent experience in Computer or Electrical Engineering with minimum 2-8 years of experience and Very Good with honors degree. Strong experience in C/C++ Programming and in Embedded Linux Development. We need someone with the basic knowledge of digital circuits and digital design/systems and having good background in programming using SystemC is a plus. We are looking for someone who has good experience in using Linux/Unix OS and experience in scripting/scripting languages such as Make/Tcl/Perl. Position requires well developed written and oral communication skills. Also, being able to work with tight deadlines and meet schedules. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the every day and Accelerate transformation . Show more Show less

You will be responsible for developing a deeper understanding of standard bus protocols like (AHB/AHB5/AXI4/ACE/CHI-B, C, D, E etc.) and develop SW Softmodel / RTL IPs / accelerated VIPs using C/C++/ SystemVerilog/SystemC/ UVM, make them perfect for Simulation (Questa) and Emulation (Platform), helping customers to deploy and use them in their Verification Environment. Job Requirements: BE/ME/BTech/MTech in Elctronics/Electrical Engineering/Computer Engineering or related stream with 2+ years of relevant experience. Skills Strong knowledge Design & Verification methodologies of either of these (Times/Untimed SW Models), RTL IP, VIPs, UVM Env. Understanding of verification tools like Simulator, Synthesis etc. Hands on experience on C/C++, System Verilog, UVM, SystemC, RTL Understanding of some of the standard protocol interfaces like AMBA, Automotive, PCIe, USB etc. Excellent written and verbal interpersonal skills Self-motivated and great teammate Show more Show less

Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency powerconversion for applications using GaN devices. Job Description In your new role you will: Design analog and mixed-signal modules in CMOS and Smart PowerTechnologies, with a particular focus on achieving high-efficiency powerconversion for applications using GaN devices. Design and verify pre-silicon analog/mixed-signal integrated circuitblocks, including incorporating features for testing and qualityassurance, and providing support for top-level integration. Assist in defining the requirements for analog and mixed-signalblocks, aligning them with IP Module architecture, and ensuringcompliance with requirements through documentation. Estimate effort and planning design work packages to meet projectmilestones. Provide essential support to physical design engineers, post-siliconverification, production testing, and other critical activitiesextending beyond the design phase; Your Profile You are best equipped for this task if you have: A Master’s Degree in Electrical/Electronic Engineering, Physics orequivalent field of studies. Experience in analog and mixed-signal circuit design, particularly inCMOS and Smart Power Technologies. Good Analytical skills and very good understanding of Analog Design. Familiarity with high-efficiency power conversion, such as DC DCconverters, is highly desirable. Experience in pre-silicon verification and with SystemVerilog wouldbe a plus. Proficiency in computer-aided design tools and methodologies. Excellent problem-solving and communication skills. Ability to work effectively in a collaborative team environment. Detail-oriented with a commitment to quality and precision. Fluency in English Contact: Shavin.Shashidhar@infineon.com #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon. Show more Show less

Description : We are looking for a highly skilled and motivated engineers to join the team that is modelling ARM’s v9 architecture and the latest RISC-V cores from our customers in the RISC-V ecosystem. You will create C software models of leading-edge CPU technologies that will power future systems in markets such as data centers, mobile communications, and Internet of Things (IoT). You will be joining an experienced multinational development team located in UK, Europe, or USA. The team is responsible for building and supporting high speed simulation models of Arm and RISC-V processors and embedded systems. These models are for use in IP design, verification, and software development, and are also delivered to our OEM and Silicon Partners. The models are distributed with configuration and analysis tools, and can be integrated into standard SystemVerilog, C, C++, and SystemC environments. Job Purpose : As part of the modelling team, you will build highly efficient C models and platforms using the industry open standard OVP APIs, as well as working with other teams to design systems to allow our Imperas Fast Processor Models to be used within their workflows and platforms. Key objectives of this role include: To develop, test, and maintain high speed software models (ImperasFPMs) of advanced CPU and system level IP. To technically support other engineers. To be responsible for producing and executing model development plans for your area of responsibility, in conjunction with project management and engineering peers. To build Virtual Platforms that can be used for early software development. To support internal and external users of these CPU models. We offer an international work environment that is characterized by flexibility, an informal atmosphere, a fast pace and an opportunity to impact the way the industry develops new systems and embedded software. You will work with highly professional and motivated colleagues who value and support your contribution. Synopsys is a dynamic international workplace with opportunities for personal and professional growth. The position carries an attractive compensation and benefits package commensurate with a competitive global company. Technical attributes: Mandatory: Bachelors/Masters in ECE/CS with 5+ years of experience Excellent in C/C++ Knowledge of Processor architectures – Arm, RISC-V etc Knowledge of Hardware and Software Interfacing Excellent in problem solving and analytical skills. Excellent communication, team work and networking skills Preferred: Knowledge of SystemC, TLM and experience creating system level models Knowledge of Embedded Software Understanding of Peripheral model internals or Interconnects like AXI / AHB Experience with EDA Tools Show more Show less

Job Description: Seeking a highly motivated and innovative verification engineer with strong theoretical and practical background in high-speed data recovery circuits. Working as part of a highly experienced mixed-signal design team, the candidate will be involved in verifying current and next generation Backplane Ethernet, PCIe, SATA, and USB products. The position offers an excellent opportunity to work with an expert team of digital, analog and mixed signal engineers responsible for delivering high-end mixed-signal designs. Job Responsibilities: Modifying/using the existing UVM and VMM SystemVerilog testbenches to co-simulate mixed signal designs in both analog and digital coexist environment Analyzing/verifying the functionalities of high speed SERDES Defining and tracking verification testplans Debugging simulation failures in both analog and digital domains Creating top level analog testbenches for SERDES Job Requirements: BTech/MTech plus at least 7 years of digital design and verification experience in the industry. Candidates should have experience writing scripts in languages such as Perl, Python and Unix shell. The ideal candidate would be familiar with Verilog and SystemVerilog. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled R&D Staff Engineer passionate about pushing the boundaries of static low power verification products. With 5 to 8 years of experience in software engineering, you have honed your expertise in C/C++ and possess a robust understanding of data structures and algorithms. Your background in Electronic Design Automation (EDA) tools and methodologies, coupled with your knowledge of Verilog, SystemVerilog, and VHDL, positions you as a leader in your field. You are a proactive problem-solver with a keen eye for detail, and you thrive in collaborative environments where you can lead and inspire a team. Your self-motivation and discipline drive you to set and achieve personal goals consistently, and your commitment to quality ensures that your contributions make a significant impact. Based in Noida or Bangalore, you are ready to take on new challenges and help shape the future of technology. What You’ll Be Doing: Designing and developing state-of-the-art EDA tools with innovative algorithms. Collaborating with local and remote teams to ensure seamless integration and execution. Working directly with customers to understand requirements, provide online debugging, and track delivery and execution. Leading a small team of 2-3 members, guiding them through technical challenges and project milestones. Contributing to the continuous improvement of our static low power verification product. Exploring new architectures and leading the charge in developing cutting-edge solutions. The Impact You Will Have: Driving the development of advanced EDA tools, contributing to the efficiency and effectiveness of chip design. Enhancing the quality and reliability of our static low power verification product. Providing critical support to customers, ensuring their needs are met and fostering long-term relationships. Leading and mentoring junior engineers, fostering a culture of innovation and excellence within the team. Contributing to Synopsys' reputation as a leader in the semiconductor and EDA industries. Playing a pivotal role in the successful execution of projects, meeting deadlines, and exceeding expectations. What You’ll Need: Fluency in C/C++ with a strong background in data structures and algorithms. Experience with UPF and familiarity with Tcl and Python-based development on Unix (preferred). Knowledge of Verilog, SystemVerilog, and VHDL HDL (preferred). Experience with production code development on Unix/Linux platforms. Ability to develop new architectures and demonstrate strong leadership skills. Who You Are: You are a dynamic and innovative engineer with a passion for technology and a commitment to quality. You possess excellent problem-solving skills and the ability to think critically and creatively. As a self-motivated individual, you set personal goals and work diligently to achieve them. Your leadership skills enable you to guide and inspire your team, fostering a collaborative and productive work environment. You are detail-oriented, ensuring that your work meets the highest standards of quality and reliability. Your experience in EDA tools and methodologies, coupled with your knowledge of hardware description languages, positions you as a valuable asset to our team. The Team You’ll Be A Part Of: You will be part of the Static Verification team, a group of talented engineers dedicated to developing and enhancing our static low power verification products. This team collaborates closely with other departments, including design, development, and customer support, to ensure seamless integration and execution. Together, you will work on cutting-edge projects that push the boundaries of technology and contribute to the success of Synopsys and its customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. Questa Simulation Product It is a core R&D team working on multiple verticals of Simulation. A very energetic and enthusiastic team of motivated individuals. This role is based in Noida. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! Key Responsibilities: We are looking for a highly motivated software engineer to work in the QuestaSim R&D team of the Siemens EDA * Development responsibilities will include core algorithmic advances and software design/architecture. * You will collaborate with a senior group of software engineers contributing to final production level quality of new components and algorithms and to build new engines and support existent code. * Self-motivation, self-discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Are you excited to know more about this Role ? Job Qualification: An ideal candidate should have skills below: * B.Tech or M.Tech in Computer Science & Engineering (CSE), Electrical Engineering (EE), or Electronics & Communication Engineering (ECE) from a reputable engineering institution having 5-8 years of experience. * Strong knowledge of C/C++, algorithms, and data structures. * Familiarity with compiler concepts and optimizations. * Experience with UNIX and/or LINUX platforms is essential. * Excellent problem-solving and analytical skills. * Self-motivated with the ability to work independently and guide others towards successful project completion. We are not looking for superheroes, just super minds! Having the below skills will be an added advantage: * Strong understanding of basic digital electronics concepts. * Familiarity with machine learning (ML) and artificial intelligence (AI) algorithms, particularly their implementation in data-driven tasks. * Proficiency in hardware description languages such as Verilog, SystemVerilog, and VHDL. * Experience with parallel algorithms and job distribution techniques. * Exposure to simulation or formal verification methodologies is a plus. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Transform the everyday #LI-EDA #LI-Hybrid #DVT Show more Show less

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science or equivalent practical experience. 5 years of experience in coding, developing test methodologies, writing test plans, creating test cases, and debugging. Experience verifying digital logic at RTL level either using SystemVerilog, C, C++. Preferred qualifications: Master's degree in Electrical Engineering or Computer Science or equivalent practical experience. Experience with Interconnect Protocols such as AHB, AXI, ACE, CHI, CCIX, CXL. Experience with performance verification of SOC, Pre-Silicon analysis and post-Silicon correlation. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Plan and execute the verification of the next generation configurable Infrastructure Intellectual Property (IPs), interconnects and memory subsystems. Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM). Develop cross language tools and verification methodologies. Identify and write all types of coverage measures for stimulus and corner-cases. Debug tests with design engineers to deliver functionally correct blocks and subsystems. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form . Show more Show less

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Job Description SoC Verification Engineer The SoC Development team at Sandisk is seeking highly motivated SoC Verification Engineers to join our talented team, working on cutting-edge controller development for high-performance SoCs used in industry-leading products. Role & Responsibilities As a SoC Verification Engineer , you will play a key role in ensuring the quality and reliability of our SoC designs. You will be responsible for: Developing verification test plans based on design specifications. Creating and executing test cases across multiple platforms, including RTL simulation, FPGA prototyping, and Palladium emulation. Performing Gate-Level Simulations (GLS) and debugging complex SoC designs. Collaborating with design, architecture, and firmware teams to define verification strategies and drive coverage-driven verification methodologies. Contributing to the development of advanced verification environments, including UVM, PSS testbenches. Analyzing functional coverage and simulation results to enhance verification efficiency and effectiveness. Why Join Us? At Sandisk , you’ll be part of a team of highly skilled engineers solving complex verification challenges and driving innovations in data storage solutions . Your work will directly impact the performance and reliability of high-volume new age data solutions, consumer and enterprise products. Together, we’ll push the boundaries of technology, unlock the full potential of data, and shape the future of storage solutions. Qualifications Required : BE or MS degree in Electrical/Electronics Engineering or Computer Engineering, with 4-8 years of experience Deep understanding of C, SystemVerilog UVM and coverage driven verification methodology History of building and improving UVM based verification methodology Knowledge on Chiplet Protocols - UCIe Skills Develop and execute verification plans Proficiency with C, Verilog, System Verilog and UVM based verification Experience in implementing advanced test benches, verification models, scoreboards/checkers. Knowledge in bus protocols - AXI, AHB, APB and bus interconnects Experience with test plan creation and test-bench development Experience with test development and test coverage assessment Excellent debugging and problem-solving skill Knowledge in various interfaces – PCIe, DP, UART, I2C, I2S, SPI, USB, SD Experience working on processor-based SoC -- ARC/ARM/RISC.. Create and modify SoC-level, and sub-system level test benches. Experience in setting up and running gate-level simulations Gate Level / Power-Aware simulations Great written and verbal communication skills Good Programming/Scripting skills with languages such as Python, Perl, TCL, and BASH Interest in ASICs, SoCs, flash memory, semiconductor components Strong team player who can collaborate with colleagues Additional Information Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs.accommodations@sandisk.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm CDMA Technologies (QCT) is a global leader in Multimedia integrated circuits (ICs), software and systems for wireless consumer devices including Smartphones, Netbooks and E-readers. Our teams are developing advanced technologies to enhance mobile devices in areas including 2D and 3D graphics, audio/video, display and architecture. These Multimedia ASICS are co-designed with our Modems, Applications Processors, Analog Codecs and Power Management ICs to deliver highly-integrated, high-performance and low-cost chipsets to our customers and partners. You will be implementing the industry's leading edge graphics processor, specific areas include 2D and 3D graphics, streaming processor, high speed IO interface and bus protocols. In this position, the designer will be responsible for architecture and micro-architecture design of the ASIC, RTL design and synthesis, logic and timing verification. The successful candidate for this position will specify and design digital blocks in our Multimedia Graphics team that will be integrated into a broad range of devices. All Qualcomm employees are expected to actively support diversity on their teams, and in the Company. Minimum Qualifications Bachelor's degree in Science, Engineering, or related field Previous experience in designing GPU or CPU cores and ASICs for Multimedia and Graphics applications in deep sub-micron CMOS processes for volume production Experience with Verilog/VHDL design, Synopsys synthesis, static timing analysis, formal verification, low power design, test plan development, coverage-based design verification, and/or design-for-test (DFT) Experience with Computer Architecture, Computer Arithmetic, C/C++ programming languages is desired Exposure to DX9~12 level graphics HW development is big plus Good communication skill and desire to work as a team player Required: Bachelor's degree in Computer Science, Electrical Engineering, Information Systems, or related field. Preferred: Master's degree in Computer Science, Electrical Engineering, Information Systems, or related field. ASIC, hardware, design, GPU, OpenGL, DirectX, RTL, Verilog, SystemVerilog Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3071114 Show more Show less

Job Description: No. of Positions: 2 Location – Hyderabad (WFO) Experience – 5 to 7 Years & 7 to 10 Years Responsibilities : • Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. • Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. • Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. • Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. • Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Core Requirements : • Basic understanding of CMOS and gate level circuit designs • Familiarity with SPICE • Familiarity with Verilog simulations • Good communication skills and ability to work well in a team Preferred Qualities : • Analytical capability for complex gate level circuit designs • Experience in SystemVerilog, PLI coding • Experience in UVM Test Bench • Experience in DRAM, SRAM or other memory related fields • Experience in AMS verification and co-sim  Experience Level 5+ years Show more Show less

Bangalore,Karnataka,India Job ID 766876 About this Opportunity We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport – to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trends—we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, you'll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What you will do Take charge of delivering high-impact ASIC IP solutions, ensuring alignment with broader project goals and requirements. Creative Freedom: Engage in an environment that champions innovation and critical thinking. You'll have the autonomy to explore advanced verification technologies alongside skilled experts. Global Influence: Contribute to projects that transform industries, advance digital economies, and enhance global communication, bridging gaps between people, systems, and information worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you perform at your best without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. An international work environment with opportunities for professional growth and development. A collaborative and inclusive culture that values diversity and innovation. A competitive compensation and benefits package. You will bring Key Responsibilities: Lead a team of designer engineers, providing mentorship and guidance to ensure efficient and reusable design practices and IP. Collect and address, team status and metrics. Own and oversee the breakdown of requirements into actionable tasks for IPs and subsystems, ensuring alignment with project objectives. Review work done by the team, ensuring quality and adherence to design specifications. Take responsibility for deliverables, prioritizing work to ensuring successful completion in time. Continuously enhance and optimize design methodologies and processes, facilitating innovation and efficiency. Collaborate closely with IP System Architects and cross-functional teams to ensure requirements are effectively met. Work closely with the verification lead to support review and refinement of verification plans. Develop competence in the technical domain. Foster cross-team collaboration to ensure seamless project delivery and integration. Required Qualifications: Bachelor’s degree in electrical or computer engineering. 8+ years of industry experience in ASIC design. Proven track record leading IP development and of successful cross-team and cross-site collaboration. Proficiency in/with: Understanding of ASIC technology, design environments, and methodologies. SystemVerilog RTL static sign-off tools such as SpyGlass. Scripting languages like TCL, Python, or similar. SystemVerilog Assertions. Strong Experience with in low-power design, including specifying power intent using UPF or similar standards. Knowledge of Design for Test methodologies. Additional Requirements: Experience with Cadence and Synopsys front-end and middle-end design suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience designing one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Why join Ericsson? At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next. What happens once you apply?

Experience: 5 Years Location: Bangalore/Hyderabad Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics Roles and Responsibilities DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies. Protocol Compliance: Ensure the DDR design meets protocol specifications, including command, data, and clock synchronization, read/write cycles, burst transfers, refresh cycles, error handling, and power management. Verification Plan Creation: Develop detailed verification plans based on DDR specifications and requirements, ensuring full coverage of corner cases, timing, and protocol validation. Simulation & Debugging: Run simulations and debug issues using tools such as Questa, VCS, or ModelSim, applying advanced debugging techniques such as waveform analysis, assertion-based verification, and code coverage. Regression Testing: Set up and manage regression testing for DDR functionality to ensure continuous validation and early detection of design issues. Verification Coverage: Achieve high functional and protocol coverage, ensuring that critical aspects of DDR design, including timing constraints, corner cases, and failure scenarios, are thoroughly verified. Formal Verification: Implement formal verification techniques to validate key components of the DDR design, ensuring correctness in timing and data flow, and verifying the most critical operations. Show more Show less

Role: AMS Design Verification Engineer Job Openings: 4 Positions Senior AMS Verification Engineers (2 positions): 7–10+ years of experience Mid-Level AMS Verification Engineers (2 positions): 4–6+ years of experience Key Responsibilities: Perform AMS (Analog Mixed Signal) Design Verification Use Verilog-AMS , SystemVerilog , and C (for ARM-0 processor) Create and run test cases Debug and troubleshoot analog ICs Modify or build AMS test benches (mainly analog-focused) Identify, document, and fix bugs Write clear project documentation Preferred Experience: Familiarity with TI Design Verification Flow Experience with CF projects Technical Skills – Priority Order: Analog expertise in AMS – Very Strong Debugging analog issues – Very Strong Verilog-AMS – Very Strong SystemVerilog – Good C programming – Good ARM-0 architecture – Good Note: Most work will involve using or modifying existing AMS test cases, with occasional creation from scratch. Drop your resume at santosh.kotturti@fiorit.com Show more Show less

Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore A US based well-funded product-based startup looking for Highly talented Senior Physical Fri, Mar 28 at 9:39 AM Principal / Staff IP/RTL Design Engineer (AI Accelerator) – Multiple positions - Hyderabad Well-funded product startup is looking for RTL Design Engineers to contribute to the development of novel high performance AI accelerators from scratch. In this role you will collaborate with cross-functional teams, including architect, software, verification, physical design, systems engineers, to define and implement next generation AI architectures. We are seeking highly experienced individuals who have a passion for innovation and are excited about the opportunity to create world class products from India. The key responsibilities for this role include, but are not limited to: Key Responsibilities Design and implement high-performance TPUs/MPUs and other related AI blocks using RTL. Own IP/block-level RTL from spec to GDS, including design, synthesis, and timing closure. Optimize design for power, performance, and area (PPA). Interface with physical design and DFT (Design for Test) engineers for seamless integration. Drive design reviews, write design documentation, and support post silicon bring-up/debug. Minimum Qualifications B.S./M.S./Ph.D. in ECE/CS from top engineering college with 5-15 years of related experience. Previous experience in either high performance processor design or AI accelerator design is plus. Clear understanding of floating-point arithmetic, vector processing, SIMD, MIMD, VLIW, EPIC concepts. Strong grasp of digital design fundamentals, computer architecture, virtual memory and high-speed data-path design. Proficiency in Verilog/SystemVerilog and simulation tools. Experience with EDA tools (e.g., Synopsys, Cadence) for synthesis, lint, CDC, and timing analysis. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Experience: 14+ Years Education: BE / B. Tech / M. Tech or equivalent in Computer Science or Electronics Description Candidate will be part of word level Synthesis team (catering to multiple EDA products). Design, develop, troubleshoot the core algorithms. Will be working with local and global teams. Will be working on Synthesis QoR, Performance and logic interference problems It is a pure technical role. Will need to drive projects , solutions to complex problem with other team members Essential Skills: Ability to develop new software architecture and good leadership skills. Strong hands-on experience in C/C++ based software development. Strong background in Design Patterns, Data Structure, Algorithms, and programming concepts. Familiarity with multi-threaded and distributed code development. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Good knowledge of Verilog, SystemVerilog & VHDL HDL Well versed with Software Engineering and development processes Experience of production code development on Unix/Linux platforms. Exposure to developer tools such as gdb, Valgrind Exposure with source code control tool like Perforce. Good analysis and problem-solving skills. Desirable Skills: Work experience in Synthesis tools Work experience in EDA Experience in technically leading significant size projects Personal Attributes: Highly enthusiastic and energetic team player with the ability to go an extra mile. Good written and verbal communication skills. Strong desires to learn and explore new technologies. Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Title: Lead Product Validation Engineer Location: Noida Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. The Cadence Advantage The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success. Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests. You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. Job Responsibilities & Skills: (Design Verification Engineer) The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). Prior experience in simulation/emulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. Experience in process automation with scripting. Experience with SystemVerilog, C++, UVM. Experience with Functional Verification of complex digital systems, e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemVerilog. Experience designing and implementing complex functional verification environments is required. Knowledge of protocols like PCIe, USB3/4, DP an added advantage. Qualifications Minimal qualification requires B. Tech or M. Tech/B.E./M.E. with 3-6 years of experience in relevant experience. Behavioral Skills Required. Must possess strong written, verbal and presentation skills. Ability to establish a close working relationship with both customer peers and management. Explore what’s possible to get the job done, including creative use of unconventional solutions. Work effectively across functions and geographies. Push to raise the bar while always operating with integrity. We’re doing work that matters. Help us solve what others can’t. Show more Show less

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Join Qualcomm's design verification team in verifying the Digital Low Power IPs for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle (including Functional, Low Power Verification, Gate Simulation, Formal Verification) from system-level concept to tape out and post-silicon support. Responsibilities: Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team. Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Low power verification, Formal verification and Gate level simulation to ensure high design quality. Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure. Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful IP level verification, integration into subsystem and SoC, and post-silicon validation. Minimum Qualifications: Master's/Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field. 8+ years ASIC design verification, or related work experience. Knowledge of a HVL methodology like SystemVerilog/UVM. Experience working with various ASIC simulation/formal tools such as VCS, Xcellium/NCsim, Modelsim/Questa, VCFormal, Jaspergold, 0In and others. Preferred Qualifications: Experience with Low power design verification, Formal verification and Gate level simulation. Knowledge of standard protocols such as Power Management Flows, PCIe, USB, MIPI, LPDDR, etc. will be a value add Experience in scripting languages (Python, or Perl). Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075495 Show more Show less

Looking for Siemens EDA ambassadors: Lead Member Technical Staff The electronics industry is evolving at an ever-accelerating pace. At Siemens EDA, we are dedicated to empowering customers to bring life-changing innovations to market faster and achieve leadership in their industries. We achieve this by providing the most comprehensive portfolio of electronic design automation (EDA) software, hardware, and services worldwide . Key Responsibilities: In this role, you will be at the forefront of designing, developing, and implementing software solutions for both internal and external products, ensuring that we consistently exceed customer expectations and uphold the highest quality standards. You will be pivotal in ensuring the functional excellence of released products across multiple platforms, tackling complex challenges head-on. Moreover, youll be responsible for creating and implementing software designs that often span multiple product areas, collaborating seamlessly with multi-functional teams to drive efficiency, optimize performance, and elevate our solutions! Job Qualifications: We bring together a dynamic team of individuals with a B.E./B.Tech./M.Tech. in Computer Science, Electrical Engineering, Electronics & Communication, Instrumentation & Control, or related fields. Do you have 3-5 years of experience in software development, specifically specializing in FPGA synthesis solutions?W We possess a strong understanding of digital design fundamentals and are proficient in C/C++ and Object-Oriented Programming (OOP). Our team excels in algorithm analysis, development, and optimization of data structures, and we continuously strive for excellence through open and constructive feedback! Good to Have: Familiarity with synthesis, simulation, and verification methodologies is a definite plus. A basic understanding of at least one Hardware Description Language (HDL) such as Verilog, SystemVerilog, VHDL, or SystemC is highly advantageous.

Senior SoC Director / SoC Director Bangalore,Hyderabad,Delhi Some travel to Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production.this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 15-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

About the job ASIC/SoC/FPGA Design Verification (Bangalore, Chennai and Hyderabad) Design Verification with planning, architecture, development, maintenance, and execution on complex IPs and/or SOCs. Strong knowledge of digital design principles and computer architecture. Proficiency in verification languages like Verilog or SystemVerilog. Experience with UVM (Universal Verification Methodology).