2285 Synthesis Jobs - Page 48

Desired Profile : You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Academic Credentials : MS or BS in Computer Engineering/ Computer Science with 5+ years working experience in ASIC RTL design. Key Responsibilities : 1. Develop micro-architecture and design for high-speed IO controller blocks based on architectural requirement 2. Conduct design reviews of designs in technical presentations to peers and management. 3. Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. 4. Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. 5. Work with Design Verification team to ensure quality for architecture definition and design implementation. 6. Provide guidance and leadership to the team members. Preferred Experience : 1. Strong knowledge in computer architecture and interconnects. 2. Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus. 3. Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation. 4. Expert on Verilog RTL design and has experience of large digital ASIC project. 5. Familiar with front-end EDA tools and flows. 6. Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.) 7. Preferred candidates with valid work permit (Green Card / US Citizen / H1B)

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SILICON DESIGN ENGINEER 2 THE ROLE: Play a critical role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Interface with large, globally distributed design teams to support complex and collaborative development efforts. Drive automation of Functional ECO methodologies targeting advanced technology nodes. Own the development and support of next-generation synthesis flows, ensuring scalability and efficiency across projects. Collaborate closely with EDA vendors to identify innovative solutions, resolve tool/methodology issues, and enhance flow capabilities. Contribute to the evolution of AMD’s design infrastructure by improving automation, performance, and methodology robustness. THE PERSON: You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and timezones. You have an automation mindset with strong analytical and problem-solving skills, willingness to learn and ready to take on problems. KEY RESPONSIBILITIES: Responsible for developing and automating Functional ECO, Synthesize and PnR flows for various designs at advanced technology nodes. Script out utilities to automate different components of the implementation flow. Support design teams across global sites on various issues related to Front-End Synthesis flow targets. CAD flow and methodology development on advanced process nodes are preferred. PREFERRED EXPERIENCE: Hands on experience in Conformal ECO, Formal Eqv and Front-End Synthesis flows. Hands on experience in industry standard tools such as Conformal, DC, Fusion Compiler, FM,VCLP, ICC2 and Innovus . Hands on experience in any of PnR, STA, Formal Verification or RTL coding domains is a plus. CAD and automation mindset ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering with 3+Yrs of exp #LI-SR4 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Position Overview As a Senior Solution Architect, you will be a strategic leader, architecting and guiding the implementation of sophisticated technology solutions for both our innovative product development and critical client service engagements. Leveraging 12-17 years of deep experience, you will bridge business objectives with technological execution, ensuring robust, scalable, secure, and strategically aligned solutions our clients. This pivotal role demands a unique synthesis of profound technical expertise, sharp business acumen, and exceptional leadership to navigate the dual demands of product innovation and bespoke service delivery across diverse projects and technologies. You will define the technical vision and drive its uccessful realization. Key Responsibilities Your responsibilities will span strategic design, product and service lifecycle management, technical leadership, stakeholder engagement, and governance. Strategic Solution Design &Architecture  Translate complex business strategies, product requirements, and client needs into comprehensive architectural blueprints for both product offerings and customized service solutions. Lead architectural vision and strategy across internal product roadmaps and client projects, adapting fluidly to shifting contexts.  Ensure all solutions are inherently scalable, resilient, secure by design, and strategically aligned with our clients' enterprise architecture and business goals. This alignment is critical for long-term viability and maximizing technology investments.  Evaluate, select, and champion appropriate technologies, platforms, architectural patterns (e.g., microservices, serverless, EDA), and design principles tailored to each product feature or service engagement, profoundly influencing evolutionary capacity and deployment efficiency.  Develop, maintain, and enforce comprehensive architectural documentation (diagrams,standards, best practices) for clarity and consistency across product and service teams. Product & Service Lifecycle Management  Collaborate with product management to define and refine product architecture, influence roadmaps with technical insights, and ensure technical feasibility and architectural soundness of new features. Early involvement is crucial for preempting costly missteps.  Partner with service delivery and client engagement teams to design and customize solutions aligned with client expectations, contracts, and operations, requiring nuanced understanding of service design and adaptability.  Oversee architectural integrity during implementation, providing decisive technical leadership and mentorship to development and delivery teams across product and service projects.  Conduct rigorous architectural reviews and assessments, ensuring adherence to design principles, quality benchmarks, and non-functional requirements across all projects. Technical Leadership & Mentorship  Provide expert technical guidance, strategic advice, and dedicated mentorship to engineering teams and fellow architects, fostering continuous learning.  Champion architectural best practices, advocate for emerging technologies, and drive a culture of innovation and technical excellence.  Lead and oversee proof-of-concept (PoC) projects to evaluate new technologies and architectural approaches before wider adoption, de-risking innovation. Stakeholder Management & Communication  Serve as the primary technical liaison and trusted advisor, bridging communication between business leaders, product management, engineering, service delivery, and clients.  Clearly and persuasively articulate complex architectural concepts, strategic decisions, risks, and trade-offs to technical and non-technical audiences, including C-level executives.  Proactively manage stakeholder expectations, negotiate priorities, and resolve conflicts regarding architectural direction and technology choices. Governance & Continuous Improvement  Establish, implement, and manage robust architecture governance frameworks to ensure compliance with standards, best practices, and strategic objectives.  Conduct thorough feasibility studies, risk assessments, and cost-benefit analyses for proposed solutions and architectural changes.  Continuously evaluate and recommend strategic improvements to architectures, processes, and technology stacks to enhance efficiency, performance, scalability, and reduce TCO.  Stay abreast of the latest industry trends, emerging technologies, architectural paradigms, and best practices relevant to solution architecture, product development, and service delivery. Required Skills & Experience General Experience  Minimum 12-17 years in IT, with 8+ years in solution architecture, enterprise architecture, or senior technical leadership, significantly influencing large-scale technology outcomes.  Proven track record of successfully designing and delivering complex, large-scale technology solutions within both product development and client service delivery contexts. Technical Expertise  Cloud Platforms: Extensive hands-on experience architecting and deploying solutions on major public cloud platforms (AWS, Azure, GCP), including IaaS, PaaS, SaaS, cloud-native services, multi-cloud/hybrid-cloud strategies, cost optimization, and security best practices.  Modern Architectural Patterns: Expertise in designing and implementing solutions using microservices, serverless, EDA, API-driven design, and DDD.  DevOps & Automation: Strong understanding and experience with DevOps principles, CI/CD pipelines, IaC tools (e.g., Terraform), and containerization (Docker, Kubernetes).  Data & AI/ML: Solid experience with data architecture principles (big data, data lakes, data warehousing, real-time streaming) and familiarity with integrating AI/ML capabilities (LLMs, GPT, predictive analytics). A proven track record of leveraging AI-driven tools, such as GitHub Co-Pilot, OpenAI, and Gemini, in daily workflows to improve efficiency, refine project estimations, and drive substantial productivity gains.  Security Architecture: In-depth knowledge of security architecture principles, IAM solutions (e.g., SailPoint, Okta), threat modeling, data protection, and compliance (e.g., GDPR, HIPAA).  Integration Technologies: Proficiency in designing integration solutions using API-first design (REST, GraphQL), API management platforms, message queuing (e.g., Kafka), and EIP.  Software Development Background: Strong foundational understanding of software development principles and familiarity with common programming languages (e.g.,Java, Python, C#) and frameworks (e.g., Spring Boot, .NET Core).  Enterprise Systems: Experience with the architecture and integration of common enterprise systems (ERP, CRM, HRMS).  Interconnected Technical Skills: Ability to synthesize diverse domains (e.g., microservices on Kubernetes in AWS with CI/CD, real-time data for AI/ML, secured by IAM and APIs). Methodologies  Deep understanding and practical experience applying Agile methodologies (Scrum,Kanban) and principles, with Scaled Agile Framework (SAFe) experience highly desirable.  Familiarity with IT Service Management (ITSM) frameworks such as ITIL is advantageous.  Experience applying Agile and SAFe in a hybrid product development and client service delivery model. Business Acumen  Strong ability to understand business strategies, market dynamics, competitive landscapes, and client requirements, translating them into impactful technology solutions.  Proven experience in conducting feasibility studies, risk assessments, and TCO/ROI analyses.  Ability to think strategically and holistically, anticipate technology trends, and advise on long-term architectural roadmaps. Leadership & Influence  Proven ability to lead, mentor, coach, and inspire technical teams, fostering collaboration and innovation.  Demonstrated experience influencing senior management and C-level executives on strategic technology decisions.  Capacity to drive organizational change and champion new architectural paradigms.  Effective servant leadership style, providing vision and guardrails while empowering teams. Communication & Interpersonal Skills  Exceptional verbal, written, and presentation skills, articulating complex technical concepts to diverse audiences.  Excellent interpersonal skills, including negotiation, conflict resolution, and consensus building.  Proven stakeholder management capabilities, building trust and strong working relationships. Problem-Solving & Analytical Skills  Advanced analytical, critical thinking, and problem-solving abilities with a data-driven approach.  Proven capacity to analyze complex situations, identify root causes, and develop innovative solutions.  Keen attention to detail in architectural design, documentation, and review. Preferred Qualifications  Master's degree in Computer Science, IT, Software Engineering, or related field.  Relevant and current industry certifications (e.g., TOGAF, AWS/Azure/GCP Architect, SAFe for Architects, CISSP).  Demonstrable experience within relevant industry verticals.  Record of thought leadership (publications, presentations, open-source contributions). Job Type: Full-time Pay: ₹3,500,000.00 - ₹4,500,000.00 per year Schedule: Day shift Work Location: In person

We Are Hiring: Principal Engineers Chip Design (Back End / Front End / Analog IP/IC) Preferred Skills and Experience: Minimum 1+ years of experience in Project Management (Waterfall and Agile Hybrid methodology) Exposure to continuous improvement and cross-functional collaboration Educational Qualifications: Master's degree in VLSI Design from reputed institutes (IITs/NITs preferred) Bachelor's in Electronics and Communication or a related field 1. Job Title: Principal Engineer – Chip Design Back End Required Skills & Experience: Minimum 8+ years of strong experience in backend flows for MCU or low-power SoC designs Leadership experience with DFT, Physical Design, and Formal Verification teams Exposure to Frontend and Analog design processes Ability to collaborate effectively across functional teams Experience in product support during both pre- and post-production stages (including RMA support) 2. Job Title: Principal Engineer – Chip Design Front End Required Skills & Experience: Minimum 8+ years of experience in system architecture for ARM-based MCU product development Expertise in RTL design, RTL coding, and RTL integration Strong debugging and design capabilities Experience leading verification teams, including static and dynamic verification, test management (UPF, GLN, Test Modes) Familiarity with industry-standard EDA tools (e.g., Synopsys for LINT, CDC, SDC validation, and power analysis) Exposure to Backend and Analog design processes Cross-functional collaboration with PD, DFT, and STA teams for timing and power closure Experience in pre- and post-production product support and RMA handling 3. Job Title: Principal Engineer – Analog IP/IC Design Required Skills & Experience: Minimum 8+ years of experience in custom analog/mixed-signal IC design Proficiency in variation-aware design, verification planning, and analog layout parasitic extraction (LPE) Hands-on experience with analog/mixed-signal EDA tools (e.g., Cadence, Synopsys) Strong debugging and design validation skills Product support experience across development lifecycle, including RMA stage

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities: The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications: BE/BTech/ME/MTech- Computer Science or others Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We’re doing work that matters. Help us solve what others can’t.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Exp : 3 – 5 Yrs Position : Senior or Lead Expertise Power fundamentals Good knowledge of PTPX Good knowledge of CLP Knowledge of design verification, RTL coding, synthesis, and physical design Protocol knowledge of , DDR, CHI, Cache, computer organization, bus protocol, Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076036

Job Description: Experience: 2+ years of Experience Tapeout experience in block level PnR implementation including synthesis for medium to complex blocks o Good to have experience in TSMC/Intel lower technology node(16/14nm or below) o Experience in independently analyzing/resolving congestion, timing issues and basic understanding of clock tree build o Basic Timing understanding to independently analyze timing paths o Experience in ICC2/Innovus/DC tools, Fusion compiler being added advantage o Basic equivalency check understanding. Good to have Conformal LEC experience. o Should have understanding of basic shell scripting, tool based TCL scripting to automate redundant tasks

Role Summary: We are looking for a passionate and strategic Vice President – Marketing & BD (API) with deep expertise in the pharmaceutical industry, specifically APIs ( Active Pharmaceutical Ingredients ) . The ideal candidate will take complete ownership of the marketing and BD function , lead product selection and global launch strategies (including IP evaluation), ensure regulatory-aligned market penetration, and develop long-standing partnerships with high-profile clients across the globe. This is a leadership role requiring proactiveness, strong technical acumen, and a passion for driving growth. Key Responsibilities: Product Strategy & Selection Lead product identification and selection based on IP landscape, market trends, and regulatory timelines. Recommend high-potential molecules backed by strong commercial and scientific rationale. Align product strategy with company goals and global market requirements. Ownership & Leadership Take full ownership and accountability of the entire marketing and BD department. Build, mentor, and lead a high-performance marketing and BD team. Ensure strategic alignment between business goals and department execution. Market Development & Expansion Formulate and execute market entry and expansion strategies for APIs across regulated, semi-regulated, and emerging markets. Design penetration strategies tailored to various geographies, regulatory frameworks, and customer requirements. Continuously monitor and adapt to global regulatory updates and pharma market dynamics. Regulatory & IP Awareness Stay up to date with global regulatory changes (USFDA, EU, ANVISA, CDSCO, etc.) and guide the team accordingly. Coordinate closely with R&D, Regulatory, and Management to ensure filing readiness and competitive advantage. Client Relationship Management Develop and maintain strong relationships with key domestic and international customers. Represent the company at global conferences, trade shows (e.g., CPhI), and key business meetings. Be the face of the company for high-value negotiations and strategic discussions. Strategic Leadership Take the lead in building the company’s product pipeline and business development roadmap. Drive data-backed decision-making and lead all commercial and regulatory evaluations for new molecules. Ensure timely and profitable launch of selected APIs with full accountability for outcomes. Flexibility & Travel Willingness to travel extensively as per business needs, both domestically and internationally. Represent the company with professionalism, passion, and credibility at all levels. Desired Candidate Profile: Experience: 15–25 years in API marketing/business development in the pharmaceutical industry. Education: Graduate/Postgraduate in Pharmacy/Chemistry/Science. MBA will be an added advantage. Technical Know-how: Decent technical understanding of APIs, synthesis, regulatory filing processes. Skills: Strong commercial and strategic mindset Excellent client engagement and communication skills Up-to-date with pharma industry and regulatory changes High initiative, ownership mindset, and leadership skills Analytical thinking and product portfolio planning Team builder and cross-functional collaborator Why Join Us? Be part of a fast-growing and innovation-driven pharmaceutical company Take full ownership of a strategic leadership role with high visibility Collaborate with a passionate leadership team committed to growth and excellence Drive and deliver global impact in the pharma sector through meaningful contributions

Desired Profile : You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Academic Credentials : MS or BS in Computer Engineering/ Computer Science with 5+ years working experience in ASIC RTL design. Key Responsibilities : 1. Develop micro-architecture and design for high-speed IO controller blocks based on architectural requirement 2. Conduct design reviews of designs in technical presentations to peers and management. 3. Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. 4. Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. 5. Work with Design Verification team to ensure quality for architecture definition and design implementation. 6. Provide guidance and leadership to the team members. Preferred Experience : 1. Strong knowledge in computer architecture and interconnects. 2. Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus. 3. Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation. 4. Expert on Verilog RTL design and has experience of large digital ASIC project. 5. Familiar with front-end EDA tools and flows. 6. Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.) 7. Preferred candidates with valid work permit (Green Card / US Citizen / H1B)

Desired Profile : You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. Academic Credentials : MS or BS in Computer Engineering/ Computer Science with 5+ years working experience in ASIC RTL design. Key Responsibilities : 1. Develop micro-architecture and design for high-speed IO controller blocks based on architectural requirement 2. Conduct design reviews of designs in technical presentations to peers and management. 3. Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configuration. 4. Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure. 5. Work with Design Verification team to ensure quality for architecture definition and design implementation. 6. Provide guidance and leadership to the team members. Preferred Experience : 1. Strong knowledge in computer architecture and interconnects. 2. Strong experience in high speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus. 3. Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation. 4. Expert on Verilog RTL design and has experience of large digital ASIC project. 5. Familiar with front-end EDA tools and flows. 6. Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.) 7. Preferred candidates with valid work permit (Green Card / US Citizen / H1B)

Role & responsibilities 1. Good knowledge of synthetic organic chemistry. 2. Performing literature searches for the molecules that reaction is being carried out and understanding of the chemistries Strong skills in designing, optimizing, and scaling up synthetic chemical processes. 3. Plan and conduct experiments for chemical synthesis, ensuring the process can be reproduced and scaled up efficiently. 4. Design scalable synthetic processes that avoid patent infringement, especially for API (Active Pharmaceutical Ingredients) development. 5. Improve processes to make them industrially feasible, reduce costs, and enhance efficiency for existing products. 6. Validate synthetic processes at both laboratory and production plant scales. 7. Plant support for trial & validation batches. And troubleshooting of plant concerns. 8. Literature survey through various scientific databases. 9. Interpretation of NMR (Nuclear Magnetic Resonance), IR (Infrared Spectroscopy), MS (Mass Spectrometry), XRPD(X-Ray Powder Diffraction)and chromatography data 10. Knowledge of scale-up processes, and familiarity with Good Manufacturing Practices (GMP) and ICH-guideline. 11. Hands-on experience with bench-scale and pilot-scale synthesis is essential. Skilled in preparing detailed reports, presentations and technical documents like SOPs, process development reports, costing sheets, and technology transfer documents. Preferred candidate profile M.Sc/ M. Pharm/ Ph.D in Pharmacy Interested Candidates can share their resumes on shikha.mishra@walterbushnell.com

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Responsibilities The role’s day to day responsibilities cover: R&D support of application and product engineers for customer problems and requests. This consists of problem analysis, debugging and fixing, or the development of new features and enhancements to improve synthesis results with respect to timing, area and power. This job will suit applicants looking to continue their software engineering career in an intellectually stimulating and challenging problem domain. There is a significant research element to the work that Cadence does that is truly innovative; we don’t know what the answers are when we start out! Mentoring and support will be provided to the successful candidate to both enable contribution to the large EDA problem domain and to develop their programming skills into professional software engineering skills. Job Qualifications BE/BTech/ME/MTech- Computer Science or others Required Skills Develop reliable, scalable, and high-performance Modus DFT software that is easy to use. Develop software tools in C/C++ to support DFT and ATPG. Research and develop software solutions to allow greater efficiency in architecture, hardware, and software teams. Development environment is C++ on Unix in multi-threaded environment with expertise in C++, data-structure and algorithms. Strong knowledge of Tcl is preferred Experience in language compiler Prior experience with large software development projects is highly recommended. We’re doing work that matters. Help us solve what others can’t.

University: Istituto Italiano di Tecnologia (IIT) and Politecnico di Milano Country: Italy Deadline: 2025-09-10 Fields: Physics, Materials Science, Electrical Engineering, Nanotechnology, Optical Engineering The Istituto Italiano di Tecnologia (IIT) and Politecnico di Milano invite applications for Postdoctoral and PhD positions in the field of Nano-Optics. These positions are part of an internationally recognized research group led by Professor Antonio Ambrosio, focusing on advanced topics such as structured light, 2D materials, metasurfaces, and light–matter interactions at the nanoscale. Available Positions Postdoctoral Position – Research focus: Nano-Optics Innovation through Metasurfaces and Light Structuring – Responsibilities: Design and fabrication of metasurfaces, investigation of ultrafast optical control, and study of polaritonic responses in van der Waals materials – Location: IIT – CNST, Milan – Application deadline: 2025-09-10 – Application link: https://lnkd.in/dqQhSGxC PhD Position #1 – Research focus: Tailoring Light–Matter Interactions via Structured Light – Responsibilities: Study of complex optical beams and their interaction with anisotropic and 2D materials, unveiling novel photonic phenomena – Required skills: Optical setup design, metasurface fabrication, FDTD simulations – Location: Politecnico di Milano – PhD in Physics – Application link: https://lnkd.in/dA–_WZJ PhD Position #2 – Research focus: Light–Matter Interaction at the Nanoscale in 2D Materials – Responsibilities: Engineering and imaging of polaritons in van der Waals materials using advanced nano-imaging and nano-spectroscopy techniques – Required skills: 2D materials synthesis, nano-optics, numerical modeling – Location: Politecnico di Milano – PhD in Physics – Application link: https://lnkd.in/dA–_WZJ Requirements – A strong academic background in physics, materials science, electrical engineering, nanotechnology, or a related field – Relevant laboratory and/or computational skills as described per position – Motivation and ability to work in an interdisciplinary, international environment Additional Information – International applicants are encouraged to apply – Support is available for relocation and research stays abroad – These positions were advertised by Professor Antonio Ambrosio on LinkedIn For further details and to submit your application, please refer to the respective links above. Get the latest openings in your field and preferred country—straight to your email inbox. Sign up now for 14 days free: https://phdfinder.com/register

Job Description: We are seeking a skilled and motivated DFT Engineer with at least 2 to 10 years of industry experience in Design for Test in the VLSI domain. As part of our SoC Design team, you will play a key role in implementing and validating DFT architecture to ensure high test coverage, low DPPM, and efficient silicon debug capabilities. Key Responsibilities: Develop and implement DFT architecture for complex ASICs and SoCs. Integrate and verify DFT features such as: Scan insertion and ATPG Memory BIST (MBIST) Logic BIST (LBIST) JTAG/IEEE 1149.1 (Boundary Scan) Test compression techniques (e.g., Tessent, Synopsys DFTMAX) Work closely with RTL, synthesis, and backend teams for DFT implementation and sign-off. Run and debug simulations for scan and BIST logic. Work with Automatic Test Equipment (ATE) teams to bring up and validate silicon. Support post-silicon debug and yield improvement efforts. Collaborate with cross-functional teams including verification, physical design, and validation. Required Skills: 2+ years of hands-on experience in DFT implementation and test methodology. Strong knowledge of scan insertion, ATPG, and fault grading. Experience with DFT tools such as: Synopsys (DFTMAX, TetraMAX) Mentor Tessent Cadence Modus Proficiency in Verilog/VHDL, TCL, and shell scripting. Understanding of digital design and SoC architecture. Familiarity with STA and timing constraints related to DFT.

- Are you a creative wordsmith with a passion for crafting engaging, informative, and long-form contentOur website team is seeking a talented Content Writer with 2+ years of experience to join our dynamic and growing organization. In this role, you will be responsible for producing high-quality articles, blog posts, and web content that captivate our audience, drive organic traffic, and elevate our online presence. Key Responsibilities : - Conduct in-depth research on industry trends, topics, and keywords to generate compelling long-form content. - Working with the creative team and clients, developing creative briefs, and guiding creative direction to meet objectives for all advertising and public-facing communications. - Collaborate with the team to develop content strategies, identify opportunities for improvement, and meet performance goals. - Stay current with content marketing best practices and emerging trends to continuously enhance the quality and relevance of our content. - Edit, proofread, and improve all the content-related work. - Create content marketing campaigns to drive leads and subscribers. Use SEO best practices to generate traffic to the site. Analyze content marketing metrics and make changes as needed. Qualifications : - 2+ Years of Proven Experience - Proven experience as a Content Writer with a strong portfolio of long-form content. - Proficiency in Content writing best practices and keyword research tools. - Excellent research and data synthesis skills. - Exceptional writing, editing, and proofreading abilities. - Ability to meet deadlines and work independently, while also thriving in a collaborative team environment. - Strong organizational skills and attention to detail. - Requesting you all to please attach your portfolios/Worksamples to the resume while applying, Profiles without portfolios will not be reviewed.

About Us As a Fortune 50 company with more than 400,000 team members worldwide, Target is an iconic brand and one of America's leading retailers. Joining Target means promoting a culture of mutual care and respect and striving to make the most meaningful and positive impact. Becoming a Target team member means joining a community that values different voices and lifts each other up. Here, we believe your unique perspective is important, and you'll build relationships by being authentic and respectful. Overview Of The Role As a member of the Enterprise Insights team at Target in India, you will expand efforts to help shape the ideal guest (consumer) experience and drive business and communication strategies and activations. This role supports the Category Insights team, which focuses on understanding consumer behaviors, attitudes, needs, and motivations across Target’s core businesses. You will play a key role in bridging the gap between business and guests through research by collaborating with multiple stakeholders including merchandisers, marketers, category managers, and creative teams. You will be responsible for designing and executing guest or consumer research to support key initiatives. You will be the primary contact for internal partners and will identify the appropriate research method, data source and vendor/supplier to execute work. Target leverages both qualitative and quantitative techniques and various secondary and proprietary sources of data to conduct research studies. As an advocate for the guest, you’ll be expected to frame findings into compelling insights and stories to establish guest understanding and empathy on the team and drive effective changes. Your work will have to include actionable recommendations for teams to then run with and achieve desired business goals for the organization. As a Sr. Marketing Researcher of Marketing & Brand Insights, you will report to the Sr. Manager, Research & Insights. Responsibilities Identify best method or mix of methods for the research plan, timeline and resourcing. Work closely with cross-functional teams to identify and develop research plan based on analysis of knowledge gaps, project goals and risks. Conduct consumer research and report findings. Perform thorough qualitative/quantitative analysis to create meaningful insights and actionable recommendations. Work on an iterative approach through close alignment with business teams to influence impact of the project. Skills Ability to operate using a range of quantitative survey methods and techniques, qualitative methods/techniques, ethnographic and anthropological research, statistical testing within quantitative methods, sampling, and data analysis and synthesis across methods Solve business problems with a consumer- centered approach. Strong grasp of quantitative data analysis and statistics from a business perspective, including generating and distilling reports from syndicated and secondary sources Conducting field research (both quantitative and qualitative), including preparing survey design/ discussion guides etc. Strong collaboration to effectively influence a diverse set of stakeholders. Communicate complex concepts clearly and persuasively across different audiences and varying levels of the organization. Manage ambiguity, work autonomously, meet deadlines and multi-task in an agile environment. Preferred Background Four-year degree or equivalent experience Retail/E-Commerce Experience Minimum of 5 years of Consumer Insights experience Significant experience with different methods of quantitative, qualitative, syndicated and first-party insight tools Experience analyzing syndicated and secondary data sources, as well as macro trend analysis Useful Links- Life at Target- https://india.target.com/ Benefits- https://india.target.com/life-at-target/workplace/benefits Culture- https://india.target.com/life-at-target/belonging

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 The Role Play a critical role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Interface with large, globally distributed design teams to support complex and collaborative development efforts. Drive automation of Functional ECO methodologies targeting advanced technology nodes. Own the development and support of next-generation synthesis flows, ensuring scalability and efficiency across projects. Collaborate closely with EDA vendors to identify innovative solutions, resolve tool/methodology issues, and enhance flow capabilities. Contribute to the evolution of AMD’s design infrastructure by improving automation, performance, and methodology robustness. The Person You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and timezones. You have an automation mindset with strong analytical and problem-solving skills, willingness to learn and ready to take on problems. Key Responsibilities Responsible for developing and automating Functional ECO, Synthesize and PnR flows for various designs at advanced technology nodes. Script out utilities to automate different components of the implementation flow. Support design teams across global sites on various issues related to Front-End Synthesis flow targets. CAD flow and methodology development on advanced process nodes are preferred. Preferred Experience Hands on experience in Conformal ECO, Formal Eqv and Front-End Synthesis flows. Hands on experience in industry standard tools such as Conformal, DC, Fusion Compiler, FM,VCLP, ICC2 and Innovus . Hands on experience in any of PnR, STA, Formal Verification or RTL coding domains is a plus. CAD and automation mindset Academic Credentials Bachelors or Masters degree in computer engineering/Electrical Engineering with 3+Yrs of exp Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Work Schedule Standard (Mon-Fri) Environmental Conditions Office Job Summary: We're seeing rapid growth in Synthetic Biology and custom research solutions, especially in biotech, pharma, and academic research. Our revenue is $1M, with a 20% annual growth projection for the next few years. A dedicated Business Development Manager is crucial to maintain momentum, build new businesses, expand our presence, and manage customer relationships. Key Responsibilities: Sales & Business Growth: Develop and implement a strategic sales plan to drive growth for GeneArt Gene Synthesis solutions and custom research solutions in the South Asia region. Identify and develop new business opportunities with biotech, pharma, academic, and government research institutions. Achieve and exceed sales targets by actively managing the sales pipeline and customer relationships. Customer Engagement & Relationship Management: Establish and maintain positive relationships with key decision-makers, scientists, and procurement teams. Understand customer research needs and offer tailored synthetic biology solutions. Conduct technical discussions and presentations to showcase the value of GeneArt offerings. Market & Competitive Intelligence: Supervise market trends, competitor activities, and emerging applications in synthetic biology. Provide market insights and customer feedback to internal teams to refine product offerings and strategies. Collaboration & Cross-functional Support: Work closely with internal teams, including marketing, product management, and technical support, to drive customer success. Support marketing initiatives such as conferences, webinars, roadshows, and workshops. Proposal & Contract Management: Manage customer proposals, quotations, and contract negotiations. Improve customer happiness through smooth order processing and post-sales support. Reporting & CRM Management: Maintain accurate records of customer interactions, sales activities, and pipeline progress in CRM systems. Provide regular sales reports, forecasts, and insights to senior management. Qualifications & Experience: Education: MSc or PhD in Life Sciences, Biotechnology, Molecular Biology, Synthetic Biology, or a related field. Experience: 7+ years of experience in sales, business development, or technical support in synthetic biology, gene synthesis, or molecular biology products. Technical Knowledge: Strong understanding of gene synthesis, molecular cloning, CRISPR, protein expression, and related workflows. Skills: Excellent communication and negotiation skills. Ability to engage with both technical and commercial collaborators. Strong problem-solving skills and a proactive approach to business development. Preferred: Prior experience working with GeneArt solutions or other gene synthesis platforms is a plus. At Thermo Fisher Scientific, each one of our 125,000+ outstanding minds has an unusual story to tell. Join us and contribute to our outstanding mission—enabling our customers to make the world healthier, cleaner, and safer. Apply today http://jobs.thermofisher.com Thermo Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.

Roles and Responsibilities Conduct process research and development activities to improve existing processes or develop new ones. Develop and implement reaction conditions for organic synthesis reactions to achieve desired product yields and purities.

Responsibilities: * Conduct market research * Present findings at meetings * Collaborate with cross-functional teams * Develop new products through synthesis * Manage project timelines *Survey and identify persons of life time achievement

Job Title: Head of Gen-AI Strategy (Media & Content Tech) Engagement Type: Full-Time Employment or Freelance Consultancy Location: Mumbai, Hybrid (or Remote + Frequent Visits) Company Overview: We are a leading entertainment content aggregation and publishing company, specializing in acquiring, creating, localizing, and monetizing video content across YouTube, Facebook, OTT platforms, and television channels. With a focus on Hindi and vernacular content and plans to scale globally through dubbing and localization, we are looking to optimize and scale using cutting-edge Generative AI . Role Overview: As the Head of Gen-AI Strategy , you will lead the application of generative AI across our business functions — content creation, localization, voice dubbing, metadata optimization, monetization workflows, rights management, and performance analytics. You will also help build and manage a specialized Gen-AI team aligned with business goals, drive AI-powered automation, and improve both operational efficiency and audience growth. Key Requirements: Experience: 5–10 years of experience in AI/ML, with at least 2 years specifically in Generative AI applied to media, entertainment, or content-tech sectors. Proven track record of applying Gen-AI in practical content workflows — especially video/audio/NLP. Exposure to YouTube/Facebook content systems, OTT platforms, or broadcast media is a major plus. Skills: Deep understanding of Gen-AI tools (e.g. including but not limited to; OpenAI, Sora, ElevenLabs, Runway, Synthesia, Whisper, etc.). Strong knowledge of AI integration pipelines using Python, APIs, cloud deployment (AWS/GCP). Familiarity with video content localization, voice synthesis, and AI-driven content creation and dubbing pipelines. Strong project management and team leadership experience. Preferred Qualifications: Bachelor's or Master’s degree in Computer Science, AI/ML, or related field. Previous experience in building AI teams or AI consulting for content/media businesses. Understanding of Indian vernacular content ecosystem and/or international video licensing markets. Why Join Us? Be a key driver in transforming India’s content business using the next wave of tech innovation. Lead high-impact projects that scale regional entertainment to global platforms using AI. Join a fast-scaling company backed by content IP, digital monetization, and a pan-India network. Compensation: Competitive salary + performance bonuses Job Types: Full-time, Permanent Pay: ₹30,000.00 - ₹90,000.00 per month Work Location: In person

Division Department Sub Department 1 Job Purpose Develop, optimise and execute the process for APIs to ensure on time implementation within budget Key Accountabilities (1/6) Develop API process in lab by literature survey, API intermediate characterization to ensure the quality and on time implementation Carry out literature survey and route selection for assigned project Prepare and execute development strategy for the assigned project Maintain record book of experiments carried out in lab, results received from the ADL Optimize process parameters to achieve process robustness for ensuring successful completion of lab trial and lab confirmatory batches with optimised costs Support creation of new IP assets for the company by performing experiments related to innovations like new process and polymorphs Maintain and calibrate the instruments in lab as per calibration schedule Follow individual safety procedures while working in lab by following GLP Follow the green chemistry approach while conducting experiments Key Accountabilities (2/6) Prepare development report and MPG on the basis of development work (carried out in lab) in order to successfully transfer the technology in plant Prepare tech Transfer documents like MPG, pre requisite, solubility chart, development report in coordination with ROC based on process developed in lab Coordinate with manufacturing units for carrying out pilot, pre-validation and validation batches under the supervision of group leader Key Accountabilities (3/6) Conduct QbD study, carryover study, impurity (genotoxic) identification / synthesis / characterization to achieve regulatory compliance and minimize the deficiencies in the DMF filling Perform QBD studies by conducting QBD experiments in coordination with QBD team Conduct impurity profile and carryover studies, impurity (genotoxic) identification / synthesis / characterization. Key Accountabilities (4/6) Support procurement in identifying and finalising the vendors for key raw materials by performing vendor qualification to achieve on time implementation Carry out experiments required for vendor qualification on receipt of material Compare and derive trend data for shortlisting vendors by comparing materials received Key Accountabilities (5/6) Ensure compliance of checklist for stage gate and milestone meetings to complete the project within time Carry out the listed activities in the stagegate and milestone checklists within time Key Accountabilities (6/6) Major Challenges Delay in getting analytical results from ADL causes delay in the overall development of project Re-conducting experiments in cases of incorrect quality raw material being received from procurement (due to rejections). Bring to the notice of group leader in such cases. Rework as more experiments need to be performed due to changing requirements for product development. Key Interactions (1/2) Manufacturing, SCM and ADL for receiving samples and delivering results (frequently) QA and QC for quality related procedures (frequently) IP for inputs regarding literature (need basis) ROC for documentation support (frequently) Safety for safety information (frequently) Engineering for machine maintenance (need basis) Key Interactions (2/2) Vendors and suppliers for raw materials and instruments, equipment (need based) Dimensions (1/2) Process development for 4 projects (last year) Execution of process on plant for 1 project (last year) Dimensions (2/2) Key Decisions (1/2) Use of Specific reagents, solvents, reaction condition Key Decisions (2/2) Route selection for development (to GL) Specific vendor for raw materials, instruments and equipment (to SCM) Education Qualification Educational Qualifications M. Sc. Organic Chemistry Relevant Work Experience 3-5 yrs in process R&D

Roles & Responsibilities Support projects that are undertaken by the Department of Textile Technology Support Lab classes Synthesis and characterization of new materials APPLY @ https://psgsonscharities.freshteam.com/jobs Education Qualification: Diploma in Textile Technology/Textile processing (OR) ITI in Fitter Experience: Fresher to 8 years About the Institution: PSG College of Technology is one of the foremost institutions founded by the PSG & Sons' Charities Trust (1926). The College was established in the year 1951. We offer a number of educational programs in Engineering, Technology, Management and Science at Bachelors, Masters and Ph.D. levels. PSG College of Technology has collaborative arrangements with industries, research organizations and universities abroad in various areas of research and training apart from offering joint academic programs. Job Type: Full-time Work Location: In person

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Digital design skills (RTL, Verilog, good digital design skills, Integration experience) QC and Implementation experience (Linting/Spyglass, CDC, Synthesis, Constraints development, LEC, GLS debug, PD interactions) Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Purpose of the Role 1. The Stamping Quality Leader (SQL) is responsible for Quality synthesis for all the Region Projects (up to 3 per SQL) 2. APQP Grid Managament: SQL - Check FIPA & Creat APQP Grid , follow the APQP Grid, communicate remiders and write weekly Synthesis Job Responsibilities 1. Monitoring APQP Grids to ensure completness, quality and deadlines -Prepare and upload documents to the PPAP items -Follow up with responsible Pilots for Make and Buy Parts on the filling/rating according to PDP -Sending weekly APQP Synthesis - Ensure completeness, quality, and adherence to deadlines. 2. Geometric Quality Dashboard -Create and manage the geometric quality dashboard. -Analyze geometry quality results of stamped and welded parts during industrialization. -Prepare and send a weekly geometry synthesis 3. Management center of SQL service - Participate in monthly steering committees. -Ensure adherence to quality standards and best practices. -- Availability to Work with International Time Zones Required Job Specification Qualification Diploma/Bachelor in Automotive, Mechanical Engineering, or Project Management Experience 8~10 years of relevant experience in stamping, welding, and quality assurance Competencies a) Technical skills Strong analytical and problem-solving mindset. Good understanding of stamping and welding processes. Project Management: Scope definition, planning, and KPI delivery. Tools & Software: BI4, DocInfo, PLM, AUROS, Teams, MS Office. VB Macro programming (advantageous) b) Soft Skills Strong communication skills. Leadership ability to drive cross-functional teams (CFTs). Willingness to travel and work in overseas Stellantis plants as per project requirements. Strong analytical and organizational skills. Dynamic, proactive, and technically sound. Team player with the ability to collaborate on resolving quality issues. English B2