Role & responsibilities Ability to conduct experiments and allied activities: Must have hands on experience in all aspects of project initiation Literature search Propose possible Route of Synthesis (RoS) Understand reaction mechanism Ability to conduct experiments and monitor reactions with the aid of minimum supervision Conducting lab validation experiments, compiling data & preparation of batch/development report Adherence to online documentation, quality standards, safety standards & delivery timelines Ability to suggest ways of process optimization and come up with what-if studies Must have hands on experience in handling impurity profiling & in-process controls Conduct consistency experiments, Lab validation experiments & development report preparation Provide necessary support to kilo lab/manufacturing team Meeting project timelines, RMC & quality parameters Online maintenance of GLP & documentation as appropriate Ensuring full adherence to safety & quality SOPs Ensure safety at work through enforcement of good laboratory practices: Follow safety & quality systems in the labs Maintenance and usage of equipment/apparatus/instruments as per SOPs and general housekeeping norms Guide team members/juniors on safety protocols and ensure compliance Maintain records, data integrity and IP confidentiality: Document the reactions executed, research findings/observations accurately in lab notebooks to ensure data integrity Maintain strict IP Confidentiality and adhere to all policies To prepare the final reports as required Ensure skill development of self: Improve knowledge of organic chemistry/Analytical techniques through one-on-one discussions with supervisor/ regular classroom trainings/ project trainings/ further educational programs etc. Preferred candidate profile Qualification: M.Sc. (Organic Chemistry) Experience: 2 - 6 Years of experience in Process R&D

Role & responsibilities Improve delivery efficiency and quality through delivery management Ensure seamless execution of project through effective planning Build Lasting client relationship Ensure safety at work through enforcement of best lab management practices Maintain records, date integrity and IP confedentiality Ability to Literature search, conduct experiments and monitor reactions with the aid of minimum supervision. Adherence to online documentation, quality standards, safety standards & delivery timelines Provide necessary support to kilo lab/manufacturing team. Ensuring full adherence to safety & quality SOPs Document the reactions executed, research findings/observations accurately in ELNB to ensure data integrity. Maintain strict IP Confidentiality and adhere to all policies. Preferred candidate profile PHD (Organic Chemistry) with 0-4 years of relevant experience

Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description You will be working with our Design team from Hyderabad to develop STA tests. These tests are intended to catch timing violations at block level /SoC. In this role you will have an opportunity to understand in depth FPGA/SoC silicon architectures at block level as well as full chip level, to develop constraints and, debug the setup, perform static timing analysis and debug Timing violations. Interact with Physical design Teams and propose fixes for the timing violations. You will work closely with design engineers, custom engineers and layout engineers to ensure FPGA division deploys new products with the highest quality and shortest time to market. Skills will be developed to work on multiple projects supporting key functions within the organization. Good communication and presentation skills are required. Requirements/Qualifications Perform Static Timing Analysis ASIC blocks and full chip with industry lead EDA tools like prime-time / Tempus, understand different interfaces, ASIC blocks and work on constraints and develop different STA modes at full chip level. Track post layout netlist releases spef extractions and integrate the new releases into full chip STA environment. Perform verification processes with modelling and simulation using industry standard simulators Maintain technical expertise and provide training to juniors Contribute to cross group communication to work towards standardization and group success Proactively solicit input from Standards, CAD, modelling and layout to ensure the design quality Drive innovation into the future generation with dynamic work environment Previous strong experience in STA and making timing constrains Experience in taking an industrial specification and implementing the respective IP Good understanding on timing/area/power/complexity trade-offs on complex interface design Familiar with IP level verification and strong RTL debugging capabilities Experience in frontend implementation tasks such as synthesis and logic equivalence Experience in large scale mix signal circuitry design including logic implementation/verification, timing analysis/optimization an advantage Excellent problem-solving and analytical skills A self-motivated, enthusiastic team player who enjoys working with others Good communication skills with the ability to convey complex technical concepts to other design peers in verbal and written form. Travel Time 0% - 25% To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Preferred Education Background: PhD Chemistry in Electrochemistry with >2 years of work experience. Role: · A bench scale chemist leads a team of chemists working on surfactant synthesis, polymer synthesis and its application testing for oil and gas and industries. Practical experience of electrochemistry. · Design and evaluate synthetic processes for the fine chemical market and for oil and gas industries application studies. Required Skill Set: · Good technical & working knowledge of standard laboratory techniques and modern analytic techniques and instrumentation. Deep technical knowledge of electrochemistry. · Must be able to optimize and scale up new products to pilot and full plant from gram to kilogram quantities in a cost-effective manner. · Strong communication skills (written and oral) including the ability to communicate effectively at all levels and able to report back results accurately and in a timely manner. · Good interpersonal, team-playing skills and the ability to operate in multi-disciplinary/cross-functional teams. · Ability to work in a team with dynamic multidisciplinary environment. · Ability to solve technical problems under one's own initiative, but with a willingness to seek expert assistance when required. · Ability to work unsupervised for shorter periods without losing touch with the aims of the team. Responsibilities: · Responsible for development, synthesis, full characterization, and evaluation of new and existing molecules. · Performs hands-on laboratory R&D on a routine basis to support projects and/or other technical activities. · Prepares results in a timely and accurate manner in the required format (written, verbal, formal presentation), summarizing all technical activities. · Writes, initiates, adapts and follows scientific procedures and protocols. · Effective communication with all team members, other chemists, production/plant staff, and team leaders to distribute results, problems and next step recommendations in a timely fashion. · Stays up to date with current developments in the areas of expertise. · Performs literature search. · Perform experiments along with a team. Accountability: · Safe working in accordance with safety policy and procedures. Performs safety, COSHH and risk assessments of all chemical processes. Contribute to evaluation of new target opportunities and understand and implement project Job Types: Full-time, Permanent Benefits: Cell phone reimbursement Health insurance Provident Fund Schedule: Day shift Work Location: In person

• Physical Design of blocks & handle Complex block implementation. • Floorplan optimization for area, Power & Timing. • Block-level PnR & close Design to meet Timing, area & Power constraints. • Implement ECOs to fix timing, noise & EM-IR violations. Required Candidate profile * Exp in RTL Synthesis for PnR using small geometry FinFET. * Strong in Physical Design incl. physically aware Synthesis, floor-planning, PnR * Logic equivalency RTL2Synthesis & Synthesis2APR netlist.

Title: Senior Research Investigator Date: 6 May 2025 Job Location: Hyderabad Pay Grade Year of Experience: Job Description Level 7-II (Senior Research Investigator or Senior Research Scientist) Job Location: Hyderabad Department: Synthetic Chemistry Role Requirements Ph.D. degree with post-Doctoral research with excellent communication skills is preferred with minimum 2 years’ experience in CRO industry. The candidate should manage a team of 7-12 scientists and be capable of designing scheme, troubleshoot, problem solve independently and execute high-profile project(s). The person should be flexible working shifts as per the organizational policy. The candidate should be excellent in cross functional teamwork and in customer engagement. Safety Strategic Responsibilities Commitment to safety (self, team, lab and the organization) alwaysEnsuring ZERO safety incidents in the lab/organizationEnsuring ZERO safety non-compliances at workplace. Reporting incidents (or near-misses) and learnings from those incidents to avoid recurrenceNear miss reporting 1 per year per employee, Reduction in number of first aid injuries reported compared to previous FY, Review SOPs and checklists for completeness of information related to safety Quality Ensure to comply with Syngene’ s quality standards and services (self and team) alwaysZERO data integrity incidents Adhere to the ALCOA+ principles in all data generated. Ensuring adherence to all Syngene policies related to data integrity by all team members.Maintain confidentialityZero repeat audit observations, Zero major and critical observations in external audits, SOP’s vs Practices: Review and implement necessary refinements for continuous training, testing, and tracking SOP complianceDeviations <= 2% within the fiscal year, tracked monthly Delivery Responsible for Project Health Index: Project planning, Execution, Deliverables including tracking of KPIs for his/her team and Quality of services (internal/client metrics)Achieve per-quarter improvement in key FY25 KPIs, per OU per plan, 18-20 steps per FTE per month, 6 compounds/FTE/month, 70% targets TAT within 30 days for deliverables <0.1 g scale and 5 CE/FTE/month for scales >0.1 g scale. Help the Group Leaders and Head of the department in managing the process of governance & tools for effective, transparent, and collaborative management of the projects. Engagement Good in engaging the customers (weekly reports, experimental for completed final compounds etc). Zero flaw in presentations and report, real time and flawless communication0% business attrition w.r.t scientific environment and work cultureSupport in implementing comprehensive client feedback collection and response platform in collaboration with PMO as service management piece. Demonstrate consistent, sustainable technical and operational improvements per RCA/CAPA process in Synthetic chemistryExcellent in team and cross-functional engagement Cost Manage lifecycle of various lab infrastructure, instruments. Ensure optimum resource utilization and cost efficiency Manage FH to chemist ratio.Maintain above 50 % of Scientist-1 in the team and around 25 % of Scientist-2 employees. Compliance Adhere to the ALCOA+ principles in all the experiments and data generated. Ensuring adherence to Syngene policies related to data integrity by all team members.ALCOA+ deviations <= 2% within the fiscal year, tracked monthly, zero data integrity incidents: Breaches that would lead to a material breach with client or regulatorGemba walk compliance at 100%, Timesheet compliance at 100%Confidentiality complianceEnsuring all assigned mandatory training related to data integrity, health, and safety measures are completed on time by all team members. People Leadership Next and Succession planning for critical roles – Reduce critical talent attrition by <5%, create succession plans for critical rolesBuild competencies and skills that are required to achieve current and future business needs. Technical/functional Skills The candidate should have excellent knowledge of modern synthetic methodology including asymmetric synthesis, heterocyclic chemistry, catalysis and the reaction mechanism is expected. Should be expert in synthetic problem solving/troubleshooting skills.Excellent communication skills including face to face and virtual interactions with team and clients. Must have exceptional Presentation skills.The candidate should maintain an accurate scientific notebook, draft concise written reports for publications. Managerial Skills Expertise in handling multiple collaborations.Demonstrated in handling a team size of 7-12 FTEs Worked effectively with interdisciplinary teams.Efficient Lab management skillsThe Leader must demonstrate the essential qualities of People Management.Giving & receiving performance-enhancing feedbackSetting clear performance expectationsConducting challenging performance conversationsCoaching individuals toward improved performanceDelegating tasksCreating accountabilityLead the change

Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Emulation Good to have skills : NA Minimum 5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As a Software Development Engineer, you will analyze, design, code, and test multiple components of application code across one or more clients. You will perform maintenance, enhancements, and/or development work in a dynamic environment, contributing to the success of the projects. Roles & Responsibilities: Expected to be an SME, collaborate, and manage the team to perform. Responsible for team decisions. Engage with multiple teams and contribute on key decisions. Provide solutions to problems for their immediate team and across multiple teams. Lead and mentor junior team members. Conduct code reviews to ensure code quality and adherence to coding standards. Professional & Technical Skills: Must To Have Skills: Proficiency in Emulation platform like Palladium/Zebu/Veloce/HAPS. Strong understanding of SOC Architecture Experience with debugging using any Emulation Palladium/Zebu/Veloce/HAPS platform. Hands-on experience with ARM (A/M) architecture. Knowledge of C language. Additional Information: The candidate should have a minimum of 5 years of experience in Emulation. This position is based at our Bengaluru office. A 15 years full-time education is required. Qualification 15 years full time education

UPL Limited (NSE: UPL & BSE: 512070, LSE: UPLL) is a global provider of sustainable agriculture products and solutions, with annual revenue exceeding $6bn. We are a purpose-led company. Through OpenAg®, UPL is focused on accelerating progress for the food system. We are building a network that is reimagining sustainability, redefining the way an entire industry thinks and works – open to fresh ideas, innovation, and new answers as we strive towards our mission to make every single food product more sustainable. As one of the largest agriculture solutions companies worldwide, our robust portfolio consists of biologicals and traditional crop protection solutions with more than 14,000 registrations. We are present in more than 130 countries, represented by more than 10,000 colleagues globally. For more information about our integrated portfolio of solutions across the food value chain including seeds, post-harvest, as well as physical and digital services, please visit upl-ltd.com and follow us on LinkedIn, Twitter, Instagram and Facebook. Role Name – Research Trainee - Synthesis Purpose Of The Role To conduct research under guidance of group lead to optimise the cost and improve the yield to aid in the business growth of UPL Job Responsibilities To set up reactions based on discussion and planning with Team Leader to optimise synthesis of out of patent agrochemical intermediates and active ingredient. To carry out reactions to develop non-infringing processes and improve cost effectiveness of existing products by improving yield, modifying processes and maintaining quality, monitoring and concluding based on analysis. Communicate on daily basis on the progress of the project. Achieve reproducibility and consistency of results. Maintain daily records and update for QMS system Follow safe handling practises of chemicals and reactions to maintain industrial hygiene and reduce environmental wastes. Tabulate data of experiments needed for review meeting. Maintenance of Equipment’s or instruments given under laboratory control. Collaborate with other divisions for work related matters. Qualification MSc in Chemistry with 0-2 yrs of experience Setting up reactions, monitoring and conclude based on analysis. Reproducibility and consistency of results. Good record maintenance, safe handling practises of chemicals and chemical wastes. We are one team, for maximum impact. One team with shared goals. We all play for the team and no one plays against the team. We have a laser-like focus on what our customers need and want, on anticipating their future needs and on how we can create innovative solutions and experiences for them. #UPLJobs

Chip Lead (Sr Mgr/Director) Hyderabad A Hyderabad based SoC product design company is looking for a talented, energetic and diligent SoC Director for leading the development of a new generation of devices. Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs in the area of HBM. Job responsibilities include: Driving the specification of the chip with architect and design leads – eventually cascading into block specifications.Make PPA decisions for the chip.Defining multiple development checkpoints – for IP/SoC Design/DV/PDCome up with overall project plan and cascaded schedule details for other teamsWork with Analog/Digital IP teams to laydown integration details for the IPs.Drive the full chip floorplan / bump maps and provide area/floorplan targets to IP teams.Define the sign-off criteria for the device.Define the SoC verification plan items/scenarios to be covered.Assist/Review the micro architecture definition for digital blocksDefine RTL Quality gate criteria for integration – Lint/CDC/Drive the timing constraints/timing analysis/closure activities.Define the DFT targets for the chip and cascade that into activities needed on the DFT front.Work with PD enginers to get the physical design closure.Handle tapeout formalities Qualifications:Close to 15 years of solid experience in SoC design. A self starter. Candidate ready to define things where none exist. Ready for once in a lifetime project exposure, but ready to do heavy lifting for the effort.Proven ability to develop architecture and micro-architecture from specifications.Understanding of chip I/O design and packaging is advantageous.Experience in reviewing top-level test plans.Expertise in Synopsys Design Compiler for synthesis and formal verification.Strong working knowledge of timing closure processes.Experience with post-silicon bring-up and debugging.Familiarity with SoC integration challenges.Knowledge of design verification aspects is essential.Experience from SoC specification to GDS and commercialization is highly desired.Ability to make timely and effective decisions, even with incomplete information.Demonstrated expertise in specific technical areas, with significant experience in related fields.Provide direction, mentoring, and leadership to small to medium-sized teams.Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact:UdayMulya Technologiesmuday_bhaskar@yahoo.com"Mining The Knowledge Community"

A Moving Experience. Do you have a passion for pushing the boundaries of innovation? Are you excited about AI’s potential to improve the human experience? Then come join the ride! Who is Cerence ai? Cerence ai is the global leader in AI for transportation, specialized in building AI and voice-powered companions for cars, two-wheelers, and more that enable people to focus on what matters most. With over 500 million cars shipped with Cerence ai technology, we partner with leading automakers (such as Volkswagen, Mercedes, Audi, Toyota and many more), mobility providers, and technology companies to power intuitive, integrated experiences that create safer, more connected, and more enjoyable journeys for drivers and passengers alike. Our Driving Force Our team is dedicated to pushing the boundaries of AI innovation, working around the globe with headquarters in Burlington, Massachusetts, USA and 16 other offices across Europe, Asia, and North America. We bring together diverse backgrounds and varied skill sets with the shared goal of advancing the next generation of transportation user experiences. Our culture is customer-centric, collaborative, fast-paced, and fun, with continuous opportunities for learning and development to support your career growth. Interested in having a significant impact in a dynamic industry with a high-performing global team? We are seeking a highly skilled and innovative Senior Software Engineer in the TTS (Text-To-Speech) R&D team to develop TTS products exploiting AI models. The ideal candidate will have a robust background (experience or knowledge) in hands on Python programming and ML Ops. Person should be well-versed in the software engineering practices, version controls such as Git, experience and familiar in deployment, optimization of ai model (throughput, efficiency) and with ML-Ops, not for development of AI model but should expert for integration and optimization = productization. Your Impact: Transitioning AI models from research to product-grade and integrating them into observable services optimized for GPUs, specifically for Text-to-Speech (TTS) applications.Develop GPU-accelerated versions of advanced speech AI algorithms like TTS, voice style transfer and neural network-based vocoders etc.Identify and address performance bottlenecks, applying optimization techniques to enhance efficiency.Work collaboratively with cross-functional teams to introduce new product features and enhance existing products What You Bring: Masters or Bachelors (or equivalent experience) in Computer Science, computer architecture, or related field5+ years of experience, excellent Python programming and software design skills, including debugging, performance analysis, and test designExperience with inference Services and productization of AI Models (ML Ops)Excellent Debugging abilities spanning multiple software (storage systems, kernels and containers). Familiarity with version control and code review toolsBackground with container technologies such as docker (Preferred)Background with AI models for Speech Recognition, speech synthesis, Speech Translation, Machine Translation, TTS (Preferred)Experience with Nvidia frameworks and tools for performance measurement and optimization (Preferred)Knowledge of GPU programming such as CUDA or OpenCL (preferred) What We Offer We offer a generous compensation and benefits package (in addition to the base salary), including: Annual bonus opportunityInsurance coverage as per policyPaid time offPaid holidaysCompany contribution to the RRSP (Registered Retirement Savings Plan)Equity awards for certain positions and levelsHybrid work mode is applicable for this position. All compensation and benefits are subject to the terms and conditions of the underlying plans or programs, as applicable, and may be amended, terminated, or replaced from time to time. Cerence Inc. (Nasdaq: CRNC and www.cerence.com) is the global industry leader in creating unique, moving experiences for the automotive world. Spun out from Nuance in October 2019, Cerence is a new, independent company that has quickly gained traction as a leader in the automotive voice assistant space, working with all of the world’s leading automakers – from Ford and Fiat Chrysler to Daimler, Audi and BMW to Geely and SAIC – to transform how a car feels, responds and learns. Its track record is built on more than 20 years of industry experience and leadership and more than 500 million cars on the road today across more than 70 languages. As Cerence looks to the future and continues an ambitious growth agenda, we need someone to join the team and help build the future of voice and AI in cars. This is an exciting opportunity to join Cerence’s passionate, dedicated, global team and be a part of meaningful innovation in a rapidly growing industry. EQUAL OPPORTUNITY EMPLOYER Cerence is firmly committed to Equal Employment Opportunity (EEO) and to compliance with all federal, state and local laws that prohibit employment discrimination on the basis of age, race, color, gender, gender identity, gender expression, sex, sex stereotyping, pregnancy, national origin, ancestry, religion, physical or mental disability, medical condition, marital status, citizenship status, sexual orientation, protected military or veteran status, genetic information and other protected classifications. Cerence Equal Employment Opportunity Policy Statement. All prospective and current Employees need to remain vigilant when it comes to executing security policies in the workplace. This includes: Following workplace security protocols and training programs to familiarize with the ways to maintain a safe workplace. Following security procedures to report any suspicious activity. Having respect for corporate security procedures to allow those procedures to be effective. Adhering to company's compliance and regulations. Encouraging to follow a zero tolerance for workplace violence. Basic knowledge of information security and data privacy requirements (e.g., how to protect data & how to be handling this data). Demonstrative knowledge of information security through internal training programs.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10736 Date posted 04/24/2025 Experience: 14+ Years Education: BE / B. Tech / M. Tech or equivalent in Computer Science or Electronics Description Candidate will be part of word level Synthesis team (catering to multiple EDA products). Design, develop, troubleshoot the core algorithms. Will be working with local and global teams. Will be working on Synthesis QoR, Performance and logic interference problems It is a pure technical role. Will need to drive projects , solutions to complex problem with other team members Essential Skills: Ability to develop new software architecture and good leadership skills. Strong hands-on experience in C/C++ based software development. Strong background in Design Patterns, Data Structure, Algorithms, and programming concepts. Familiarity with multi-threaded and distributed code development. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Good knowledge of Verilog, SystemVerilog & VHDL HDL Well versed with Software Engineering and development processes Experience of production code development on Unix/Linux platforms. Exposure to developer tools such as gdb, Valgrind Exposure with source code control tool like Perforce. Good analysis and problem-solving skills. Desirable Skills: Work experience in Synthesis tools Work experience in EDA Experience in technically leading significant size projects Personal Attributes: Highly enthusiastic and energetic team player with the ability to go an extra mile. Good written and verbal communication skills. Strong desires to learn and explore new technologies. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

About Turing Turing is an AI-powered tech services company that aims to accelerate AGI advancement and deployment by bridging the gap between global talent from 100+ countries and the world's best foundational LLM companies. We enhance AI performance by evaluating, fine-tuning, and offering insightful feedback on LLMs, ensuring accuracy, reliability, and effectiveness across diverse data sets. Role Overview A well-funded AI research company is looking for candidates with strong biology knowledge, particularly at the high school and pre-medical levels. You'll solve biology problems and work with various data formats (text, images, diagrams) while explaining solutions clearly and efficiently. What Does Day-to-day Look Like You would spend time-solving a variety of advanced high school biology problems, including those at the advanced biology level, and creating detailed explanations. You’ll also be working with multi-modal data, integrating text with images, diagrams, and other visual aids. Here are a couple of examples of the types of problems you might encounter: Analyze and explain the process of protein synthesis, providing both textual explanations and annotated diagrams.Solve a problem involving Mendelian genetics and Punnett squares, accompanied by visual representations of genetic crosses.Address challenging problems involving cell biology, physiology, genetics, and ecology, typical of the Engineering Entrance Exams or pre-medical college-level questions, utilizing a combination of textual and visual explanations. Note: A strong foundation in high school biology is required, but no other specialized domain experience is needed. Requirements Strong high school/college-level biology skills.Excellent problem-solving abilities.Excellent written and verbal communication skills. Preferred Bachelor’s degree in Biology or related field (or equivalent experience).Familiarity with standardized tests at the pre-medical level. Benefits Collaborate with globally renowned experts and build a network tailored to your career aspirations.Experience the flexibility of remote work while breaking away from traditional office setups.Receive industry-standard salaries in USD.Contribute to innovative projects pushing the boundaries of technology, keeping you at the forefront of advancements. Complete an online biology assessment, followed by an interview and a short teaching session. Join us in revolutionizing AI and biology!

About Turing Turing is an AI-powered tech services company that aims to accelerate AGI advancement and deployment by bridging the gap between global talent from 100+ countries and the world's best foundational LLM companies. We enhance AI performance by evaluating, fine-tuning, and offering insightful feedback on LLMs, ensuring accuracy, reliability, and effectiveness across diverse data sets. Role Overview A well-funded AI research company is looking for candidates with strong biology knowledge, particularly at the high school and pre-medical levels. You'll solve biology problems and work with various data formats (text, images, diagrams) while explaining solutions clearly and efficiently. What Does Day-to-day Look Like You would spend time-solving a variety of advanced high school biology problems, including those at the advanced biology level, and creating detailed explanations. You’ll also be working with multi-modal data, integrating text with images, diagrams, and other visual aids. Here are a couple of examples of the types of problems you might encounter: Analyze and explain the process of protein synthesis, providing both textual explanations and annotated diagrams.Solve a problem involving Mendelian genetics and Punnett squares, accompanied by visual representations of genetic crosses.Address challenging problems involving cell biology, physiology, genetics, and ecology, typical of the Engineering Entrance Exams or pre-medical college-level questions, utilizing a combination of textual and visual explanations. Note: A strong foundation in high school biology is required, but no other specialized domain experience is needed. Requirements Strong high school/college-level biology skills.Excellent problem-solving abilities.Excellent written and verbal communication skills. Preferred Bachelor’s degree in Biology or related field (or equivalent experience).Familiarity with standardized tests at the pre-medical level. Benefits Collaborate with globally renowned experts and build a network tailored to your career aspirations.Experience the flexibility of remote work while breaking away from traditional office setups.Receive industry-standard salaries in USD.Contribute to innovative projects pushing the boundaries of technology, keeping you at the forefront of advancements. Complete an online biology assessment, followed by an interview and a short teaching session. Join us in revolutionizing AI and biology!

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10738 Date posted 04/23/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 5 -8 years of experience, you bring a wealth of knowledge in software architecture and leadership. You excel in C/C++ software development, and your strong background in design patterns, data structures, and algorithms sets you apart. You thrive in multi-threaded and distributed code environments, and your familiarity with ASIC design flow and EDA tools is second to none. Your expertise in Verilog, SystemVerilog, and VHDL HDL, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind, and you understand the importance of source code control tools such as Perforce. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: - Designing, developing, and troubleshooting core algorithms for word-level synthesis. - Collaborating with local and global teams to enhance synthesis QoR, performance, and logic interference. - Engaging in pure technical roles focused on software development and architecture. - Implementing multi-threaded and distributed code solutions. - Utilizing your knowledge of ASIC design flow and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL HDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of synthesis tools used globally. - Solving complex logic interference problems to improve design accuracy. - Contributing to the development of high-performance silicon chips and software content. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Familiarity with multi-threaded and distributed code development. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the word-level synthesis team, catering to multiple EDA products. This team focuses on developing innovative solutions to improve synthesis quality of results (QoR), performance, and logic interference. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10737 Date posted 04/23/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 8-15 years of experience, you bring a wealth of knowledge in software architecture and leadership. You excel in C/C++ software development, and your strong background in design patterns, data structures, and algorithms sets you apart. You thrive in multi-threaded and distributed code environments, and your familiarity with ASIC design flow and EDA tools is second to none. Your expertise in Verilog, SystemVerilog, and VHDL HDL, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind, and you understand the importance of source code control tools such as Perforce. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: - Designing, developing, and troubleshooting core algorithms for word-level synthesis. - Collaborating with local and global teams to enhance synthesis QoR, performance, and logic interference. - Engaging in pure technical roles focused on software development and architecture. - Implementing multi-threaded and distributed code solutions. - Utilizing your knowledge of ASIC design flow and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL HDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of synthesis tools used globally. - Solving complex logic interference problems to improve design accuracy. - Contributing to the development of high-performance silicon chips and software content. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Familiarity with multi-threaded and distributed code development. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the word-level synthesis team, catering to multiple EDA products. This team focuses on developing innovative solutions to improve synthesis quality of results (QoR), performance, and logic interference. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Principal STA / Synthesis Engineer Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ BangaloreA US based well-funded product-based startup looking for Highly talented Engineers for the following roles.Constraint developmentConstraint managementConstraint validationChip top level synthesis, sta and Timing Closure.RTL2GDS flow.Ability to handle synthesis,sta, lec, upf flow methodologies.TCL/perl/python scripting.Candidate with 12+ yrs exp in Synthesis / STA roleExperience in handling complex data path-oriented multi-million gate synthesisWorking Knowledge of Physical synthesis using tools like Genus, Design CompilerExperience in debugging for multi-clock domains hierarchical/flat timing analysis.Hands-on experience in LEC along with strong debugging skills for resolving issues/aborts.Netlist and constraint sign in checks and validation.Prime time constraint development at full chip level and clean up.Multimode multi corner timing knowledge and timing closure at block/top level using tools like DMSAExcellent debugging skills in timing convergence issues and ability to come up with creative solutions .Technical leadership and ability to mentor and make the team deliver. Contact:UdayMulya Technologiesmuday_bhaskar@yahoo.com"Mining The Knowledge Community"

Senior SoC Director / SoC DirectorHyderabadFounded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!!Somebody we can trust to drive on the World stage without embarrassing us Job Description:We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification.Key Responsibilities:Proficiency inInterconnect FabricCache CoherencyD2DC2COversee full chip design for complex SoCs.Develop and implement digital designs (RTL).Manage IP dependencies and track all front-end design tasks.Drive project milestones across design, verification, and physical implementation phases.Qualifications:At least 15-25 years of solid experience in SoC design.Proven ability to develop architecture and micro-architecture from specifications.Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C.Knowledge of memory controller designs and microprocessors is a plus.Understanding of chip I/O design and packaging is advantageous.Experience in reviewing top-level test plans.Expertise in Synopsys Design Compiler for synthesis and formal verification.Strong working knowledge of timing closure processes.Experience with post-silicon bring-up and debugging.Familiarity with SoC integration challenges.Knowledge of design verification aspects is essential.Experience from SoC specification to GDS and commercialization is highly desired.Ability to make timely and effective decisions, even with incomplete information.Demonstrated expertise in specific technical areas, with significant experience in related fields.Provide direction, mentoring, and leadership to small to medium-sized teams.Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact:UdayMulya Technologiesmuday_bhaskar@yahoo.com"Mining The Knowledge Community"

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10729 Date posted 04/22/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and driven R&D Engineer with a deep understanding of data structures, algorithms, and their applications. You have a strong background in software development, particularly with C/C++ on UNIX/Linux platforms, and are eager to tackle complex, large-scale software code-based tool development. With a minimum of 8 years of related experience, you have honed your analytical, debugging, and problem-solving skills. You thrive in both self-directed and collaborative environments and are committed to continuous learning and exploration of new technologies. Your excellent communication skills in English enable you to effectively collaborate with team members and present your ideas clearly. What You’ll Be Doing: Supporting the existing functionality of our tools and continually enhancing their versatility, performance, and memory utilization while improving software quality. ing extensive knowledge of algorithms and data structure design to develop robust and efficient implementations that improve tool performance and customer adoption. Interacting with other Synopsys R&D members and customers to understand their needs and product goals. Contributing to the development of complex software code-based tools in a multi-person product development environment with high dependencies and tight schedules. Exercising judgment in developing methods, techniques, and evaluation criteria to meet project goals. Collaborating with a team of enthusiastic and creative engineers to drive innovation and excellence. The Impact You Will Have: Enhancing the performance and quality of our verification tools, leading to increased customer satisfaction and adoption. Driving continuous improvement in software development processes and practices. Contributing to the development of cutting-edge technologies that power innovations in various industries. Helping Synopsys maintain its leadership position in the market by delivering high-performance solutions. Influencing the direction and success of our hardware verification tools through your expertise and innovation. Fostering a collaborative and innovative work environment that encourages growth and learning. What You’ll Need: A Bachelor’s degree in Electrical/Electronics/Computer-Science Engineering with a minimum of 8 years of related experience, or a Master’s degree with 6 years of relevant experience. In-depth understanding of data structures, algorithms, and their applications. Excellent software development experience with C/C++ on UNIX/Linux platforms. Exposure to Python, TCL, and shell scripting languages is preferable. Exposure to HDL languages like Verilog or System Verilog is desirable, with a willingness to learn their nuances. Demonstrated history of good analytical, debugging, and problem-solving skills. Experience with complex and large software code-based tool development. Who You Are: You are a motivated and enthusiastic engineer who excels in both independent and collaborative settings. You have a solid desire to learn and explore new technologies, and you exercise good judgment in developing methods and techniques to meet project goals. Your excellent written and oral communication skills in English enable you to collaborate effectively and present your ideas clearly. Special consideration will be given to candidates with a background in hardware functional verification and/or synthesis techniques, as well as knowledge of software specification, design processes, and regression testing. The Team You’ll Be A Part Of: You will join the Hardware Assisted Verification team at Synopsys, a group of dedicated and innovative engineers focused on developing and enhancing our verification tools. Our team is committed to pushing the boundaries of technology and delivering high-performance solutions that meet the needs of our customers. We work in a collaborative and dynamic environment, where creativity and innovation are encouraged and valued. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Exp: 3 to 15 YrsLocation: Hyderabad / Bangalore The core skill set expected from the team is : Exceptional Digital fundamentalsHands on experience in System Design with FPGA devices with relevant FPGA EDA toolsExperience in designing and implementing FPGA based solutions in Microchip or Xilinx or Altera FPGAsWrite high quality code in Verilog/System Verilog, VHDL and C code for embeddedprocessors. Maintain existing code.Developing testbenches using Verilog/System Verilog and verifying validation designs in simulation environment using BFM/VIPExperience in using Synthesis, Placement constraintsSTA constraint definition and Timing closure for high speed designsValidation of FPGA based implementation on HW boardExperience in writing embedded FW programs in C/C++Strong Lab debug experience and enthusiasm & patience to solve systems level hardware issues using Lab equipment, Embedded debuggers and RTL debuggersBe conversant with on-chip debug toolsExperienced with scripting tcl/perlExposure to Version management systems, GitHub, SVNExcellent verbal and written communication skills in EnglishStrong technical background in silicon validation, failure analysis and debugUnderstand hardware architectures, use models and system level design implementations required to utilize the silicon feature s.

API synthesis, Intermediates synthesis, Process development Purification, Extraction Performing various synthetic organic reactions

Conduct organic reaction, synthetic experiments, catalytic reaction, scaleup with precision, and efficiency. developing and optimizing synthetic routes. Analyze and interpret data (HPLC, NMR ,LCMS, MASS), Office cab/shuttle Health insurance Provident fund Annual bonus

Full chip or block-level synthesis using tools Constraints development, STA & timing closure, low power checks Work closely with PD team for floorplan, placement & timing reviews Good understanding of front-end implementation flows ,concepts

New product development . Literature survey & reaction path options • Perform various chemical synthesis in lab & reach targeted goal • Bench top to Pilot Plant level scale up • assemblies for reactions like distillation/Purification. • Plant trials Required Candidate profile Residing near Taloja MIDC ( eg. Panvel, Navi Mumbai, Dombivli, Thane, Kalyan, Kharghar) M Sc in Organic Chemistry first class Liking for R & D synthesis , New Products development Values time & money Perks and benefits Statutory benefits like PF, ESIC, Gratuity, Bonus

Walk-in-Interview Role & responsibilities: About the Role: Engineer Digital Design The position involves development of digital subsystems in a complex SoC with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture with multi-level caches, multiple clocks and resets, high-speed interfaces and peripherals. The chosen candidate would do the architecture, microarchitecture and design and verification and would be responsible for the entire design flow and sign-off, including synthesis, LEC, Formality and STA, and be able to deliver reusable and robust digital IP. Prior Experience Hands-on experience or Academic Projects involving one or more high end digital designs like multi-core, multi-threaded processor subsystems, high speed interfaces (PCIe, Ethernet, LPDDR, HBM), high performance digital accelerators (Tensor Processing units, Convolution engines, other high performance digital accelerators) Exposure to design sign-off flows including Lint, CDC, Synthesis, LEC, STA, and Timing Closure . Familiarity with low-power design methodologies. Skills Required Technical Expertise: Verilog, SystemVerilog, and scripting languages (Python, Perl, Tcl, Shell). Processor Knowledge: RISC-V, ARM architectures, and protocols like AXI, APB, AHB. Design Tools: Experience with ASIC and FPGA design flows, DFT (Scan, MBIST, BScan), and UVM methodology. Analytical Skills: Strong problem-solving abilities with attention to detail. Low Power Design: Techniques like clock gating, power gating, and dynamic voltage/frequency scaling. Communication: Good teamwork and collaboration skills, eager to learn and grow Walk-in Interview Details Dates: April 5, 6, 12, 13, 19, 20 Time Slots: Please select your preferred timeslot for the interview via the link provided: https://calendly.com/careers-ceremorphic Location: Ceremorphic Technologies Interview Process: The walk-in interview will include a 1-hour written test . Eligibility Criteria : Education: B.Tech/BE or M.Tech/MS in Electronics or Electrical Engineering Aggregate: 70% or above Experience: 0-2yrs What to Bring : An updated resume A valid govt ID for verification We look forward to meeting you and discussing how you can contribute to our dynamic and innovative team at Ceremorphic Technologies . Regards Ceremorphic Hiring Team

Role & responsibilities Prepare standard solutions as per requirement. Conduct experiments taking into account the volume and structure of ingredients. Customize formulas and use different reagents to perform the chemical reactions. Ensure compliance with laboratory safety, health and environment. Write technical reports of the test procedure results. Maintain lab equipment and troubleshoot or report on malfunctions. Establish chemical products to improve their quality. Ensure proper usage of equipment and store materials in secure places. Aware of process development and process safety Preferred candidate profile Bachelors/Masters Degree in Science or related field (industrial experience preferred) 2-7years of relevant experience Strong skills to evaluate alternative reaction to meet target. Ability to learn and implement new techniques in laboratory. Aware of Process Development and Process Safety Proficient with computer and information technology Experience working with chem-draw and Automation. Knowledge of reagents handling must Good knowledge of Laboratory Safety standards and safe handling of reagents Well aware of MSDS check and proper care while handling chemistries. Excellent understanding of Chemistry and Research Skills Perform chemical reaction with minimum supervision. Well aware of Safety, Health and Environment conditions.