2263 Synthesis Jobs - Page 27

Principal IP/RTL Design Engineer for Ethernet Switch Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Position Overview IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet protocols, and experience with high-performance interconnect protocols such as InfiniBand, NVLink, Infinity Fabric, with a focus on delivering high-performance, low-latency solutions for large-scale AI workloads. Key Responsibilities Design and optimize IP blocks (MAC, PCS, packet processors) for Ethernet switches. Develop synthesizable RTL (Verilog/SystemVerilog) meeting performance and timing goals. Optimize designs for low latency, high throughput, and power efficiency. Implement Ethernet protocols (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Apply knowledge of InfiniBand, NVLink, or similar protocols for feature implementation. Use P4 or related languages for programmable packet processing. Collaborate with teams for synthesis, timing closure, and IP integration. Document designs and stay updated on AI networking trends. Required Qualifications Education: BS/MS/PhD in Electrical or Computer Engineering. Technical Skills: Proficient in Verilog/SystemVerilog for design. Knowledge of Ethernet (IEEE 802.3, 100G/400G/800G), ECMP, and congestion control. Experience with InfiniBand, NVLink, or similar protocols. Proficiency in P4 or programmable data plane languages. Knowledge of UALink, Ultra Ethernet, or RDMA/RoCE. Familiarity with power optimization or SDN. Familiarity with synthesis (e.g., Synopsys Design Compiler) and timing tools. Soft Skills: Strong problem-solving, communication, and teamwork skills. What is in it for you? Pure play product work environment Chance to work with a tightly knit group of exceptional engineers who come from the top companies of the Semiconductor world Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. A meritocracy first work place where each peer is a star A chance to be a part of industry shaping product in entirety (not bits and pieces) from initial stages A chance to work at a startup which already has customers and investor lined up for their product pipeline (We do not have a marketing/sales team, because we do not need them). A chance to learn from industry veterans who have already launched multiple Billion Dollar Semiconductor firms over the last 3 decades. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X). Senior/Lead PD Engineer ADI is looking for Senior/Lead PD Engineer for the development of complex mixed Signal SoCs. These chips are manufactured in most leading edge process nodes and high speed clock rates. These SoCs involve multiple processor cores and speed signal processing hardware running at high speed. Position Requirements BTech/MTech degree in Electrical/Electronic from a reputed institute with 4-8 years of experience in the field of Digital place and route Hands on experience with the implementation (PnR Signoff) of complex high speed SoC designs in cutting edge process technologies (22 nm, 16 nm, 7 nm, etc). Hands on experience in handling the tapeout of complex high speed SoC designs in cutting edge process technologies Floor Planning, Power Plan, Place and Route, Clock Planning and Clock Tree Synthesis, Parasitic Extraction Strong expertise in Static Timing analysis , constraint development and sign off. Innovate on the flows to meet the QoR targets and ensure predictability Good understanding on device/interconnect and circuit aspect of the complex UDSM technologies is an added advantage. Being proficient in TCL, Perl etc. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

We are now looking for a Senior Power Verification Engineer. NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of low power features for the world’s leading Smart-NICs and DPUs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These networking processors also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA Smart-NICs and DPUs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications!The Networking Chip Design in India is a new team which is growing at a fast pace! What You’ll Be Doing Work on structural and functional verification of low power aspects of NVIDIA’s family of smartNICs and DPUs. Come up with test plans and coverage plans of these features. Write test cases, test bench components like assertions and coverage points, and own verification convergence. Collaborate with system level and unit level teams to cover the features well from functional, electrical, performance, and noise aspects. Be responsible for debugging waves to analyse power consumed by unit IP’s. Work with architects, designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks. Validate/Correlate the effectiveness of the low power features on silicon. What We Need To See BS/MS or equivalent experience with specialisation related to Low Power techniques and Verification. 5+ years of experience. Fundamental understanding of power basics including transistor-level leakage/dynamic characteristics of VLSI circuits. Knowledge of power intent formats - UPF/CPF. Experience in Static Power check - tools like VCLP/MVRC or similar. Hands-on knowledge in Power aware dynamic verification - NLP/MVSIM or similar tools. Experience in design and verification tools (VCS, XCelium or equivalent simulation tools, Verdi, Indago or other debug tools). Familiarity with low power design techniques such as multi VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS). Exposure to Cluster/Sub-system/Fullchip/SOClevel verification environments Ways To Stand Out From The Crowd Prior experience of SmartNICs (or DPU) and/or high-speed interconnects. Good software programming skills. Python/Perl/C++ preferred. Confident debugging and problem-solving skills. Good interpersonal skills and ability & desire to work as an excellent teammate. Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/ NVIDIA is committed to encouraging a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. JR1997923

Hiring: M.Sc Organic Chemistry Fresher Industry: Pharma Manufacturing Location: Kukatpally, Hyderab Eligibility: M.Sc in Organic Chemistry (Fresher) Salary: ₹18,000 per month Interested candidates can Call / WhatsApp: 7396423749 Job Types: Full-time, Permanent, Fresher Pay: ₹15,000.00 - ₹20,000.00 per month Benefits: Health insurance Provident Fund Work Location: In person

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Bengaluru. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come We make real what matters! This is your role Deploy Siemens EDA ProFPGA prototyping software and hardware solutions at customers and guide the customers to successful design bring-up Work closely with R&D to solve problems, review product specs, and find good general solutions that improve the overall product Train AE’s and customers on the solutionWin pre-sales engagements in cooperation with the technical sales teams Successfully deploy our solutions at early customer sites. This means educating the customer on best practices and tool requirements. It also means working with R&D to make the tool improvements necessary for the customer’s success. Ensure existing customers maximize the value they receive from the solution by developing and enhancing methodology that exploits the solution’s capabilities Ensure customers are kept up-to-date with the latest enhancements Provide customer requirements to R&D and marketing Work with QA and Docs to help them create tests and documentation that will improve our solutions Create examples and tutorials that are shipped with our products. Develop and/or refine methodology employed in creating and using prototypes and maximizing the value of our prototyping solution We don’t need superheroes, just super minds! A good understanding of FPGA based hardware prototyping platforms Working knowledge of multi FPGA prototyping flows(Synthesis, partitioning, PnR, runtime and debug) Practical insights into the application and usage of FPGA prototyping systems Knowledge of design mapping, testbench mapping and transactor development Expertise of hardware/software debug solutions related to FPGA prototyping Knowledge of test bench acceleration, ICE and co-model solutions Highly proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification Solid background in Functional Verification, RTL synthesis and PnR flows Conversant with SoC design and architecture concepts Good communication and inter-personal skills. We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Siemens Software. Where today meets tomorrow #LI-EDA #LI-Hybrid

At Ford Motor Company, we believe freedom of movement drives human progress. We also believe in providing you with the freedom to define and realize your dreams. With our incredible plans for the future of mobility, we have a wide variety of opportunities for you to accelerate your career potential as you help us define tomorrow’s transportation, no matter where you are in the world. As the financial engine of Ford, Ford Credit is at the heart of the Ford customer experience. By transforming how we enable customers to own and lease vehicles, we are ultimately transforming the way people access and interact with transportation on a global scale. A Unique Opportunity: We are establishing a new, dynamic design team in India, and this role offers a unique chance to be a foundational member. You will not only contribute your design expertise to impactful projects but also play a pivotal role in shaping the design culture and defining how design is effectively integrated into the product development lifecycle for this growing team and its collaborations across Ford. What we're looking for: Our Senior UX Interaction Designers are experts in creating beautiful, usable solutions based on unbiased user research. They are at the forefront of setting strategic design direction for our financial suite of products and championing the voice of the user throughout our organization. What you’re good at: Crafting beautiful and usable designs for digital products by applying your domain expertise, deep research findings, and collaborating with peers across the product organization. Conducting user research and experiments from planning to synthesis. Playing an active role in advocating for a Human-Centered Design process and creating a collaborative environment. Engaging and inspiring the product organization about our customers' experiences through powerful storytelling of the human-centered design process, research insights, and customer journeys. Skills you should have: Demonstrable experience in UX design and research in all phases across a variety of projects and mediums. Deep expertise in Interaction & Visual Design, Information Architecture, UX Writing, and UX Research. Advanced knowledge of Figma, Adobe Creative Suite, and/or other industry-standard design and prototyping software. Ability to visualize and test concepts at varying levels of fidelity – from napkin sketches and sacrificial concepts to wireframes, interactive & functional prototypes, and development-ready assets. Experience synthesizing research findings into actionable insights that inform strategic decisions and design solutions. Minimum Requirements: Bachelor’s degree in user experience, human-computer interaction, interaction design, service design, graphic design, or a digital design-related field (or equivalent practical experience). 4+ years of experience as a UX/Interaction/Product Designer working across a breadth of digital media. 2+ years of experience leading or significantly contributing to the human-centered design process within highly collaborative, multidisciplinary teams. Preferred Qualifications: Master’s degree in user experience, human-computer interaction, interaction design, service design, graphic design, or a digital design-related field. Additional Bachelor's or Master's degree in sociology, anthropology, psychology, or a related field. 6+ years of experience as a UX or Interaction Designer. Experience working in globally distributed teams. Experience in helping establish or scale design team operations or processes. What you’ll be doing: Design lean, iterative, and development-ready solutions that can scale for the future, while understanding current technology constraints. Think deeply about the user experience, balanced with business goals, to inform your designs. Lead the product team (Product Manager, Project Manager, Software Engineers) through the user-centered design process with collaborative workshops for discovery and ideation. Apply user research insights to drive product design and strategy, and help your team understand why and how to build better experiences. Plan and execute user research in collaboration with internal stakeholders, and share findings broadly across the organization. Actively contribute to establishing and refining design processes, best practices, and integration strategies within our new India-based design team, ensuring design is a core component of the product development lifecycle. Help foster a collaborative, innovative, and user-centric design culture within the new team.

M.Sc. - Organic Chemistry with 5 to 8 years of experience in Pharma Manufacturing Industries. Having Pharma Company experience in APIs & their Intermediates. Literature Search via Scifinder, chemical abstract, Free Patent online & Journals. Required Candidate profile Communication with IPR & Regulatory Affairs & DQA Dept. Development with Extraction, Purification & Distillation of product. Preparation of Process safety report & data analysis of Intermediate & APIs Perks and benefits Negotiable - Depending Upon Candidate & Experience

Internship Details Duration : Minimum 3 months (extendable) Type : Full-time internship Conversion : High-performing interns may be offered full-time roles Location : Gurgaon (Work from Office only, except for exceptional cases) Start Date : Immediate Stipend : ₹12,000/month Roobaroo is looking for a Psychology Research Intern to help us research the psychology behind growth, wellness, and youth behavior, and translate those insights into powerful content, bootcamp modules, and digital interventions. You’ll dive deep into psychological frameworks, study youth mental health trends, and co-create content that informs, uplifts, and empowers the next generation to grow without burning out. This is not a passive academic role. It's a hands-on, insight-driven opportunity to blend research with real-world impact. You’ll be part of a team building India’s first platform for youth growth and wellness. You’ll work closely with the content and product teams to bring psychological depth and accuracy into: Social media content Website articles and psychology-based explainers Bootcamp and course modules The Vision At Roobaroo, we’re helping young people grow without burning out. We exist to support: Students unsure of their strengths Aspirants under pressure with no outlet Creators torn between passion and paycheck Founders chasing dreams but lacking clarity Professionals with a resume full of jobs but no direction We’re building a world where career growth and personal wellness go hand in hand—not in conflict, but in sync. And design will be one of the most powerful ways we tell that story. Read more about us here: https://linktr.ee/roobaroo.ai What You'll Work On Literature Review & Research Mapping: Research global and Indian psychological frameworks (CBT, DBT, Positive Psychology, etc.) and translate them into bite-sized, relatable content. Content Research for Courses & Bootcamps: Assist in designing and validating content for growth and wellness-focused workshops, using psychology as the backbone. Insight-Driven Storytelling: Collaborate with writers and designers to create impactful, research-backed storytelling formats for social media and newsletters. Youth Psychology Use-Cases: Study patterns in stress, burnout, motivation, digital behavior, and identity crises among students and young professionals to develop actionable insights. Research Publication: Create compelling research papers to strengthen and amplify our work across reputed publications and for our own website Who you will learn from: You will be mentored by a clinical psychologist, PhD from IIT Kharagpur, college professor, and a wellness expert deeply experienced in youth mental health, emotional wellness, and digital behavior. Who We’re Looking For Bachelor’s or Master’s student in Psychology (Clinical, Counseling, or Applied Psychology preferred) Strong grasp of core psychological concepts and frameworks Passionate about making psychology accessible and impactful Strong writing, synthesis, and communication skills Interest in edtech, mental health, self-help, and behavior change Self-driven, curious, and comfortable with fast-moving environments Bonus if you have: Prior experience in content writing or curriculum design Exposure to platforms like Notion, Canva, or Figma Knowledge of social media content trends related to wellness or growth Experience with primary research, surveys, or qualitative data analysis What this internship offers: Opportunity to shape content that directly impacts lakhs of students and professionals A chance to bring your academic knowledge into practice and build a strong portfolio Recommendation letters, mentorship, and long-term collaboration possibilities for high performers About the Founder – Bhaskar Singhania IIT Kharagpur alumnus Former Chief of Staff at Metadome.ai — helped raise $11M+, joined Google & Stanford Accelerators Built 15+ digital products for HUL, Zepto, Titan, and others Works with multiple startups as a shadow founder guiding their 0-to-1 journey Public speaker at forums like Govt. of Rajasthan, Masters' Union, Favcy Venture Builders, Techno Billion AI Has coached over 600 students and professionals Writer and performer at open mics across India Take care…. and paani peete rahna :)

You will be part of a Physical Design / Timing Closure team for projects with GHz frequency range and cutting-edge technologies. Your primary responsibility will involve developing timing constraints for full chip or block level designs. Additionally, you will be accountable for STA signoff for complex multi-clock, multi-voltage SoCs. Your role will entail Synthesis, Timing Analysis (STA), and Clock Tree Synthesis (CTS) at Full Chip or block level, particularly focusing on Lower tech nodes below 14nm. To excel in this role, you should hold a B. Tech. / M. Tech. degree with 4-10 years of experience in Synthesis and STA. Your expertise should extend to the synthesis of complex SoCs at block/top levels and crafting timing constraints for intricate designs featuring multiple clocks and voltage domains. Previous experience in pre and post-layout timing analysis and proficiently resolving associated issues is crucial. Moreover, you should possess hands-on experience in post-layout timing closure for multiple tape outs, encompassing timing Engineering Change Orders (ECOs) and STA signoff. Demonstrated proficiency in developing I/O constraints for various Industry standard protocols such as DDR1/2/3, SDR, LPDDR, Flash, SPIs, Ethernet, USBHS, USBFS, JTAG, Display, among others, is highly desirable. Your technical skills should extend to working on technology nodes like 28nm, 20nm, 14nm, and 10nm. A good understanding of Electronic Design Automation (EDA) tools like RC, DC, PT, and PTSI is essential. Furthermore, your role may involve formal verification of RTL-to-netlist and netlist-to-netlist with Design-for-Testability (DFT) constraints. A solid grasp of VLSI processes, device characteristics, deep submicron parasitic effects, crosstalk effects, etc., is expected. Proficiency in TCL and Perl scripting will be advantageous to perform the tasks effectively. Overall, as an STA Engineer specializing in Timing Closure and Synthesis, you will play a crucial role in ensuring the successful completion of projects involving advanced technologies and stringent timing requirements.,

As an RTL Design Engineer at Google, you will utilize your expertise in designing RTL digital logic using System Verilog for FPGA/Application-Specific Integrated Circuit (ASIC). Your role will involve scripting in languages such as Perl or Python, as well as focusing on area, power, and performance optimization. Ideally, you hold a Master's degree or PhD in Electrical Engineering, Computer Science, or possess equivalent practical experience. Experience in designing and developing security blocks or crypto blocks will be beneficial for this position. Join a diverse team at Google that is dedicated to pushing boundaries and creating custom silicon solutions for the future of direct-to-consumer products. Your contributions will drive innovation behind globally loved products, shaping the next generation of hardware experiences with a focus on performance, efficiency, and integration. In this role, you will be responsible for Register-Transfer Level (RTL) design development of security IP and subsystems. This includes tasks such as Micro architecture, RTL coding, UPF definition, constraints, IP release flows, Power Performance Area (PPA) optimizations, test planning collaboration, coverage reviews, and closure to ensure high-quality and optimized security designs. At Google, our mission is to organize the world's information and make it universally accessible and useful. Our team combines Google AI, Software, and Hardware to create radically helpful experiences, researching, designing, and developing new technologies and hardware to enhance computing speed, seamlessness, and power for the betterment of people's lives. Your responsibilities will include participating in test planning and coverage analysis, developing RTL implementations meeting power, performance, and area goals, engaging in synthesis, timing/power closure, FPGA and silicon bring-up, Verilog/SystemVerilog RTL coding, functional and performance simulation debugging, as well as conducting Lint/CDC/FV/UPF checks. Additionally, you will create tools and scripts for task automation and progress tracking.,

Search by Keyword Search by Location Show More Options Loading... Location All Select How Often (in Days) To Receive An Alert: Create Alert Select How Often (in Days) To Receive An Alert: Apply Now » Apply Now Start applying with LinkedIn Please wait... Title: Senior Manager - Peptide Production Date: Jul 11, 2025 Location: Ahmednagar - Block 4 Company: Sun Pharmaceutical Industries Ltd Title: Manager / Sr. Manager – Production (Peptide Block) Business Unit: API : Peptide Job Grade G10 / G9B Location : Ahmednagar, M.H. Key Responsibilities At Sun Pharma, we commit to helping you “ Create your own sunshine ”— by fostering an environment where you grow at every step, take charge of your journey and thrive in a supportive community. Are You Ready to Create Your Own Sunshine? As you enter the Sun Pharma world, you’ll find yourself becoming ‘Better every day’ through continuous progress. Exhibit self-drive as you ‘Take charge’ and lead with confidence. Additionally, demonstrate a collaborative spirit, knowing that we ‘Thrive together’ and support each other’s journeys.” Job Profile- To plan and execute peptide manufacturing activities as per the schedule and Budget by optimum utilization of plant capacity To ensure the sustainable quality production with optimum utilization of plant capacity. Monitoring and reduction in process TRT, Cleaning TRT, number of preps per batch on Prep HPLC, Improve yields. Improve the process of Synthesis & Analytical Section. Co-ordinate with Purchase, Planning department to deliver the goods in time. To ensure every day interaction with each department for smooth functioning Compliance of waste water disposal as per IN-HOUSE policy To ensure grooming of disciplined workforce and staff to meet the planned growth charts. Developing different innovative practices to increase productivities and up gradation of work culture. To maintain Good Documentation Practices and Good Laboratory Practices Review of batch process record, Standard Operating procedure and cGMP documents Investigation of Deviation, Change Control & OOS Implementation & follow all safety instruction & practices Travel Estimate Low Job Requirements Educational Qualification M.Sc. (Chemistry) / B.E. (Chemical) / B.Tech (Chemical) Experience 15-20 yrs experience in Peptide API plant Your Success Matters to Us At Sun Pharma, your success and well-being are our top priorities! We provide robust benefits and opportunities to foster personal and professional growth. Join us at Sun Pharma, where every day is an opportunity to grow, collaborate, and make a lasting impact. Let’s create a brighter future together! Disclaimer: The preceding job description has been designed to indicate the general nature and level of work performed by employee within this classification. It is not designed to contain or be interpreted as a comprehensive inventory of all duties, responsibilities, and qualifications required of employees as assigned to this job. Nothing herein shall preclude the employer from changing these duties from time to time and assigning comparable duties or other duties commensurate with the experience and background of incumbent(s). Apply Now » Apply Now Start applying with LinkedIn Please wait...

Company Description SMART Lab was established in 2013 under the supervision of Prof. Somaditya Sen of the Physics Department at IIT Indore. It is part of the department and specializes in experimental condensed matter physics. focusing on Oxide materials. Role Description  I am inviting long-term (at least 6 months) interns (graduated with an MSc in Physics or Electronics) to gain experience in various experimental condensed matter physics fields. These interns will be in learning mode as volunteers without expectation of salary. This is an unpaid, experiential internship in experimental condensed matter physics at the SMART Lab, IIT Indore. The intern will be involved in day-to-day tasks such as assisting with experimental setups, data collection and analysis, literature reviews, and collaborating with researchers. The position is on-site and is located in Indore. Qualifications Knowledge in Experimental Condensed Matter Physics and a strong foundation in fundamental physics Skills in data collection, data analysis, and use of laboratory equipment Capacity to conduct literature reviews and report findings Excellent problem-solving and analytical skills Strong written and verbal communication skills Ability to work collaboratively with a team of researchers Enthusiasm for hands-on research and experimental work Currently enrolled in a relevant undergraduate or postgraduate program The following subjects can be a guideline to find what can be achievable in my laboratory: 1. Sol-gel synthesis and characterization of ferroelectric and multiferroic materials 2. Thin film deposition of simple oxide materials and exploring preliminary devices 3. Dielectric resonator antennas using composites of polymers and ferroelectric materials 4. Green synthesis of simple and doped oxides for antimicrobial, cell culture, and wound-healing properties. 5. Electronic and specialized lab equipment development

About CEGIS Foundation Centre for Effective Governance of Indian States (CEGIS) aims to improve lives by helping Indian state governments deliver better development outcomes. We work with the state governments of India to enable a transformative improvement in state functioning in the coming decade. Informed by cutting-edge research and evidence, as well as a practical orientation toward implementable ideas, CEGIS aims to provide Indian states with both an analytical roadmap for governance and expenditure reforms and strategic implementation support to deliver on this vision. The organisation has a sharp focus on improving the quality of public expenditure, personnel, and data and, through it, develops templates for achieving a step-function improvement in development outcomes across India. We strive to produce high-quality economic analysis to inform state-level policy-making and work closely with top bureaucratic leadership in states. CEGIS possesses world-leading technical expertise across teams and a deep understanding of service delivery in India. Today, CEGIS works across 6+ Indian states and 15+ projects across sectors - Education, Health and Agriculture. Some central government agencies we work with are NITI Aayog, Capacity Building Commission, Karmayogi Bharat, and Intellectual Property Office. About Human Resource Unit (HRU) CEGIS intends to collaborate with the Government of Odisha in establishing a Human Resource Unit (HRU). The Human Resource Unit (HRU) shall function as a dedicated think tank to enhance and strengthen HR practices across the state government. Its primary mandate shall be to drive comprehensive and integrated HR management within the state, focusing on recruitment, learning and development, and performance management systems. The HRU shall provide strategic direction and support to HR teams or Capacity Building Units (CBUs) across various line departments and ensure their alignment with state and national priorities, fostering a well-rounded HR ecosystem within the state government. HRU will be responsible for institutionalising the strategic work done by CEGIS in pioneering a competency-driven approach to Capacity Building. By prioritising competencies, CEGIS aims to bring clarity to the work done by officials and empower them to achieve better results. This translates to a shift in accountability – from simply following processes to delivering tangible outcomes. Position Summary We are seeking an experienced and dynamic Program Manager – Learning & Development (L&D) to lead the design, development, and implementation of capacity-building solutions that address competency gaps among public officials in the state government. This role is pivotal to translating the HRU’s vision into actionable L&D programs, piloting, operationalising, and scaling them across departments, while ensuring strong alignment with Mission Karmayogi and the mandates of the Capacity Building Commission (CBC). The ideal candidate will have a deep understanding of competency-based approaches in learning and development and demonstrate advanced research and synthesis capabilities to translate field insights into high-impact interventions. With a proven track record in project management, stakeholder coordination, and implementation, the candidate should be driven by a commitment to strengthening public service capacity and enabling systemic reform in government HR practices. Roles and Responsibilities Design and Implementation of Competency-Based L&D Solutions Lead the design and rollout of competency-based L&D interventions, including training needs assessments, and curated learning pathways for key government positions. Coordinate and support extensive role-competency mapping exercises to inform the creation of work allocation orders Support the design and implementation of competency-based training needs assessments, ensuring quality control, administering assessments, and analysing results Oversee the mapping, curation, quality assurance, and onboarding of competency-based training interventions/courses and collaborate with institutional partners for sourcing high-quality L&D content. Work closely with Administrative Training Institutes (ATIs) and other training partners to align delivery mechanisms with competency needs and institutional mandates, while helping them streamline their processes to enhance quality and compliance. Promote a culture of continuous learning by integrating diverse methodologies, e-learning, instructor-led sessions, workshops, job rotations, performance support interventions, etc. Research, Synthesis, and Knowledge Management Conducting secondary research regarding competencies and learning opportunities associated with the identified positions Conduct primary research (interviews, FGDs, surveys) with public officials to map roles, responsibilities, activities, and associated competencies. Translate field insights and research into structured knowledge products such as frameworks, facilitation guides, reports, presentations, and policy briefs for internal and external dissemination. Maintain a robust system of documentation to ensure institutional memory and shareable learnings from the program's implementation. Project and Team Management Maintain project trackers, documentation systems, and communication plans to ensure clarity, alignment, and accountability across workstreams. Support the Senior Program Manager in tracking project milestones, identifying risks and dependencies, and reporting progress to CEGIS and state leadership. Lead and mentor a team of associates, providing work planning, quality control, and developmental support to ensure timely, high-quality delivery. Inform iterative improvement of L&D solutions by relaying field insights to design and technology teams. Stay abreast of emerging trends in adult learning, learning technologies, and public sector capacity building to inform solution refinement. Actively participate in internal capacity-building workshops to enhance your practice in L&D implementation aligned with organisational standards. Stakeholder Engagement and Coordination Manage relationships with key government partners, training institutions, and internal teams to ensure alignment on program design and implementation. Facilitate regular review meetings, capacity-building workshops, and structured consultations with CBUs and other stakeholders across departments. Maintain a regular communication cadence with external stakeholders, prepare discussion notes, and ensure timely sharing of project updates, reports and deliverables. Ensure cross-functional collaboration with internal teams to gather inputs, avoid duplication, and maintain consistency across tools and communication artefacts Coordinate with colleagues working on performance management systems to feed in relevant field insights, identified competency gaps, and departmental needs, ensuring learning solutions and performance frameworks are mutually reinforcing. Education and Experience Degree in Human Resources, Business Administration, Management, Public Policy, Social Work or a related field. 6 to 8 years of experience in a high-performing environment, focusing on human resource management, capacity building or project management, preferably within the Indian government ecosystem Prior Experience of working on complex multi-stakeholder projects, especially with governments, donors, and research organisations Required Competencies The competencies required to perform the above-mentioned roles and responsibilities are as follows: Functional Competencies Learning and Development Design: Applies user-centric insights to design, test, and improve competency-based learning pathways and builds end-to-end L&D ecosystems Research and Analytical Acumen: Synthesises qualitative and quantitative insights to inform decisions Project Management: Skilled in planning, resource allocation, risk management, documentation and delivering results aligned with organisational objectives Writing and Documentation: Creates high-quality reports, frameworks, and learning materials with clarity and structure. Professional and Leadership Competencies Ownership: Exhibits self-motivation and proactivity in managing multiple tasks, timelines, and responsibilities, ensuring accountability for high-quality results. Learning Orientation: Seeks feedback, reflects on gaps, and continuously works to improve effectiveness. Relationship Building: Builds trust with stakeholders and fosters collaboration and alignment through clear, consistent engagement. Note The role will be based out of Bhubaneswar Remuneration will be competitive with Indian philanthropy and social sector pay scales, depending on the candidate’s experience levels. CEGIS is an equal employment opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against based on race, colour, sex, sexual orientation, gender identity, religion, disability, age, genetic information, veteran status, ancestry, or national or ethnic origin. Pre-reads for the application process Please go through the following materials before sending in your application. CEGIS website CLOP Initiative website Karmayogi Bharat website Concept note on CEGIS Chapter 5 of Accelerating India's Development: A State-Led Roadmap for Effective Governance by Prof. Karthik Muralidharan You are also encouraged to read more of Prof. Karthik Muralidharan’s work here .

Job Description You are a strategic thinker passionate about driving solutions in Business analysis . You have found the right team As a Business Analyst within our team, you will implement projects using standard Agile methodologies. You will collaborate with Operations, Middle Office, Finance, Technology, and Senior Management to develop business requirements, procedures, and processes. This role offers the chance to work alongside Business Architects to create and deliver innovative solutions for complex business challenges, while applying change management strategies to enhance operating models and optimize operational processes. Job Responsibilities Implement projects for the CDD, LDD, and Workflow Transformation Product Development Management group using standard Agile project delivery methodologies. Conduct data analysis, data collection, and synthesis to translate into empirical solutions or evidence that optimize project reporting. Collaborate with other Product Delivery Teams to manage dependencies across applications. Proactively communicate global and local business requirements/priorities and project status to key stakeholders; solicit feedback and obtain sign-off on project documentation. Apply change management approaches and methodologies to promote change to operating models, standardize technologies, and streamline operational processes. Work with the central Release Management team to deliver projects according to release timelines and support technology with production releases. Required qualifications, capabilities, and skills 5 years+ experience in a business analysis role in the banking/financial industry and Team Management experience Experience modelling business processes using a variety of tools and techniques including UML and Data modelling. Widespread experience of working in an agile delivery model, and writing User Stories using industry standard techniques The ability to act as liaison conveying information needs of the business to IT and data constraints to the business Excellent communication, interpersonal and presentation skills Strong analytical and problem-solving skills Experience with JIRA as well as technical skills e.g., Microsoft Office Suite, excel, PowerPoint Experience working with decision modeling tools e.g. Signavio - DMN About Us JPMorganChase, one of the oldest financial institutions, offers innovative financial solutions to millions of consumers, small businesses and many of the world’s most prominent corporate, institutional and government clients under the J.P. Morgan and Chase brands. Our history spans over 200 years and today we are a leader in investment banking, consumer and small business banking, commercial banking, financial transaction processing and asset management. We recognize that our people are our strength and the diverse talents they bring to our global workforce are directly linked to our success. We are an equal opportunity employer and place a high value on diversity and inclusion at our company. We do not discriminate on the basis of any protected attribute, including race, religion, color, national origin, gender, sexual orientation, gender identity, gender expression, age, marital or veteran status, pregnancy or disability, or any other basis protected under applicable law. We also make reasonable accommodations for applicants’ and employees’ religious practices and beliefs, as well as mental health or physical disability needs. Visit our FAQs for more information about requesting an accommodation. About The Team J.P. Morgan’s Commercial & Investment Bank is a global leader across banking, markets, securities services and payments. Corporations, governments and institutions throughout the world entrust us with their business in more than 100 countries. The Commercial & Investment Bank provides strategic advice, raises capital, manages risk and extends liquidity in markets around the world.

Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web-scale and service provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, caf, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Write micro-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements. Contribute to full chip integration and timing methodology/analysis. Develop and analyze functional coverage. Help define, evolve, and support our design methodology. Collaborate with the verification team to address design bugs and close code coverage. Work closely with the physical design team to close design timing and place-and-route issues. Triage, debug, and root cause simulation, software bring-up, and customer failures Perform diagnostic and post-silicon validation tests in the lab Minimum Qualifications: Bachelor's Degree / Master's Degreein Electrical or Computer Engineering with 7+ years of ASIC design. Prior experience working with Verilog or System Verilog programming skills Experience with simulators/synthesis/static timing constraints and related tools (e.g., VCS, DC, PrimeTime) Experience with debugging and verification methodologies Preferred Qualifications: Understanding of Networking technologies and concepts Scripting experience (Python, Perl, TCL, shell programming) Experience with formal verification tools Experience with emulation

Responsibilities: * Develop RTL designs using Verilog, Synthesis with SpyGlass & LINT checks. * Collaborate on ASIC projects from concept to delivery. * Ensure design compliance with industry standards. Apply & Share to mansoor@hisoltech.com

1 Perform the electrical calculations and prepares the designs and BOM in SAP and creates the documentation. 2 Make the technical offers for the low voltage 3Ph Induction motors for various applications and with stringent customer specications. 3 Has thorough knowledge in design of three phase induction motor the preferably has an experience guiding the team members to achieve the KPIs 4 Has basic knowledge of the National and international standards governing motors. 5 Identify and select the components based on given specications, support to SP and manufacturing. 6 Work on cost reduction with innovative solutions to minimize the cost of offerings/product. Analyze localization requirements and designs/adapts products and solutions accordingly. 7 Support to manufacturing to solve the technical issues. 8 Communication with internal partners such as execution team, Quotation support team, sales team and external partners such as vendor, customer, consultant, etc.

🚨 Opportunity Alert – Junior Research Fellow (JRF) Position Available 🚨 We are inviting applications for one temporary position of Junior Research Fellow (JRF) for a consultancy-funded project titled: 🔬 " Efficient CO₂ Removal from Biogas Using Pressure Swing Adsorption (PSA) with MOFs-Impregnated Zeolites " 📍 Location: Kalavakkam 🗓️ Duration: 3 months 💰 Stipend: ₹20,000 per month (fixed) 📌 Eligibility Criteria: M.E./M.Tech./M.S. (By Research) in Chemical Engineering, Environmental Engineering, Applied Electronics, Materials Science, or related disciplines Ph.D . candidates may also apply Preference to candidates with experience in gas adsorption, PSA, MOF/zeolite synthesis, or gas purification GATE / NET qualified candidates or those selected via DST/DBT/DRDO/ISRO/ICMR schemes will be prioritized 📧 Apply by: 15th July 2025 Send your resume to: 🔹 senthilkumarp@pondiuni.ac.in 🔹 senthilrathib@ssn.edu.in Shortlisted candidates will be informed of the interview date via email (mode: online or offline). Final selection results will be shared within 3 working days post-interview. 📢 Kindly share with your network or any eligible candidates who may benefit! #JRF #ResearchOpportunity #ChemicalEngineering #EnvironmentalEngineering #GasPurification #MOFs #Zeolites #PSA #ResearchJobs #ConsultancyProject #SSNCollege #PondicherryUniversity

Front End Integration of Digital, Analog IPs and Subsystems to build complete SoC Netlist. IOMUX and Padring generation and integration. Design of SoC Specific Logic IPs. Perform quality checks like Lint and CDC at SoC level. Implement all feedback from Verification and Physical Design teams for all changes required. Develop SoC level Testbench for RTL and Postlayout Simulations. Collaborate with ATE and Test teams and deliver test patterns for Probe and Package level testing. Support Verification and Post-Silicon Debugging of issues. Experience and Skills Required 10-15 Years Experience in front end integration for complex SoCs. Strong scripting skills. Hands on experience in RTL coding, Lint, CDC. Experience in developing IOMUX and Padring. Expertise in developing testbench for SoC to support directed and random verification. Experienced with working with ATE teams for delivery of test patterns. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

Define SoC Function, Performance requirements. Define SoC Connectivity, Interconnectivity, Memory Map, Interrupt Map, Pin Muxing, Power Management, SoC Clock Distribution, SoC Debug. Define Data Flow and Use Cases. Maintain SoC Die Size and Power Estimates and ensure competitive PPA. Close collaboration with SoC Design and Verification Teams. Experience and Skills Required 10 to 15 years of experience in SoC / IP Design, IP Architecture SoC Architecture. Experience with ARM Microcontrollers, Memory and Interconnect technologies. Hands-on experience with defining Clocking Strategy, Power Management and Low Power strategies. Must be familiar with various Connectivity standards, SoC Security. Hands on experience with IP Design / Micro Architecture required. Experience with Signal Processing IP is preferred. Good Understanding of SoC Front End and Back End Design Flow, SoC Verification and Validation flows. Must have deep understanding Software requirements - Secure Boot, RTOS, Device Drivers. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

We help the world run better At SAP, we enable you to bring out your best. Our company culture is focused on collaboration and a shared passion to help the world run better. How? We focus every day on building the foundation for tomorrow and creating a workplace that embraces differences, values flexibility, and is aligned to our purpose-driven and future-focused work. We offer a highly collaborative, caring team environment with a strong focus on learning and development, recognition for your individual contributions, and a variety of benefit options for you to choose from. What You’ll Do Because user experience is of vital importance to the success of all SAP products, SAP constantly evaluates and improves its products to ensure that SAP users get the best user experience possible. User Experience at SAP covers all activities from conception and design of future SAP products to maintenance and improvements of existing applications. Expectations and Tasks You are a strong interaction designer with empathy for the end user You feel responsible for your work and accompany your designs throughout the design driven development process Gathering end-user requirements by organizing, executing, and moderating end-user site visits, focus groups and user days including collection and synthesis of results. Development of user interface designs using various prototyping techniques and documented in UI specifications Verification of designs through reviews, validations and formal usability testing with end users You have a good technical understanding (preferably in HTML5, CSS3 and JavaScript) to discuss design alternatives and solutions with developers You are offering design support and consulting for the development teams What You Bring University degree in Interaction Design, Industrial Design, Human-Computer Interaction or comparable fields is required 12+ years of overall experience with relevant experience in Interaction Design Demonstrated ability to design complex experiences for web applications and mobile solutions for enterprise platforms Strong in interaction design, identifying user stories, creating user flows and low-to-high fidelity designs Experience in a fast-paced software development environment with an ability to execute against aggressive timelines Strong communication skills and the ability to effectively engage and convey ideas to cross-functional technical and non-technical teams Excellent written and verbal communication skills in English Creative and analytical thinking is required Demonstrated ability to learn complex technology. Must be a solid team player in international teams with good writing, presentation and time management skills. Meet Your Team As a User Experience Design Expert in SAP S/4HANA Cloud you work together with a highly motivated and creative team of international interaction designers, user researchers and visual designers. Your team is responsible to drive all application design activities for SAP S/4HANA Cloud Private Edition. You will closely collaborate with Product Managers and Engineering to enable users to do their business in the most effective and efficient manner. #UXT4PF Bring out your best SAP innovations help more than four hundred thousand customers worldwide work together more efficiently and use business insight more effectively. Originally known for leadership in enterprise resource planning (ERP) software, SAP has evolved to become a market leader in end-to-end business application software and related services for database, analytics, intelligent technologies, and experience management. As a cloud company with two hundred million users and more than one hundred thousand employees worldwide, we are purpose-driven and future-focused, with a highly collaborative team ethic and commitment to personal development. Whether connecting global industries, people, or platforms, we help ensure every challenge gets the solution it deserves. At SAP, you can bring out your best. We win with inclusion SAP’s culture of inclusion, focus on health and well-being, and flexible working models help ensure that everyone – regardless of background – feels included and can run at their best. At SAP, we believe we are made stronger by the unique capabilities and qualities that each person brings to our company, and we invest in our employees to inspire confidence and help everyone realize their full potential. We ultimately believe in unleashing all talent and creating a better and more equitable world. SAP is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to the values of Equal Employment Opportunity and provide accessibility accommodations to applicants with physical and/or mental disabilities. If you are interested in applying for employment with SAP and are in need of accommodation or special assistance to navigate our website or to complete your application, please send an e-mail with your request to Recruiting Operations Team: Careers@sap.com For SAP employees: Only permanent roles are eligible for the SAP Employee Referral Program, according to the eligibility rules set in the SAP Referral Policy. Specific conditions may apply for roles in Vocational Training. EOE AA M/F/Vet/Disability Qualified applicants will receive consideration for employment without regard to their age, race, religion, national origin, ethnicity, age, gender (including pregnancy, childbirth, et al), sexual orientation, gender identity or expression, protected veteran status, or disability. Successful candidates might be required to undergo a background verification with an external vendor. Requisition ID: 428132 | Work Area: Software-User Experience | Expected Travel: 0 - 10% | Career Status: Professional | Employment Type: Regular Full Time | Additional Locations: .

Title Manager / Sr. Manager – Production (Peptide Block) Business Unit API : Peptide Job Grade G10 / G9B Location : Ahmednagar, M.H. Key Responsibilities At Sun Pharma, we commit to helping you “ Create your own sunshine ”— by fostering an environment where you grow at every step, take charge of your journey and thrive in a supportive community. Are You Ready to Create Your Own Sunshine? As you enter the Sun Pharma world, you’ll find yourself becoming ‘Better every day’ through continuous progress. Exhibit self-drive as you ‘Take charge’ and lead with confidence. Additionally, demonstrate a collaborative spirit, knowing that we ‘Thrive together’ and support each other’s journeys.” Job Profile- To plan and execute peptide manufacturing activities as per the schedule and Budget by optimum utilization of plant capacity To ensure the sustainable quality production with optimum utilization of plant capacity. Monitoring and reduction in process TRT, Cleaning TRT, number of preps per batch on Prep HPLC, Improve yields. Improve the process of Synthesis & Analytical Section. Co-ordinate with Purchase, Planning department to deliver the goods in time. To ensure every day interaction with each department for smooth functioning Compliance of waste water disposal as per IN-HOUSE policy To ensure grooming of disciplined workforce and staff to meet the planned growth charts. Developing different innovative practices to increase productivities and up gradation of work culture. To maintain Good Documentation Practices and Good Laboratory Practices Review of batch process record, Standard Operating procedure and cGMP documents Investigation of Deviation, Change Control & OOS Implementation & follow all safety instruction & practices Travel Estimate Low Job Requirements Educational Qualification M.Sc. (Chemistry) / B.E. (Chemical) / B.Tech (Chemical) Experience 15-20 yrs experience in Peptide API plant Your Success Matters to Us At Sun Pharma, your success and well-being are our top priorities! We provide robust benefits and opportunities to foster personal and professional growth. Join us at Sun Pharma, where every day is an opportunity to grow, collaborate, and make a lasting impact. Let’s create a brighter future together! Disclaimer: The preceding job description has been designed to indicate the general nature and level of work performed by employee within this classification. It is not designed to contain or be interpreted as a comprehensive inventory of all duties, responsibilities, and qualifications required of employees as assigned to this job. Nothing herein shall preclude the employer from changing these duties from time to time and assigning comparable duties or other duties commensurate with the experience and background of incumbent(s).

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for Mobile, Compute and IOT market space. Responsibilities: Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification. Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward Work closely with RTL design, Synthesis, low power, Thermal, Power analysis and Power estimation teams to optimize Performance, Power and Area(PPA) Tabulate metrics results for analysis comparison Develop Place & Route recipes for optimal PPA Minimum Qualifications: 6 -15 years of High Performance core Place & Route and ASIC design Implementation work experience (A Must) Preferred Qualifications Extensive experience in Place & Route with FC or Innovus is an absolute must Complete ASIC flow with low power, performance and area optimization techniques Experience with STA using Primetime and/or Tempus is required Proficient in constraint generation and validation Experience of multiple power domain implementation with complex UPF/CPF definition required Formal verification experience (Formality/Conformal) Perl/Tcl, Python, C++ skills are needed Strong problem solving and ASIC development/debugging skills Experience with CPU micro-architecture and their critical path Low power implementation techniques experience High speed CPU implementation Clock Tree Implementation Techniques for High Speed Design Implementation are required Exposure to Constraint management tool and Verilog coding experience Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3065070

At PwC, our people in data and analytics focus on leveraging data to drive insights and make informed business decisions. They utilise advanced analytics techniques to help clients optimise their operations and achieve their strategic goals. In data analysis at PwC, you will focus on utilising advanced analytical techniques to extract insights from large datasets and drive data-driven decision-making. You will leverage skills in data manipulation, visualisation, and statistical modelling to support clients in solving complex business problems. PwC US - Acceleration Center is seeking a highly skilled MLOps/LLMOps Engineer who will play a critical role in the deployment, scaling, and maintenance of Generative AI models. This position involves close collaboration with data scientists, ML/GenAI engineers, and DevOps teams to ensure seamless integration and operation of GenAI models within production environments at PwC as well as our clients. The ideal candidate will have a strong background in MLOps practices, along with experience and interest in Generative AI technologies. Years of Experience: Candidates with 4+ years of hands on experience Core Qualifications 3+ years of hands-on experience developing and deploying AI models in production environments with 1 year of experience in developing proofs of concept and prototypes Strong background in software development, with experience in building and maintaining scalable, distributed systems Strong programming skills in languages like Python and familiarity in ML frameworks and libraries (e.g., TensorFlow, PyTorch) Knowledge of containerization and orchestration tools like Docker and Kubernetes. Familiarity with cloud platforms (AWS, GCP, Azure) and their ML/AI service offerings Experience with continuous integration and delivery tools such as Jenkins, GitLab CI/CD, or CircleCI. Experience with infrastructure as code tools like Terraform or CloudFormation. Technical Skills Must to Have: Proficiency with MLOps tools such as MLflow, Kubeflow, Airflow, or similar for managing machine learning workflows and lifecycle. Practical understanding of generative AI frameworks (e.g., HuggingFace Transformers, OpenAI GPT, DALL-E) Expertise in containerization technologies like Docker and orchestration tools such as Kubernetes for scalable model deployment. Expertise in MLOps and LLMOps practices, including CI/CD for ML models Strong knowledge of one or more cloud-based AI services (e.g., AWS SageMaker, Azure ML, Google Vertex AI) Nice To Have Experience with advanced GenAI applications such as natural language generation, image synthesis, and creative AI. Familiarity with experiment tracking and model registry tools. Knowledge of high-performance computing and parallel processing techniques. Contributions to open-source MLOps or GenAI projects. Key Responsibilities Develop and implement MLOps strategies tailored for Generative AI models to ensure robustness, scalability, and reliability. Design and manage CI/CD pipelines specialized for ML workflows, including the deployment of generative models such as GANs, VAEs, and Transformers. Monitor and optimize the performance of AI models in production, employing tools and techniques for continuous validation, retraining, and A/B testing. Collaborate with data scientists and ML researchers to understand model requirements and translate them into scalable operational frameworks. Implement best practices for version control, containerization, infrastructure automation, and orchestration using industry-standard tools (e.g., Docker, Kubernetes). Ensure compliance with data privacy regulations and company policies during model deployment and operation. Troubleshoot and resolve issues related to ML model serving, data anomalies, and infrastructure performance. Stay up-to-date with the latest developments in MLOps and Generative AI, bringing innovative solutions to enhance our AI capabilities. Project Delivery Design and implement scalable and reliable deployment pipelines for ML/GenAI models to move them from development to production environments Ensure models are deployed with appropriate versioning and rollback mechanisms to maintain stability and ease of updates. Oversee the cloud infrastructure setup, automated data ingestion pipelines, ensuring they meets the needs of GenAI workloads in terms of computation power, storage, and network requirements. Create detailed documentation for deployment pipelines, monitoring setups, and operational procedures to ensure transparency and ease of maintenance. Actively participate in retrospectives to identify areas for improvement in the deployment process. Client Engagement Collaborate with clients to understand their business needs, goals, and specific requirements for Generative AI solutions. Collaborate with solution architects to design ML/LLMOps that meet client needs Present technical approaches and results to both technical and non-technical stakeholders Conduct training sessions and workshops for client teams to help them understand, operate, and maintain the deployed AI models. Create comprehensive documentation and user guides to assist clients in managing and leveraging the Generative AI solutions effectively. Innovation And Knowledge Sharing Stay updated with the latest trends, research, and advancements in MLOps/LLMOps and Generative AI, and apply this knowledge to improve existing systems and processes. Develop internal tools and frameworks to accelerate ML/GenAI model development and deployment Mentor junior team members on MLOps/LLMOps best practices Contribute to technical blog posts and whitepapers on MLOps/LLMOps Professional And Educational Background Any graduate /BE / B.Tech / MCA / M.Sc / M.E / M.Tech /Master’s Degree /MBA

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Key Responsibilities Lead STA and PNR activities for complex subsystems, ensuring robust timing closure and physical implementation with a focus on power, performance, and area optimization. Develop and refine methodologies for STA and PNR tailored to the unique challenges of large, multi-interface, or mixed-signal subsystems. Drive automation and validation of timing and physical design data across subsystem boundaries. Mentor and guide junior engineers, fostering technical growth and knowledge sharing within subsystem teams. Collaborate cross-functionally to resolve design, timing, and physical implementation challenges specific to complex subsystem integration. Exhibit excellent communication skills to present technical solutions and lead discussions with internal teams and customers, especially regarding subsystem-level trade-offs and integration Qualifications 10+ years of experience in Static Timing Analysis (STA) and Place and Route (PNR) for complex subsystems within ASIC/SoC design, including advanced technology nodes (7nm, or below). Demonstrated expertise in STA tools (e.g., Synopsys PrimeTime, Cadence Tempus) and PNR tools (e.g., Synopsys ICC2, Cadence Innovus) applied to large, multi-block or hierarchical subsystems. Proven track record in timing closure, floorplanning, placement, clock tree synthesis, routing, and physical verification for high-complexity subsystems. Proficient in scripting languages (Tcl, Perl, Python) for automating STA and PNR flows across multiple subsystem blocks. Deep understanding of SoC design flows, with experience collaborating across frontend, physical design, and verification teams to integrate complex subsystems. Experience with IP collateral generation and quality assurance for timing and physical design at the subsystem level preferred. Background high-speed interfaces, or mixed-signal SoC subsystems Additional Information Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com. Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas Electronics Corporation empowers a safer, smarter and more sustainable future where technology helps make our lives easier. The leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at www.renesas.com. Renesas’ mission, To Make Our Lives Easier, is underpinned by our company culture, TAGIE. TAGIE stands for Transparent, Agile, Global, Innovative and Entrepreneurial. Our goal is to embed this unique culture in everything we do to succeed as a company and create trust with our diverse colleagues, customers and stakeholders. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.