WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER ( SOC Low Power-RTL lead) The Role As a member of the Client Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. The Person If you have a knack for power saving techniques, including clock gating and UPF-based power gating, this role is for you. You will be responsible for generating Power spec, UPF, performing quality checks of power-gated digital designs, execute the SoC RTL integration and working collaboratively with the IP team. Key Responsibilities Understanding of IP/SS/SoC Power Management(PM) techniques. Converting PM Specification to UPF Perform low power quality checks VSI/VCLP Debugging experience on Power aware simulation (NLP sim) Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC Work in partnership with SOC teams to support the IP at SOC level, including UPF, verification, Power sequence, and post-silicon bring-up Need to understand clocking, reset and soc top level topology changes to make connectivity as per the topology across Ips. Need to understand the requirements of power domain(power architecture) to write UPFs. Collaborate with architects, DV and PD engineers to understand the new features to group the logic into tiles based on functionality as well as PD FP requirements. Must have been expert with RTL coding and other Debug capabilities. Preferred Experience 7+ years full-time experience in IP/SOC hardware design Experience doing ECOs Experience with power aware CDC runs Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs Experience with RTL Quality Checks - Verilog lint tools (Spyglass), verilog simulation tools (VCS) and Clock domain crossing (CDC) tools Proficient in IP level ASIC or SoC level RTL integration work and verification Good understanding and hands-on experience in the Timing, UPF, CDC, RDC and other quality check concepts Proficient in debugging RTL code using quality check and simulation tools. Outstanding interaction skills while communicating both written and verbally Ability to work with multi-level functional teams across various geographies Outstanding problem-solving and analytical skills Exposure to leadership or mentorship is an asset. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

Join the leader in entertainment innovation and help us design the future. At Dolby, science meets art, and high tech means more than computer code. As a member of the Dolby team, you’ll see and hear the results of your work everywhere, from movie theaters to smartphones. We continue to revolutionize how people create, deliver, and enjoy entertainment worldwide. To do that, we need the absolute best talent. This is an opportunity to play a key role in Dolby's new R&D Center in Bangalore as a Research Lead in our Advanced Technology Group " ATG ", the research and technology arm of Dolby Labs. With multiple competencies that innovate on technologies in audio, video, AR/VR, gaming, music, broadcast and user-generated content, areas of expertise related to computer science and electrical engineering, such as AI/ML, computer vision, data science & analytics, distributed systems, cloud, edge & mobile computing, natural language processing, social network analysis, and computer graphics are highly relevant to our research. What you’ll do: As a Research Lead within Dolby ATG research, you will focus on three key areas of expertise: State-of the art, cutting edge, hands-on research: As a researcher, you will invent and develop the next generation of AI based multimodal image, audio, and speech technologies. With an in-depth understanding of the latest AI technologies and a good understanding of audio/video technologies, you will explore the applications of AI to the delivery, analysis, and creation of multimedia technologies including video and audio enhancement, analysis, classification, and separation. You will create technologies for the next generation of Dolby’s offerings. Managing, nurturing, and grooming top research talent: You will lead and mentor a group of AI researchers working in the application of AI to multimodal analysis, processing, playback, and enhancement technologies. You will work with your team as a coach and mentor. You are passionate about developing junior, highly talented staff into researchers that work fully independently in a corporate environment. Contribute to developing a dynamic, flexible, transparent, results-oriented and innovative working atmosphere. Technology strategy and direction setting: You will define and lead research initiatives that leverage cross-media intelligence and analytics, invent multimodal machine learning algorithms, and utilize a deep understanding of multimodal perception to develop the next generation of multimedia technologies. Jointly with Dolby’s world-class global research teams, you will set directions, identify projects, and build the next wave of AI based technologies driving Dolby’s cloud and licensing business. You work with ATG technology leaders to co-define projects and assign your staff to global R&D initiatives led by other technology initiative leads. Work jointly with upper management, lead resource and work allocation. You will also work with Dolby’s Business Groups (BG) to bring the research to life in many products, working closely with product managers, program managers, and BG engineering teams worldwide. Education And Desired Experience Ph.D. plus 5-10 years of corporate research experience with a degree in Physics, Electrical Engineering, Mathematics, Computer Science with a strong focus on AI. You are an absolute top expert in AI with a deep and thorough theoretical understanding of the latest state-of the art AI technologies. You have a detailed understanding of all main network architectures, deployment modes, data augmentation and preparation, and theoretical performance analysis of model architectures. Knowledge of NLP and/or multi-modal architectures is highly desired. You have a good understanding of Diffusion, autoregressive, or other generative models. Self-supervised, contrastive learning, auto-encoders. Audio, image, or text applications – Source separation, text-to-speech, music synthesis, image segmentation, image captioning, question answering, language models, etc. Multimodal architectures and algorithms. You have a track record of successfully applying AI technologies to multimodal problems including the combination of audio and video technologies. You have deep knowledge of GPU/CPU implementations, algorithm validation and testing, implementation of ML/AI algorithms. Strong track of inventing, developing and productizing novel AI based technologies in an industrial research environment. Strong publication record, with publications in major machine learning conferences (e.g. NeurIPS, ICLR, ICML, etc.). Strong background in statistical signal processing, decision theory, greedy algorithms, Bayesian modelling, random algorithms, time series, hypothesis testing, classification, clustering, hypothesis testing and multilinear regression analysis. Experience with audio and video processing is a plus. Highly skilled in C/C++, Python, TensorFlow or PyTorch. Experience in managing, guiding and mentoring younger researchers. Team-oriented work ethic and interest to work in cross-continental teams. Excellent communication, collaboration, and presentation skills in English. All official communication regarding employment opportunities at Dolby will come from an official dolby.com email address. We will never request payment as part of the hiring process. If you receive a suspicious message, please verify its authenticity before responding Show more Show less

Role Description Role Proficiency: Ability to e xecute any small to mid size customer project in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor to own any one task of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Independently analyze and complete the assigned task in the defined domain(s) successfully and on-time On time quality delivery approved by the project lead/manager Measures Of Outcomes Quality –verified using relevant metrics by Lead/Manager Timely delivery - verified using relevant metrics by Lead/Manager Reduction in cycle time and cost using innovative approaches Number of trainings attended Number of new projects handled Outputs Expected Quality of the deliverables: Ensure clean delivery of the design and module in-terms of ease in integration at the top level Meet functional spec / design guidelines 100% of the time without any deviation or limitation Documentation of the tasks and work performed Timely Delivery Meeting project timelines as requested by the program manager Support the team lead in intermediate tasks delivery Team Work Participation in team work; supporting team members/lead at the time of need Able to perform additional tasks in-case any team member(s) is not available Innovation & Creativity Automate repeated tasks to save design cycle time as a necessary approach Participation in technical discussion training forum Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice (any one) EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Strong in Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Strong knowledge of Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills Good analytical reasoning and problem-solving skills with attention to details Able to deliver the tasks on-time per quality guidelines and GANTT in every instance. Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present to a level needed to execute the project Knowledge Examples Frontend / Backend / Analog Design:a. Project experience in any of the design by executing any one of – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc.b. Strong understanding of the design flow and methodologies used in designing Understanding of the technical specs and assigned tasks: Understand the assigned tasks and have strong knowledge to execute the project tasks assigned by the client / manager as per shown skill Additional Comments Experience- 4+yrs Analog Layout Candidate should work independently on block level and chip level Analog layout design, coordinating with the circuit designer & the project lead. Candidate should have minimum 3+ years of hands-on experience in Analog layout. Custom layout experience in DAC, ADC, Band gap, Regulators, LDOs etc. Knowledge of finfet or technology exposure to 28nm or below is an added advantage. Full Understanding of IC fabrication and reliability issues. Full familiarity with Cadence-Virtuoso, PVS, ASSURA and Calibre tools. Outstanding written and verbal communication skills. Skills Analog Layout,Finfet,Cadence Virtuoso Show more Show less

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we transform how the world uses information to enrich life for all. The pace is fast, collaboration occurs on a regular basis, and innovation is expected. As a test platform development Engineer within the Non-Volatile Engineering (NVEG) Product Engineer team, you will develop and qualify low-cost in-house engineering test platforms and solve complex problems. This role requires deep understanding of test hardware and software along with NAND, UFS and PCIe protocol knowledge. You will be responsible to enable the PE test infrastructure and test platforms to test, debug and characterizing the NAND component and System products by closely working with the cross functional teams such as Test Engineering and System Integration, ASIC and FW teams and assist Qualification and Ramping of cutting-edge NAND and System Micron products. The candidate's responsibility is to design, develop and debug the VHDL or Verilog based application and have good knowledge of FPGA platform development lifecycle. Key Responsibilities Design, develop, and qualify product engineering test hardware, platforms, test firmware and software for non-volatile memory product bring up and debug. Develop efficient RTL design using Verilog or VHDL for FPGA implementation, ensuring optimal resource utilization. Drive complete FPGA design flow including synthesis, place and route, timing analysis and verification. Implement FPGA designs on hardware platforms using tools like Xilinx Vivado and optimize for performance, area and power and to create test bench and verification scripts. Debug and validate FPGA designs in hardware using tools such as oscilloscopes, logic analyzers, and signal tap. Optimize designs for speed, power, and resource usage based on the specific FPGA platform used. Collaborate with cross-functional teams, including Test Engineering & System Integration, ASIC, FW, Product Engineering and operations, to integrate FPGA designs with other system components. Provide engineering test solutions (HW & SW) for Product Development for NAND/System characterization and Silicon debug capabilities Drive and support new protocol enablement (SCA- Separate Command Address, ONFI, UFS, PCIe) and capability bring up Routinely communicate overall project status to leadership and cross functional product team Provide guidance through debug and resolution of product related issues Qualifications Successful candidates for this exciting opportunity will have: 9+ years of experience in RTL design, synthesis, timing closure, and verification methodologies. Knowledge of storage interface such as High Speed ONFI, UFS, PCIe, etc. Memory and Storage System behavior, architecture and design Working experience on NAND and non-volatile System products Experience with non-volatile memory, logic analyzers, oscilloscopes, and/or Automated Test Equipment (ATE) is preferred Experience working on firmware development using C/C++ and good understanding of scripting languages including TCL, Perl/Python. Familiar working on Unix/Linux terminal. Hands-on experience with hardware bring-up and debugging and Understanding of hardware schematic and layout. Excellent data analysis, problem solving, and decision-making skills Ability to work independently in a very fast paced environment and adapt to change Drive to determine root-cause and provide corrective action for product issues Self-motivated and enthusiastic in a challenging, dynamic environment Demonstrated ability to partner successfully with other groups to build strong peer relationships and achieve the best outcomes for Micron Education Position requires a minimum of a Bachelor's degree in Electrical, Electronics or Computer Engineering Course work in VLSI, semiconductor process is desirable, but not required About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. Show more Show less

About BNP Paribas India Solutions Established in 2005, BNP Paribas India Solutions is a wholly owned subsidiary of BNP Paribas SA, European Union’s leading bank with an international reach. With delivery centers located in Bengaluru, Chennai and Mumbai, we are a 24x7 global delivery center. India Solutions services three business lines: Corporate and Institutional Banking, Investment Solutions and Retail Banking for BNP Paribas across the Group. Driving innovation and growth, we are harnessing the potential of over 10000 employees, to provide support and develop best-in-class solutions. About BNP Paribas Group BNP Paribas is the European Union’s leading bank and key player in international banking. It operates in 65 countries and has nearly 185,000 employees, including more than 145,000 in Europe. The Group has key positions in its three main fields of activity: Commercial, Personal Banking & Services for the Group’s commercial & personal banking and several specialised businesses including BNP Paribas Personal Finance and Arval; Investment & Protection Services for savings, investment, and protection solutions; and Corporate & Institutional Banking, focused on corporate and institutional clients. Based on its strong diversified and integrated model, the Group helps all its clients (individuals, community associations, entrepreneurs, SMEs, corporates and institutional clients) to realize their projects through solutions spanning financing, investment, savings and protection insurance. In Europe, BNP Paribas has four domestic markets: Belgium, France, Italy, and Luxembourg. The Group is rolling out its integrated commercial & personal banking model across several Mediterranean countries, Turkey, and Eastern Europe. As a key player in international banking, the Group has leading platforms and business lines in Europe, a strong presence in the Americas as well as a solid and fast-growing business in Asia-Pacific. BNP Paribas has implemented a Corporate Social Responsibility approach in all its activities, enabling it to contribute to the construction of a sustainable future, while ensuring the Group's performance and stability Commitment to Diversity and Inclusion At BNP Paribas, we passionately embrace diversity and are committed to fostering an inclusive workplace where all employees are valued, respected and can bring their authentic selves to work. We prohibit Discrimination and Harassment of any kind and our policies promote equal employment opportunity for all employees and applicants, irrespective of, but not limited to their gender, gender identity, sex, sexual orientation, ethnicity, race, colour, national origin, age, religion, social status, mental or physical disabilities, veteran status etc. As a global Bank, we truly believe that inclusion and diversity of our teams is key to our success in serving our clients and the communities we operate in. About Business Line/Function CIB Architecture & Digital is a global team of technology and domain experts whose mission is to help optimize value across the full IT lifecycle. Our extensive range of services are designed to support CIB teams from early stage experimentation all the way through to Production. These services ensure that projects align with CIB strategy, principles and standards, and comply with Group policies. Job Title Senior Technical Architect Date 25/04/2024 Department Transversal IT Location: Mumbai, Chennai Business Line / Function ISPL CIB IT Architecture Reports To (Direct) Principal Technical Architect Grade (if applicable) (Functional) Number Of Direct Reports Directorship / Registration: NA Position Purpose Current position is under ISPL CIB IT Architecture team to work with the ‘Technical Architecture’ team, to perform technical assessment of CIB applications and ensure application teams adhere to CIB Technology standards. The role is pretty hands on role to design, build & enhance enterprise applications & assist teams at ISPL to provide technical solutions. Direct Responsibilities Validate technical architecture of CIB applications as a part of the ITSVC & Innovation pipeline process Ensure application teams adhere to CIB Technology standards while designing & building their solutions Contribute/review the technical design and/or specifications Responsible for managing & reporting technical risks Participate in Global architecture initiatives and finding ways to roll out to the ISPL teams Involve into studies of specific technologies or families of technologies & present synthesis documents to senior management Contributing Responsibilities Contribute towards innovation; suggest new technical practices for efficiency improvement Contribute towards recruitment efforts for the team Technical & Behavioral Competencies Mandatory Skills Proficient in defining architecture solutions for complex enterprise applications Strong knowledge about design patterns, integration patterns Good experience in technical analysis of n-tier applications with multiple integrations using object oriented, APIs & Microservices approaches Strong knowledge in Core Java, J2EE, Spring framework, Spring Boot, Hibernate/JPA Strong knowledge in RDBMS / SQL with Oracle or SQL server or Postgres Very good understanding of principle behind various DevSecOps practices and working experience of industry standard tools Troubleshooting & Performance tuning using any profiling tools e.g. Dynatrace, JProfiler etc. Significant development experience in building complex enterprise level applications Excellent communication and co-ordination skills Ability & willingness to learn & work on diverse technologies (languages, frameworks, and tools) Inclination to constantly keep up to date on new technologies and frameworks Self-motivated with good inter-personal and organization skills Nice To Have Skills Good knowledge on front-end technologies preferably Angular. Good knowledge on containerization & orchestration tools Exposure to financial domain Knowledge on Software methodology practice – Agile Methodology & SCRUM practices Skills Referential Specific Qualifications (if required) Behavioural Skills: (Please select up to 4 skills) Decision Making Attention to detail / rigor Critical thinking Communication skills - oral & written Transversal Skills: (Please select up to 5 skills) Analytical Ability Ability to develop and leverage networks Ability to anticipate business / strategic evolution Ability to inspire others & generate people's commitment Education Level Ability to develop others & improve their skills Bachelor Degree or equivalent Experience Level At least 15 years Other/Specific Qualifications (if Required) Not Applicable Show more Show less

Job Description We are seeking a talented Generative AI Developer to join our team and build cutting-edge generative models. The ideal candidate will work on developing AI systems that can create innovative, human-like content, ranging from natural language generation (NLG), image generation, and even video or music synthesis. The candidate requires to carry expertise in machine learning, deep learning, and natural language processing (NLP), as well as an understanding of specific generative models like GPT, GANs (Generative Adversarial Networks), VAEs (Variational Autoencoders), or other types of neural networks. Responsibilities Develop and fine-tune generative models using techniques like Generative Adversarial Networks (GANs), Variational Autoencoders (VAEs), Transformers, Diffusion models, etc. Work on tasks such as text generation, image generation, music or sound generation, video creation, and other creative AI applications. Design, build, and deploy models using frameworks like TensorFlow, PyTorch, Hugging Face, OpenAI's GPT, or similar tools. Optimize AI models for performance, accuracy, and scalability in real-world production environments. Research and stay updated on the latest trends, papers, and breakthroughs in generative AI. Collaborate with other teams (data scientists, machine learning engineers, product teams) to integrate models into production systems. Work on data preprocessing, augmentation, and designing pipelines to ensure high-quality input for model training. Document your code, process, and model outputs for team-wide visibility and knowledge sharing. Required Qualifications & Skills Bachelor's or Master's degree in Computer Science or related fields. 3-4 years of hands-on experience in developing Generative AI solutions Strong understanding of deep learning algorithms, especially in generative models like GANs, VAEs, Diffusion models, or large-scale language models like GPT. Hands-on experience with machine learning frameworks and libraries such as TensorFlow, PyTorch, or Hugging Face. Experience working with neural networks, unsupervised learning, and natural language processing (NLP). Strong programming skills in Python, including deep learning libraries (e.g., TensorFlow, Keras, PyTorch). Familiarity with cloud platforms (AWS, GCP, or Azure) for model training and deployment. Strong mathematical and statistical knowledge, particularly in probability theory, linear algebra, and optimization. Experience in large-scale model training, fine-tuning, or distributed computing. Knowledge of reinforcement learning (RL) and self-supervised learning. Familiarity with AI ethics, bias mitigation, and interpretability in generative models. Show more Show less

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SMTS SILICON DESIGN ENGINEER The Role The position will involve working with a very experienced CPU physical design team. The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors in a fast-paced environment with cutting-edge technology. The Person Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities. Key Responsibilities Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure. Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA. Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR tools - Synopsys fusion compiler, Cadence, PrimeTime, StarRC, Calibre, Apache Redhawk Preferred Experience 12+ years of professional experience in physical design, preferably with high-performance designs. Must have closed high-performance IPs- CPU/GPU/DPU/memory controller, etc. Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation Versatility with scripts to automate design flow - Perl/Tcl/Python Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams Experience in advanced sub 7nm nodes Excellent physical design and timing background. A good understanding of computer architecture is preferred. Strong analytical/problem-solving skills and pronounced attention to detail. Academic Credentials Qualification: Bachelors or Masters in Electronics/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Show more Show less

We're looking for an Experienced RTL Design Engineer to join our Automotive Digital Interface Controller IP team. The Automotive Digital Design Engineer is expected to : Be responsible for specification development, architecture design and RTL development of Automotive specific features / enhancements. Proactively develop safety mechanisms that can be embedded within our IP and reused easily Work closely with the verification team and review verification plan mapping with the specification. Work with product teams to evaluate customer requirements related to quality, functional safety, and automotive reliability. Work closely with the Functional Safety and internal development teams on projects and task planning, progress tracking and reporting. Key Qualifications Must have BSEE in EE with 5+ years of relevant experience or MSEE with 4+ years of relevant experience. Must have proven experience working on Automotive SoC’s / Digital IP’s. Must have proven experience working of one or more of protocols at the IP level: DDR / PCIe / UCIe. Hands on experience with architecting / micro-architecture / detailed design from functional specifications. Hands on experience with Synthesizable Verilog/ System Verilog RTL coding for ASIC designs and Simulation tools. Lint, CDC, synthesis flow and static timing flows, formal checking, etc experience. Working knowledge / experience TCL, Perl, Python is added advantage. Has a solid desire to learn and explore new technologies. Performs in project leadership role & guides more junior peers with aspects of their job. Frequently networks with senior internal and external personnel in own area of expertise. Proficient in English. Formal training in ISO 26262 is preferred. Experience in qualifying systems with embedded hardware to various ISO 26262 ASIL levels up to ASIL D Experience with various ISO 26262 work products such as DFMEA; FMEDA; DFA Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

Alternate Job Titles: Sr. Application Engineer Senior Technical Support Engineer Senior Customer Success Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled professional with a passion for technology and customer success. You have a solid background in Physical Implementation RTL-GDS and are experienced in debugging and resolving Synth & PnR implementation challenges. You thrive on solving critical design challenges and are dedicated to enhancing QOR metrics to achieve best-in-class PPA and TAT targets. Your excellent communication skills enable you to effectively interface with customers and business unit personnel. You are self-motivated, detail-oriented, and committed to continuous learning and improvement. What You’ll Be Doing: Working on the latest Synopsys implementation technologies (Machine Learning, Physical Synthesis, Multi Source CTS) to solve complex PPA challenges faced by Synopsys customers. Developing and debugging RTL-GDS implementation methodologies and flows. Providing technical solutions by identifying design and/or EDA tool issues and offering appropriate resolutions for customers. Translating findings into requirements for R&D to improve tool behaviors with enhancements as adaptive long-term solutions. Deploying new technologies on the latest EDA versions and enabling customers to migrate to newer versions to achieve the best PPA. Proactively identifying customers' pain points and developing innovative solutions to address them. Collaborating closely with Synopsys R&D and product development teams to develop future technologies. Acting as a customer advocate while communicating with in-house R&D and serving as a product brand ambassador when engaging with customers. The Impact You Will Have: Driving customer satisfaction and success through exceptional technical support and solutions. Enhancing product quality by providing valuable feedback to the R&D team. Contributing to the continuous improvement of Synopsys tools and methodologies. Supporting the migration of customers to newer EDA versions, achieving optimal PPA. Strengthening relationships with customers and understanding their technical needs. Helping to displace competing implementation solutions through effective benchmarks. What You’ll Need: At least 2+ years of experience in Physical Implementation RTL-GDS. Experience in debugging and resolving Synth & PnR implementation challenges. Good exposure to methodology changes to achieve targeted PPA metrics for complex designs. Proficiency in Synopsys implementation tools is an advantage. Proficiency in scripting (Tcl, Unix, Perl). Excellent communication skills, including the ability to interface with customers and business unit personnel. Who You Are: Self-motivated and dedicated with excellent debugging skills. Customer-focused with a passion for delivering exceptional service. Analytical thinker with strong problem-solving abilities. Adaptable and able to work in a fast-paced, dynamic environment. Team player who collaborates effectively with colleagues and customers. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on providing world-class technical support to our customers. Our team is dedicated to ensuring the successful adoption and implementation of Synopsys products, driving customer satisfaction, and contributing to the continuous improvement of our solutions. We work closely with the R&D and product development teams to deliver comprehensive support and technical expertise. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Principal Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 12 years or MSEE/CE + 10 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Principal Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 12years or MSEE/CE + 10 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Principal Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 12 years or MSEE/CE + 10 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Principal Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 12years or MSEE/CE + 10 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Chennai Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Chennai Work Locations: T. Nagar Nungambakkam Vadapalani Velachery Thuraipakkam Marina Mall (Egattur) Shift Timing: 11:00 AM 8:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Support kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend shifts Work experience with a leading restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Kolkata Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Kolkata Work Locations: Salt Lake (City Centre Mall) Park Street (Opposite The Park Hotel) New Town (Axis Mall) Howrah (Avani Riverside Mall) Gariahat (Near Mukti World Mall) Shift Timing: 12:00 PM 9:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Assist kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend opportunity Experience working with a reputed restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

SUMMARY Part-Time Weekend Job Join Barbeque Nation’s Team in Mumbai Job Role: Weekend Supporting Staff Company: Barbeque Nation Location: Mumbai Work Locations: Andheri West (Infinity Mall) Lower Parel (High Street Phoenix Mall) Thane (Viviana Mall) Malad (Inorbit Mall) Vashi (Raghuleela Mall) Shift Timing: 12:00 PM 9:00 PM Work Days: Saturday and Sunday Estimated Monthly Earnings: 5,000 7,000 Work 9 hours and earn extra income every weekend Key Responsibilities: Assist kitchen and floor staff Serve starters, beverages, and non-vegetarian items (including chicken) Maintain cleanliness in service and dining areas Ensure smooth dining operations Requirements: No prior experience required (orientation provided) Must be energetic, disciplined, and customer-friendly Comfortable handling non-vegetarian food Age 18+ and available on both days What We Offer: Quick payouts Flexible part-time weekend work Work experience with a leading restaurant brand Apply Now Make your weekends productive with Barbeque Nation!

Job title : Associate Expert Scientific Writer – Health Economics and Value Assessment (HEVA) Hiring Manager: Head/Group Lead/Team Lead HEVA Location: Hyderabad % of travel expected: Travel required as per business need Job type: Permanent and Full time About The Job Our Team: Sanofi Business Operations(SBO) is an internal Sanofi resource organization based in India and is setup to centralize processes and activities to support Specialty Care, Vaccines, General Medicines, CHC, CMO, and R&D, Data & Digital functions. SGH strives to be a strategic and functional partner for tactical deliveries to Medical, HEVA, and Commercial organizations in Sanofi, Globally. Main Responsibilities The overall purpose and main responsibilities are listed below: Create HEVA communication deliverables (including manuscripts, posters, abstracts, slide decks) aligned with HEVA strategy and global HEVA communication plan across relevant business units and product teams. Contribute to execution of HEVA communication plans with relevant medical communication plans to ensure evidence needs for healthcare decision makers are consistently identified and prioritized in communication plans, supporting integrated clinical and health economic evidence in support of the value of products. Manage core HEVA communication processes, templates, and products across the portfolio in accordance with the scientific and value messages aligned with Core Value Dossier, the US AMCP Dossier, and HEVA contributions as appropriate to other submissions. Ensure Core Value Decks for key products are established and maintained, making available a regularly updated synthesis of critical HEVA evidence on the value of products. Maintain accountability for adherence to the publication standard operating procedure (SOP) and other compliance expectations relevant to HEVA communication processes. Seek opportunities to innovate HEVA value communications to increase the relevance and impact of HEVA evidence and inform optimal access and reimbursement decisions. Create complex and specialized content without supervision. Develop and maintain therapeutic area expertise. Coach and review content created by senior and junior HEVA writers and develop and review content created by them. Manage end-to-end publication content development process including documentation and approval in process in iEnvision (previously, Datavision/Matrix). Collaborate effectively with stakeholders: HEVA, RWE, and Scientific communication global and/or local teams. People: (1) Maintain effective relationships with the end stakeholders (Medical scientific community) within the allocated GBU and product – with an end objective to develop education and communication content as per requirement for HEVA communications; (2) Interact effectively with healthcare professionals on publication content; and (3) Constantly assist writers (senior or junior) in developing knowledge and sharing expertise Performance: (1) Create HEVA communications deliverables (including manuscripts, posters, abstracts, and slide decks) aligned with HEVA strategy and global HEVA communication plan across relevant business units and product teams as per agreed timelines and quality; and (2) Provide strategic support with individuals and institutions, which may serve as resources for publications purpose, etc Process: (1) Develop complex or priority publications material without supervision; 2) Develop subject matter expertise for the assigned therapeutic area; (3) Work with assigned scientific communication team in conducting comprehensive publication-need analysis; (4) Manage core HEVA communication processes, templates, and products across the portfolio in accordance with the scientific and value messages aligned with Core Value Dossier, the US AMCP Dossier, and HEVA contributions as appropriate to other submissions; (5) Ensure Core Value Decks for key products are established and maintained, making available a regularly updated synthesis of critical HEVA evidence on the value of products; (6) Maintain accountability for adherence to the publication SOP and other compliance expectations relevant to HEVA communication processes; (7) Maintain accountability for adherence to the publication SOP and other compliance expectations relevant to HEVA communication processes; (8) Implement the publication plan and associated activities for the year identified for the region; (9) Work with selected vendors within the region to deliver the required deliverables as per defined process; (10) Leverage advanced training delivery tools and techniques thereby enhancing the effectiveness of training delivery; (11) Design an overall plan of action based on end-user feedback and improve course content and delivery; and 12) Take active participation in designing and/or delivering training Stakeholder: (1) Work closely with HEVA global and local teams, RWE global and local teams and scientific communication teams in regions/areas to identify publications needs and assist in developing assigned deliverables; and (2) Liaise with HEVA global and local teams to prepare relevant and customized deliverables About You Experience: 5-7 years of experience in content creation for the pharmaceutical/healthcare industry, or academia Soft skills: Stakeholder management; communication skills; and ability to work independently and within a team environment Technical skills: Relevant training/experience in health economics, public health, epidemiology, or other relevant health-related scientific discipline (including but not limited to therapeutic area/domain knowledge exposure; knowledge of Good Publication Practice; publication submission; and/or project management) Education: Advanced degree in life sciences/pharmacy/similar discipline or medical degree Languages: Excellent knowledge of English language (spoken and written) Pursue progress, discover extraordinary Better is out there. Better medications, better outcomes, better science. But progress doesn’t happen without people – people from different backgrounds, in different locations, doing different roles, all united by one thing: a desire to make miracles happen. So, let’s be those people. At Sanofi, we provide equal opportunities to all regardless of race, colour, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, or gender identity. Watch our ALL IN video and check out our Diversity Equity and Inclusion actions at sanofi.com! null Show more Show less

Primary & Mandatory Skill: Python, Docker/Kubernetes Level: SA Client Round (Yes/ No): No Location Constraint if any : No Shift timing: 2-11pm JD: Good hands in Python scripting Experience in Docker & Kubernetes

Job Title: Head of R&D – API Location: Hyderabad, Telangana Department: R&D Reports To: Managing Director Experience Required: 15+ years Education: Ph.D. or M.Sc. in Organic Chemistry Key Responsibilities • Lead and manage R&D activities in API process development , scale-up , and tech transfer to manufacturing. • Drive route scouting , cost-effective synthesis , and process optimization for new and existing APIs. • Spearhead polymorph screening and development for novel and robust API forms. • Oversee patent strategy , including identification, drafting, and filing of process and polymorph patents . • Ensure comprehensive documentation for regulatory filings (DMFs, CMCs) and IP protection . • Collaborate closely with manufacturing, quality, regulatory, and business development teams. • Represent R&D during client meetings, audits, and regulatory inspections. • Cultivate a high-performing, innovation-driven R&D team. Qualifications • Strong expertise in process chemistry , polymorph characterization , and patent filings . • Track record in DMF submissions and regulatory compliance . • Knowledge of crystallography, solid-state chemistry, and intellectual property law is preferred. Strong leadership, project management, and communication skills. Show more Show less

Hello Talented Techie! To tackle the biggest challenges of our time, we need inquisitive minds with the ambition to make the impossible possible. Siemens is your place to thrive, challenge the status quo, make a difference, and grow in a team of innovators who share your passion for tech. Are you in? We are looking for: Senior UX Designer You’d describe yourself as: Responsible for delivering all aspects of design, from defining customer needs to delivering concepts and prototypes to UI specifications for development Identify future opportunities and work as a key thought partner with your counterparts in product, engineering, and operations Best Utilization of industry design standards and practices to define and implement design criteria, design guidelines, and design specifications. Collaborate closely with Project Lead, Project Manager and development team in planning, prioritizing, requirements analysis, task analysis, conceptual modeling, interaction design, and usability testing. Design system knowledge to build simple, sophisticated experiences Support product/project teams (product owners, designers, engineering) throughout the project life cycle – recommending appropriate methodology, scoping, and coordinating the entire process, facilitating in-field research and post-research synthesis through analysis. Produce user requirements specifications, personas, storyboards, scenarios, user flow diagrams, wireframes, design prototypes, and design specifications. You’ll create impact by: B.E/B. Tech graduate in any branch of engineering or in B. Des (any branch of Design) 5 to 8 Years of relevant experience in UX Design. A portfolio showcasing high-quality designs and problem-solving ability Proficiency with UX design process, Lean UX methodologies will make valuable contributions. Proven understanding of user testing methods & technologies. Hands on expertise in using tools such as Abode XD, Photoshop, illustrator, Axure, Sketch Possess excellent facilitation, presentation and interpersonal skills will make valuable contributions. Create a better #TomorrowWithUs! We value your outstanding identity and perspective and are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society. Come bring your authentic self and create a better tomorrow with us. Protecting the environment, conserving our natural resources, encouraging the health and performance of our people as well as safeguarding their working conditions are core to our social and business dedication at Siemens. Show more Show less

Locations : Gurgaon | Bengaluru Who We Are Boston Consulting Group partners with leaders in business and society to tackle their most important challenges and capture their greatest opportunities. BCG was the pioneer in business strategy when it was founded in 1963. Today, we help clients with total transformation-inspiring complex change, enabling organizations to grow, building competitive advantage, and driving bottom-line impact. To succeed, organizations must blend digital and human capabilities. Our diverse, global teams bring deep industry and functional expertise and a range of perspectives to spark change. BCG delivers solutions through leading-edge management consulting along with technology and design, corporate and digital ventures—and business purpose. We work in a uniquely collaborative model across the firm and throughout all levels of the client organization, generating results that allow our clients to thrive. What You'll Do As a data analyst of the BCGX Delivery A&A team, you will work closely with the consulting teams on a diverse range of advanced analytics topics. You will have the opportunity to leverage analytical methodologies to deliver value to the stakeholders by providing analytical and technical subject matter expertise and accelerated execution support. You will collaborate with various teams to gather requirements, specify, design, develop, deliver, and support analytic solutions serving the client's needs. You will provide technical support through a deeper understanding of relevant data analytics solutions and processes to build high-quality and efficient analytics solutions. YOU'RE GOOD AT Delivering analysis and insights to case teams, typically owning all or part of an analytics module whilst integrating with a case team. Establishing credibility by thought partnering with case teams on analytics topics; and drawing conclusions on a range of external and internal issues related to your module. Communicating analytical insights through sophisticated synthesis and packaging of results (including PPT slides and charts) with consultants, collecting, synthesizing, and analyzing case team learning & inputs into new best practices and methodologies. Strong hands-on experience in at least one analytics topic or platform. Executing analytical approach and creating defined outcomes; contributing to approach selection. Communicating with confidence and ease o You will be a clear and confident communicator, able to deliver messages in a concise manner with strong and effective written and verbal communication Thinking Analytically : You should be strong in analytical solutions with hands-on experience in advanced analytics delivery, through the entire life cycle of analytics. Strong analytics skills with the ability to develop and codify knowledge and provide analytical advice where required. Technical Skills Strong data visualization, data modeling and data analysis Strong proficiency in (Primary): Power BI /Tableau/VBA, Advance Excel, SQL/Python (ETL & EDA) Secondary skills: Power Apps, Power Automate, Alteryx Key Competencies Strong analytical and problem-solving skills, with a structured approach to complex challenges Proactive, with a keen focus on analytics, strategy, and consulting Client-oriented, with a strong work ethic and high standards for quality Skilled in synthesizing and structuring knowledge into actionable insights and strategic frameworks Effective written and verbal communication skills Strong interpersonal skills with the ability to build credibility with stakeholders Collaborative team player, effective in cross-functional and global teams Thrives in fast-paced, service-oriented environments; able to manage multiple priorities under tight deadlines Open to work-related travel What You'll Bring Bachelor's / master's degree (Computer Science, Data Science) Proven experience as a Data Analyst with a focus on the specified tools and technologies. At least 2-4 years of relevant work experience providing analytics solutions in a commercial setting. Analytical reasoning and complex problem-solving involving mathematical programming and data problems. Ability to understand the requirements and proactively propose analytical solutions. Strong attention to detail and accuracy in work. Effective communication skills to convey complex data insights to various stakeholders. Ability to work independently and collaboratively in a fast-paced environment. Continuous learning mindset to stay updated on emerging tools and technologies in the data analytics field. Consulting experience will be considered a plus #BCGXjob Who You'll Work With You will report to a Data & Analytics Senior Manager - X Delivery and you will work with various teams on client projects. Boston Consulting Group is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, age, religion, sex, sexual orientation, gender identity / expression, national origin, disability, protected veteran status, or any other characteristic protected under national, provincial, or local law, where applicable, and those with criminal histories will be considered in a manner consistent with applicable state and local laws. BCG is an E - Verify Employer. Click here for more information on E-Verify. Show more Show less

Locations : Gurgaon | Bengaluru Who We Are Boston Consulting Group partners with leaders in business and society to tackle their most important challenges and capture their greatest opportunities. BCG was the pioneer in business strategy when it was founded in 1963. Today, we help clients with total transformation-inspiring complex change, enabling organizations to grow, building competitive advantage, and driving bottom-line impact. To succeed, organizations must blend digital and human capabilities. Our diverse, global teams bring deep industry and functional expertise and a range of perspectives to spark change. BCG delivers solutions through leading-edge management consulting along with technology and design, corporate and digital ventures—and business purpose. We work in a uniquely collaborative model across the firm and throughout all levels of the client organization, generating results that allow our clients to thrive. What You'll Do As a data analyst of the BCGX Delivery A&A team, you will work closely with the consulting teams on a diverse range of advanced analytics topics. You will have the opportunity to leverage analytical methodologies to deliver value to the stakeholders by providing analytical and technical subject matter expertise and accelerated execution support. You will collaborate with various teams to gather requirements, specify, design, develop, deliver, and support analytic solutions serving the client's needs. You will provide technical support through a deeper understanding of relevant data analytics solutions and processes to build high-quality and efficient analytics solutions. YOU'RE GOOD AT Delivering analysis and insights to case teams, typically owning all or part of an analytics module whilst integrating with a case team. Establishing credibility by thought partnering with case teams on analytics topics; and drawing conclusions on a range of external and internal issues related to your module. Communicating analytical insights through sophisticated synthesis and packaging of results (including PPT slides and charts) with consultants, collecting, synthesizing, and analyzing case team learning & inputs into new best practices and methodologies. Strong hands-on experience in at least one analytics topic or platform. Executing analytical approach and creating defined outcomes; contributing to approach selection. Communicating with confidence and ease o You will be a clear and confident communicator, able to deliver messages in a concise manner with strong and effective written and verbal communication Thinking Analytically : You should be strong in analytical solutions with hands-on experience in advanced analytics delivery, through the entire life cycle of analytics. Strong analytics skills with the ability to develop and codify knowledge and provide analytical advice where required. Technical Skills Strong data visualization, data modeling and data analysis Strong proficiency in (Primary): Power BI /Tableau/VBA, Advance Excel, SQL/Python (ETL & EDA) Secondary skills: Power Apps, Power Automate, Alteryx Key Competencies Strong analytical and problem-solving skills, with a structured approach to complex challenges Proactive, with a keen focus on analytics, strategy, and consulting Client-oriented, with a strong work ethic and high standards for quality Skilled in synthesizing and structuring knowledge into actionable insights and strategic frameworks Effective written and verbal communication skills Strong interpersonal skills with the ability to build credibility with stakeholders Collaborative team player, effective in cross-functional and global teams Thrives in fast-paced, service-oriented environments; able to manage multiple priorities under tight deadlines Open to work-related travel What You'll Bring Bachelor's / master's degree (Computer Science, Data Science) Proven experience as a Data Analyst with a focus on the specified tools and technologies. At least 2-4 years of relevant work experience providing analytics solutions in a commercial setting. Analytical reasoning and complex problem-solving involving mathematical programming and data problems. Ability to understand the requirements and proactively propose analytical solutions. Strong attention to detail and accuracy in work. Effective communication skills to convey complex data insights to various stakeholders. Ability to work independently and collaboratively in a fast-paced environment. Continuous learning mindset to stay updated on emerging tools and technologies in the data analytics field. Consulting experience will be considered a plus #BCGXjob Who You'll Work With You will report to a Data & Analytics Senior Manager - X Delivery and you will work with various teams on client projects. Boston Consulting Group is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, age, religion, sex, sexual orientation, gender identity / expression, national origin, disability, protected veteran status, or any other characteristic protected under national, provincial, or local law, where applicable, and those with criminal histories will be considered in a manner consistent with applicable state and local laws. BCG is an E - Verify Employer. Click here for more information on E-Verify. Show more Show less

Job Description Manufacturing and Projects Analyst Manufacturing analyst is responsible to drive the Performance metrices, Standardization, Digitalization, Key Projects/Programs Integration in collaboration with Indian manufacturing facilities and other stake holders. This role will be responsible to drive the India manufacturing reviews within the team and at global operations level. Responsibility also includes Data management, digitalization, developing indicators and finally analysis to drive the performance thru specific projects. Key Accountabilities SPOC for India Manufacturing Data / Metrices, Performance Indicators, Reviews, Data Analysis and MIS etc. Drive the digitalization initiatives across manufacturing – Data collection, data storage, data communication, data synthesis, data analysis, MIS, processes, Industry 4.0 etc. Support ERP implementation and transformation at India level Drive the standardization across manufacturing in areas of KPIs, Command Centre, Shop floor management systems, production management system, visualization etc. Drive special projects around Lean to improve the Manufacturing performance in areas of SQDCME Drive specific program / NPIs as part of product transition from other countries to India Develop COE for Project/Program management within Manufacturing Operations Provide necessary support to Technical and Business/Program Management teams Support finance partners to prepare Manufacturing Capex/Opex Budget, monitoring, Reporting of necessary financial indicators Monitor and control the manufacturing expenses and overheads from cost perspective (Opex) Drive L&D and Engagement initiatives within India Manufacturing team Support technical department to prepare the business case on capacity enhancement or technological upgradation projects Drive and support the new manufacturing technologies, sustainability initiatives at Manufacturing facilities. What You Bring Proven experience working in Manufacturing Industry – Automotive, Heavy Engineering, Mining, Auto Consulting Engineer by qualification, PMP or Project Management professional with 12+ years and above experience Manufacturing Engineering, Industry 4.0, MES, Capex Projects, Projects Background Hand-on experience on ERP, Power BI, COE, and Project/Program management techniques Techno-Commercial experience and mindset Familiarity with Matrix organization and reporting structure International & multi-stakeholders management exposure Proficient with Microsoft Office applications and computer technology Excellent verbal and written communication skills Strong leadership and managerial attributes. Good organizational and time-management skills What We Offer Competitive benefit package including Health Insurance, Personal Accident / Disability, Group Term Life Insurance, Annual health check-up, and voluntary insurance options. Time to recharge through 21 days PTO (with up to 10 days carry forward as Earned Leave stock) Work-life balance so you can focus on professional and personal priorities. Financial support for continuing education Employee Assistance Program An equal opportunity employer committed to creating a diverse and inclusive workplace A global network of supportive colleagues and growth opportunities As an equal opportunity employer, FLSmidth embraces diversity and equality by promoting an environment of inclusion. We encourage applicants of all backgrounds and perspectives to apply - the more diverse our employees are, the stronger our team is. Kindly note that we will be reviewing applications and conducting interviews on an ongoing basis so please apply as soon as possible. Candidates will be contacted by email. No recruiters and unsolicited agency referrals please FLSmidth is the leading supplier of engineering, equipment and service solutions to customers in the mining and cement industries – for more information please visit FLSmidth.com/careers Show more Show less

Senior Front End Integration -STA Engineer Hyderabad, India Engineering 65220 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Front-end implementation from RTL to netlist, including RTL Lint, CDC/RDC analysis, timing constraints, Power Analysis, STA for Multi-Media IP's Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power. Run Formal Verification checks between RTL and Gate level netlist and debug the aborts, inconclusive and Logic Equivalency failures Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. Analyze the inter-block timing and come up with IO budgets for the various partition blocks. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Perform RTL Lint and work with the Designers. Analyze RTL CDC/RDC and work with Designer for potential Clock and Reset Design Domain crossing issues. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults. Perform Power Estimation at RTL and Gate Level and identify power reduction opportunities. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power). Implementing Functional ECO's using Conformal and writing manual Eco's. Work with Architects, RTL Designers and SOC teams for efficient IP Quality. PREFERRED EXPERIENCE: 5 to 10 years of experience in Front-end implementation from RTL to netlist Familiarity with Power Analysis Experience/Background on Computing/Graphics is a benefit ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-NS1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Senior Management / Leadership - Physical Design Hyderabad, India Engineering 64614 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: We are seeking a highly experienced and innovative SOC Physical Design Director to lead the development of Server SOC designs and very experienced physical design team. This senior level role is critical for the design development of Server SOC designs products at AMD and is responsible for delivering Server SOCs meeting challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: This role combines strong people leadership and teamwork skills driving cross functional teams across geographies. The person with strong technical expertise, Strong analytical and problem-solving skills working with both executive level technical and management leaders to influence and drive change. KEY RESPONSIBILITIES: Lead and manage a team of engineers focused on SOC Physical Design implementation and Signoff Bring deep knowledge and experience in Physical design & Timing closure and signoff and apply them to large, challenging, leading-edge Server SOC designs to ensure high quality on time delivery. Bring significant experience in effective team management to help mentor, coach and grow the Server SOC Physical Design Team with an emphasis on positive influence on team morale and culture Technically manage different aspects of Physical Design including Full Chip Floor planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off. Collaborate with cross functional teams between Architecture, Product planning, Packaging, IPs, CAD to drive SOC Implementation and PPA improvement. Experience and understanding of flow development and scripting. Strong Technical problem and debugging solving. PREFERRED EXPERIENCE: 20+ years’ experience in SOC Physical Design Implementation, Signoff and TapeOut Must have prior experience leading Physical Design teams of at least 50+ members Excellent analytical and problem-solving skills along with attention to details. Strong written and verbal communication, Time Management and Presentation Skills. Must be a self-starter, and able to drive independently and efficiently challenging and time critical tasks to on-time completion. Forward looking and dependable leader who proactively identifies and resolves issues and roadblocks before they become bottlenecks or showstopper. Experience in EDA tools for Physical Design and Signoff cycles - Synopsys FusionCompiler, Cadence Innovus, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk. ACADEMIC CREDENTIALS: Bachelor’s or Master's degree in Electrical Engineering #LI-SK5 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.