Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Micro-Arch, RTL Design ownership of SMMU IP for the next generation System-on-chip (SoC) for smartphones, tablets, and other product categories. System Memory Management Unit (SMMU) does virtual to physical address translation, dynamic allocation, and access control of DDR memory, designed as per ARM SMMU architecture spec Job responsibilities include Work with Hardware and Software teams to understand the design requirements, specification, and interface details for SMMU IP Develop micro arch design specification optimized for performance, area, power, Software use cases Implement design spec in RTL coding language, qualify code through all required quality checks like Lint, CDC, Synthesis/DFT/low power checks Work with SoC level performance modeling team on latency, bandwidth analysis, fine tune HW configuration like cache, buffer sizing Debug and root cause post silicon issues in collaboration with emulation, software test teams Required skillset includes VLSI logic design expertise ARM system architecture, Memory Management, Virtual Memory concepts, Core sight architecture, power management fundamentals Knowledgeable about on-chip interconnect protocols like APB/AHB/AXI/ACE/ACE-Lite Strong debugging, Analytical and problem-solving skills Good understanding of the ASIC design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Communication and collaboration skills to work with a large world-wide design organization Desired skillset includes Experience in designs optimized for low power - Dynamic clock gating, Logic/ Memory power collapse Proficiency in Scripting languages (Python or Perl) for Automation initiatives, C/C++/SystemC for performance models Working knowledge of Synthesis, DFT, LEC, functional cover points/assertions, formal verification Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Walk-In Interview For Shivalik Rasayan Ltd - R&D, Job Location - Bhiwadi, Rajasthan API R&D 10 Post, Exp. 2 - 5 Yrs | M.Sc. - Chemical Formulation R&D 10 Post, Exp. 2 - 7 Yrs | M.Pharma - Pharmaceutical Analytical R&D 10 Post, Exp. 2 - 8 Yrs | M.Sc. Required Candidate profile Candidate must have Pharma R&D Exp. Self Motivated & Team Player Ready to Relocate Bhiwadi, Rajasthan Interested person also can share profile: Uday@shivalikrasayan.com Perks and benefits Salary based on Pharma R&D Experience & Knowledge

Overview: TekWissen is a global workforce management provider throughout India and many other countries in the world. Position: RTL - DFT Location: Hyderabad Work Type: Onsite Job Type: Full time Job Description: The person is responsible for ensuring the integrity of a design by analyzing signal connectivity, specifically related to Design for Testability (DFT) features, utilizing Spyglass tools to identify and report potential violations within the test logic. Required Skills: Expertise should include and not limited to the following Strong understanding of digital circuit design principles and timing analysis concepts Experience with RTL design, synthesis Proficiency in scripting languages like TCL, Perl, or Python for automation Excellent problem-solving and debugging skills Strong communication and teamwork abilities to collaborate with cross-functional teams TekWissen® Group is an equal opportunity employer supporting workforce diversity. Show more Show less

Role & responsibilities Physical Design Engineer (PD/STA/Synthesis) Must-Haves: •Tools: Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime for STA •Flow Experience: •Floorplanning •Power planning •Placement •Clock Tree Synthesis (CTS) •Routing •Physical Verification (DRC/LVS) •Timing Closure •Knowledge of: •Low-power design (UPF/CPF) •ECOs •IR Drop, EM Analysis •STA constraints and timing analysis Nice-to-Haves: •Experience with block-level and/or full-chip PD •Familiarity with scripting (Tcl, Perl, Python)

Tired of being the middleman in an endless game of corporate Chinese whispers? Frustrated with shipping features that collect digital dust? We get it. The traditional product management playbook is broken, and we're here to rewrite it. At LearnWith.AI, we're revolutionizing product leadership. Forget about being a roadmap custodian – we're turning you into an outcome architect. Your mission? One crystal-clear business goal that you'll drive from insight to impact. You'll harness the power of AI as a thinking partner, build what we call Brain Lifts (our secret sauce of domain expertise), and navigate your product through rapid, data-driven iterations until you hit your target. This isn't your typical product role where you're juggling stakeholder wishes or crafting elaborate presentations for approval. Instead, you'll be deep in the trenches of discovery, making bold product decisions, running swift experiments, and evolving your strategy based on real results. We're looking for someone who gets energized by curiosity, thrives on iteration, and has a passion for measurable impact. Join a team that values substance over show, outcomes over outputs, and velocity over bureaucracy. If you're ready to break free from traditional PM constraints and pioneer what product leadership should truly be, we want to hear from you. Welcome to the future of product management. What You Will Be Doing Architect and evolve Brain Lifts - our proprietary framework that transforms domain expertise into actionable insights, supercharges AI capabilities, and drives informed decision-making Lead rapid product evolution through weekly, data-informed iterations that consistently push the needle toward your defined outcome What You Won’t Be Doing Playing traffic controller with endless roadmaps or feature requests Drowning in documentation: No more novel-length PRDs, endless backlog grooming, or exhaustive edge case documentation Getting lost in technical weeds or architecture discussions AI Product Lead Key Responsibilities Drive and deliver measurable product outcomes, backed by concrete data that proves your impact Basic Requirements Proven track record with 4+ years in product leadership, where you've been the driving force behind product vision and core hypothesis development Success story of at least one product launch that reached real users, with demonstrated ability to learn and adapt based on usage metrics and outcomes Natural affinity for AI tools and eagerness to integrate them into your daily workflow (whether for research, analysis, synthesis, or strategic planning) About LearnWith.AI LearnWith.AI is an edtech startup that leverages AI and subject matter experts to cultivate a new way of learning. Our unique approach leverages 50+ years of learning science, cutting-edge data analytics and AI-powered coaching. In doing so, we can help students learn more, learn faster, and learn better - and have fun while doing it. We are a remote-first company that hires globally via Crossover. There is so much to cover for this exciting role, and space here is limited. Hit the Apply button if you found this interesting and want to learn more. We look forward to meeting you! Working with us This is a full-time (40 hours per week), long-term position. The position is immediately available and requires entering into an independent contractor agreement with Crossover as a Contractor of Record. The compensation level for this role is $100 USD/hour, which equates to $200,000 USD/year assuming 40 hours per week and 50 weeks per year. The payment period is weekly. Consult www.crossover.com/help-and-faqs for more details on this topic. Crossover Job Code: LJ-5599-IN-Gurgaon-AIProductLead.001 Show more Show less

Are you tired of being a go-between for users, execs, and engineers, only to see features you define go unused? At LearnWith.AI, we offer a fresh approach where your focus is on achieving real-world business outcomes. Forget owning roadmaps; here, your goal is to create impactful changes that matter. Dive deep into domain insights, transform them into actionable intelligence, and guide the product through rapid iterations to achieve tangible results. If you're ready to break away from the traditional product management mold and embrace a role driven by curiosity, iteration, and measurable success, join us and help redefine what product management can be. We value clarity, outcomes, and speed over busywork and process diagrams. Join us to drive impact through data-driven decisions and fast feedback loops. If you're done with the PM status quo and ready to change the game, apply now. We're shaping the future of product management. What You Will Be Doing Develop Brain Lifts: Create a dynamic repository of expert insights that refine AI tools, guide strategic decisions, and deepen your understanding of the domain. Drive Product Iterations: Implement small, data-informed product enhancements weekly to align the product with a measurable business outcome. What You Won’t Be Doing Overseeing roadmaps or determining "what to build" Crafting exhaustive PRDs, managing backlogs, or detailing every screen or edge case Creating technical solutions or software architecture Principal Product Manager Key Responsibilities Ensure desired product outcomes are achieved and validated through data analysis. Basic Requirements A minimum of 4 years in a product leadership role with experience in shaping product vision and owning the core problem-solution hypothesis. Proven track record of launching at least one product that reached users, with demonstrated learning from usage data or outcomes. Passion for integrating AI into daily work tasks such as research, analysis, synthesis, or strategy. About LearnWith.AI LearnWith.AI is an edtech startup that leverages AI and subject matter experts to cultivate a new way of learning. Our unique approach leverages 50+ years of learning science, cutting-edge data analytics and AI-powered coaching. In doing so, we can help students learn more, learn faster, and learn better - and have fun while doing it. We are a remote-first company that hires globally via Crossover. There is so much to cover for this exciting role, and space here is limited. Hit the Apply button if you found this interesting and want to learn more. We look forward to meeting you! Working with us This is a full-time (40 hours per week), long-term position. The position is immediately available and requires entering into an independent contractor agreement with Crossover as a Contractor of Record. The compensation level for this role is $100 USD/hour, which equates to $200,000 USD/year assuming 40 hours per week and 50 weeks per year. The payment period is weekly. Consult www.crossover.com/help-and-faqs for more details on this topic. Crossover Job Code: LJ-5599-IN-Hyderaba-PrincipalProdu.002 Show more Show less

🧠 Job Title: Business Operations Associate Company: Darwix AI Location: Gurgaon (In-Office) Type: Full-Time Experience Required: 1–3 Years Compensation: Competitive Salary + Performance-Based Incentives 🌍 About Darwix AI Darwix AI is India’s fastest-growing GenAI-powered SaaS startup redefining the future of revenue enablement. We are building a category-defining product that offers real-time sales intelligence, live agent coaching, multilingual transcription, and AI-powered nudges to help revenue teams close faster and better. With enterprise clients across India, the UAE, and Southeast Asia, we are building from India for the world . Our founding team comes with deep expertise from IITs, IIMs, BITS Pilani, and global consultancies, and we are backed by some of the most respected VCs and industry leaders. As we continue to scale rapidly, we are looking for a Business Operations Associate to play a high-impact role across strategy execution, internal operations, client implementation, analytics, and process design. 🚀 Role Overview The Business Operations Associate at Darwix AI will work closely with cross-functional teams—including Founders, Sales, Product, Customer Success, and Engineering—to streamline processes, deliver outcomes, and ensure operational excellence across the board. This role is multi-disciplinary in nature. You will be expected to solve open-ended problems, lead execution across strategic and operational initiatives, drive analytical rigor, and bring a first-principles mindset to solving real-world bottlenecks in scale. You’re not just executing a playbook—you’re helping build it. This is a role for people who thrive in ambiguity, enjoy solving hard problems, and are excited to wear multiple hats across business and operations in a rapidly growing AI startup. 📌 Key Responsibilities1. Cross-Functional Strategy Execution Drive high-priority strategic projects as directed by the Founder's Office and CXOs. Coordinate execution across Sales, Product, Customer Success, and Marketing teams. Set up operational cadences, track progress, and unblock issues through first-principles problem-solving. Conduct business reviews and status updates for leadership. 2. Client Operations & Onboarding Be the point-of-contact for new enterprise client implementations. Own onboarding checklists, coordinate with tech and content teams for timely delivery. Standardize SOPs for recurring client operations. Identify pain points during onboarding and solve them through automation or process refinement. 3. Process & System Design Map existing business processes across teams and identify inefficiencies or gaps. Create new workflows, automation rules, and process documentation to scale business operations. Implement and own systems like Notion, Airtable, HubSpot, Zoho CRM, and others for internal workflows. Drive standardization across functions—sales pipelines, ticketing systems, project plans. 4. Business Analytics & Reporting Design and maintain dashboards across operations, hiring, product delivery, and sales. Create weekly, monthly, and quarterly business reports for internal and investor updates. Own KPIs such as onboarding TAT, ops SLAs, internal resolution cycles, and more. Monitor and analyze trends to enable better forecasting and decision-making. 5. Revenue Operations Collaborate with the revenue team on pricing analysis, deal structuring, and resource allocation. Help design and track incentive programs for Sales and Customer Success teams. Build custom financial or forecasting models to guide business decisions. 6. Internal Program Management Lead internal projects like culture initiatives, town halls, learning programs, and cross-functional standups. Own initiatives like vendor management, internal audits, and process compliance. Handle communication for inter-department coordination with structure and clarity. 7. Founder Enablement Provide operational leverage to founders—calendar blocking, team-level follow-ups, meeting prep, and post-meeting synthesis. Work on high-agency, short-deadline founder-led special projects. Be the connective tissue between founders and function owners to ensure high-velocity execution. ✅ Who Should Apply?🎓 Education: Bachelor’s degree from Tier 1 or Tier 2 institutions (IITs, BITS, SRCC, DU, NITs, Ashoka, IIM Indore/ROHTAK/IPM programs, etc.). Academic background in business, economics, engineering, data science, or liberal arts with strong analytical ability. 🧠 Experience: 1–3 years in startup operations, program management, business consulting, strategy roles, or founder’s office. Prior experience in high-velocity environments (startups, venture-funded scaleups, consulting) is a strong plus. 🛠️ Skills: Excellent problem-solving and critical thinking skills. Strong command over Excel/Google Sheets, Notion, Airtable. Familiarity with analytics tools (Google Data Studio, Looker, Tableau, PowerBI). Comfort with basic SQL and scripting tools is a bonus. Impeccable communication, organization, and stakeholder management. Ability to own problems end-to-end and get things done at speed. 💡 What You'll Learn Build for scale : You will help lay the foundation of operations for a company that’s scaling across multiple geographies and verticals. Cross-functional collaboration : You’ll work with almost every department—sales, tech, content, customer success, product, marketing, HR. Product mindset : You’ll solve operational problems with a product lens—scaling through tools, automation, and analytics. Startup exposure : First-hand visibility into how GTM strategies, sales execution, fundraising, and enterprise SaaS scaling work in a hyper-growth environment. 🌐 Tools & Platforms You'll Use Slack, Notion, Figma (for communication and planning) Google Workspace (Docs, Sheets, Slides) HubSpot / Zoho CRM (for RevOps tracking) Airtable / ClickUp / Trello (for project management) SQL, Excel, Power BI / Google Data Studio (for data visualization) 🎯 What Success Looks Like in 6 Months Independently owns onboarding of 3–5 key enterprise clients with smooth handovers. Implements at least 3 operational workflows (e.g., hiring tracker, onboarding flow, SLA escalation). Reduces internal TAT across functions by 20% via operational automation. Owns the company dashboard and monthly review presentation for CXOs. Becomes the “go-to” person for solving cross-team execution issues. 🚀 Why Darwix AI? Build from the frontlines : You’re not just supporting execution; you’re leading it across teams. Founder's trust : This role is an extension of the founders' bandwidth. You’ll have direct access and real-time learning. Hypergrowth environment : Every week is different—new clients, new challenges, new systems. Real impact : You’ll see your dashboards drive decisions. Your systems will be used by the entire company. Your work will scale across geographies. 📩 How to Apply Send your resume to people@darwix.ai Subject Line: Application – Business Operations Associate – [Your Name] (Optional: Include a 200-word note on your favorite ops challenge you’ve solved in the past.) ⚠️ Final Note This role is not for someone who’s just looking to “support” others. This is for people who want to run the machine , build the engine , and solve problems that haven’t been solved before . If you’ve always wanted to be the person who doesn’t just get asked to execute—but is the one who designs how things should run— we’re looking for you . Come build the operating system of one of India’s most ambitious AI companies. Apply now and be part of the journey to build from India, for the world. Show more Show less

Alternate Job Titles: Senior Digital Design Engineer ASIC Design Engineer High-Speed SerDes Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understanding of USB, PCIe, Ethernet, Display, and HDMI protocol standards, and you thrive in a collaborative environment. Your expertise in Verilog RTL design, microarchitecture, and timing constraints development makes you a valuable asset to any team. You are adept at using tools like Spyglass for CDC/RDC/Lint and have excellent debugging skills. Your ability to propose and implement design updates based on various requirements, coupled with your experience in test coverage and physical design timing closure, sets you apart as a leader in your field. With a passion for innovation and a keen eye for detail, you are ready to take on new challenges and contribute to the success of Synopsys. What You’ll Be Doing: Driving and working on digital design for high-speed serial interface PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Proposing micro-architecture of design/design updates based on customer requirements, analog requirements, system performance improvements, Link layer interface changes, or overall robustness of design. Implementing RTL in Verilog and running Spyglass CDC/RDC/Lint. Collaborating with verification teams to test desired functionality and corner cases. Developing timing constraints, DFT insertion, and test coverage, and closing timing with physical design teams. Well versed in Micro-Architecture and Block Ownership, Design from scratch. The Impact You Will Have: Enhancing the performance and reliability of high-speed serial interface PHY IPs. Contributing to the development of cutting-edge technologies that power modern electronics. Driving innovation in digital design and influencing the future of semiconductor technology. Collaborating with cross-functional teams to deliver robust and high-quality designs. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous improvement and excellence. Supporting customers by providing high-performance and reliable IP solutions that meet their needs. What You’ll Need: 5-8 years of relevant experience in digital design for ASICs. Strong knowledge of Verilog RTL design and microarchitecture. Experience with timing constraints development and synthesis flow. Proficiency in using Spyglass or similar tools for Lint/CDC/RDC. Proficiency in scripting and automation using TCL, PERL, or Python. Excellent debugging skills and attention to detail. Who You Are: A collaborative team player with strong communication skills. A problem solver with a proactive approach to challenges. A detail-oriented professional with a passion for innovation. A self-motivated individual who thrives in a fast-paced environment. An adaptable engineer who can handle multiple tasks and priorities. The Team You’ll Be A Part Of: You will be part of the High-Speed SerDes Digital Design Team, a group of talented engineers dedicated to developing high-performance serial link PHY IPs. The team focuses on innovation, quality, and collaboration to deliver industry-leading solutions. Together, you will work on challenging projects that push the boundaries of technology and make a significant impact on the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Key Responsibilities Polymer Synthesis: Design, develop, and optimize emulsion polymerization, Polyurithane Dispersion (PUD) processes for the synthesis of water-based polymers for various applications Characterization: Conduct detailed chemical, physical, and mechanical testing of polymer products, including particle size analysis, viscosity measurements, and glass transition temperature (Tg) analysis. Scale-Up: Lead the scale-up of laboratory-scale processes to pilot and production-scale manufacturing while ensuring consistent quality and performance. Process Optimization: Improve process efficiencies, yields, and reproducibility through continuous process improvement strategies. Cross-Functional Collaboration: Collaborate with product development, marketing, and manufacturing teams to ensure that polymer products meet customer and regulatory requirements. Troubleshooting: Provide technical support for solving production issues related to emulsion polymerization processes and product quality. Documentation: Maintain comprehensive lab notebooks, write technical reports, and prepare presentations to communicate results and findings to internal and external stakeholders. Market Research: Stay updated with the latest trends and advancements in polymer science, particularly in emulsion polymerization, and provide input into the development of new product lines. Skills Required In-depth knowledge of emulsion polymerization techniques such as batch, semi-batch, and continuous processes. Strong understanding of polymer structure-property relationships. Experience with analytical techniques such as GPC, DSC, TGA, FTIR, NMR, GCMS, GPC etc. Familiarity with the development of polymer products for coatings, adhesives, paints, or similar industries. Knowledge of regulatory standards and environmental considerations for water-based polymers. Strong problem-solving, analytical, and communication skills. Technical/Functional Proficiency Required Emulsion Polymerization and PUD Techniques: Expertise in batch, semi-batch, and continuous emulsion polymerization processes. In-depth knowledge of free radical polymerization, dispersion polymerization, and miniemulsion polymerization. Knowledge of comonomers to tailor polymer properties, including hydrophobic/hydrophilic balance, Tg, and mechanical properties. Surfactants and Emulsifiers: Proficiency in selecting and using surfactants, emulsifiers, and stabilizers for emulsion polymer systems. Understanding of the impact of surfactants on particle size, stability, and final polymer properties. Polymer Characterization: Ability to use analytical tools for the characterization of polymer products: Particle size and distribution analysis using DLS or laser diffraction. Molecular weight distribution using Gel Permeation Chromatography (GPC). Glass transition temperature (Tg) and thermal stability using Differential Scanning Calorimetry (DSC) and Thermogravimetric Analysis (TGA). Mechanical properties such as tensile strength and elongation. Surface and interfacial properties using techniques like contact angle measurement. Formulation Chemistry: Experience with the formulation of emulsion polymers, PUD for specific applications such as adhesives, coatings, paints, textiles, or paper. Knowledge of additives (e.g., thickeners, coalescing agents, plasticizers) and their role in improving product performance. Educational Qualifications - Bachelor's/Master’s Degree in Chemistry, Polymer Science, Materials Engineering, or Chemical Engineering. Experience Level (If applicable) - Minimum 5-10 years of experience in emulsion polymer, PUD synthesis preferably in an industrial setting. Show more Show less

About Tata Electronics Private Limited Tata Electronics Pvt. Ltd. is a prominent global player in the electronics manufacturing industry, with fast-emerging capabilities in Electronics Manufacturing Services, Semiconductor Assembly & Test, Semiconductor Foundry, and Design Services. Established in 2020 as a greenfield venture of the Tata Group, the company aims to serve global customers through integrated offerings across a trusted electronics and semiconductor value chain. With a rapidly growing workforce, the company currently employs over 65,000 people and has significant operations in Gujarat, Assam, Tamil Nadu, and Karnataka, India. Tata Electronics is committed to creating a socioeconomic footprint by employing many women in its workforce and actively supporting local communities through initiatives in environment, education, healthcare, sports and livelihood. About the Job Description: Job Overview: Person will be responsible for developing multiple test chips for IP verification and drive optimized full-chip architecture for modular design. Will continue to push the boundaries of innovation by developing architectures that inherently support testability, with the objective of achieving zero-defect silicon. This will be driven by a "correct-by-construction" mindset throughout the design process. The role necessitates a comprehensive understanding and active involvement in all facets of VLSI development, including microarchitecture and platform architecture, front-end design, and design convergence. Additionally, the candidate will be responsible for overseeing the physical design and verification processes. Job Description: Full chip design for multimillion gates SoC Digital design and development (RTL) Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Manage IP dependencies, planning and tracking of all front-end design related tasks Driving the project milestones across the design, verification and physical implementations Minimum Qualifications: Minimum 12 years of solid experience Test Chip / SoC design Solid expertise and understanding of digital design concepts. Developing architecture and micro-architecture from specs Understanding of JTAG base test chip architecture for IP testability and enable programmable registers for IP testability Ability to review full chip top level test plans Hands-on working knowledge and expertise in FEV, Cadence LEC & Synopsys Design Compiler Synthesis. Ability to make effective decisions, even with incomplete information when time is of essence. Working knowledge of timing closure is a must. Work on key design collaterals such as SDC and UPF flows. Work with key stakeholders like PD, DFT and Verification to discuss the right collateral quality and identify solutions/workarounds. Demonstrated good post silicon bring up and debug experience Demonstrated good SoC/ Test-Chip integration exposure and its challenges Demonstrated good exposure to design verification aspects Having SoC specification to GDS to commercialization experience is highly desired Should possess a strong understanding of a particular technical area and accumulated significant experience in this area and other related areas. Provides direction, mentoring, and leadership to a small to medium sized groups. Should possess strong communication and leadership skills to ensure effective communication with Program Perform RTL coding for SS/SOC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Own the Clock-Domain crossing, Linting aspects of the overall design of the IP and the subsystem. Conduct timely review of the RTL progress and work with program managers to provide weekly update on the progress towards RTL milestones completion. Work closely with DFT, Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design Should possess expertise in front-end EDA tools sign-off and its flows. Ability to program with scripting languages such as Python or Perl is a plus. Highly motivated to seek out solutions and willing to learn new skills to fulfil job requirements. Proven interpersonal skills, leadership and teamwork. Understanding of various bus protocols AHB, AXI and peripherals like USB, SDCC Understanding of Memory controller designs and Microprocessors is an added advantage Understanding of Chip IO design and packaging is an added advantage Show more Show less

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com. www.silabs.com Meet the team: The Baseband Modem Design group, in HYD, is primarily responsible for designing and developing cutting-edge WIFI modem solutions which are integrated into low-power/line-powered SoCs used in Wireless-IOT products. The group is responsible for the RTL implementation of the new WIFI standards required in the IOT space market. The team actively collaborates with signal processing experts in defining the algorithms and implementing them. The team also verifies core modem functionality and works with extended Verification team to verify all the System level usecases involving the baseband modem. It also handles the pre-Si and post-Si validation. Responsibilities: Develop complex communications or signal processing blocks for wireless-IOT products. Understanding of OFDM/signal processing is strongly desired Collaborate with System Engineers to drive the definition of wireless blocks to meet product requirements. Proficiency in Matlab/C is strongly preferred Micro-architecture and RTL design of modules using Verilog/System Verilog HDL coding, adhering to quality standards. Prepare and hold Architecture, Design, and Verification reviews with technical staff throughout project lifecycle Pre-silicon verification utilizing a combination of block/chip-level test benches. Validation/bring-up of designs on silicon, providing support to cross-functional teams Apply Low-power digital circuit design concepts Skills required: Demonstrated ability to work with Systems team to micro-architect and design complex digital subsystems Understand Matlab algorithm implementation and translate to effective RTL micro-architectures Verilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to production Experience with logic simulators for both RTL and gate-level simulation, design/waveform browsers (like vc, Questasim), and power analysis tools Experience with logic synthesis, timing constraints and timing closure Experience in working with backend team to optimize design for power performance and area Experience with scripting and automation. Knowledge of Python, Perl, and Tcl Experience with revision control and configuration management systems (such as Perforce, Git, Methodics) Excellent written and verbal communications skills Demonstrated ability to generate high output in a self-driven manner Experience Level: 4-6 years in Industry Education Requirements: Master’s /Bachelors degree in Communications/Electronics Engineering Benefits & Perks : Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun. Equity Rewards (RSUs) Employee Stock Purchase Plan (ESPP) Insurance plans with Outpatient cover National Pension Scheme (NPS) Flexible work policy Childcare support Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law. Show more Show less

Physical Design Engineer (PD/STA/Synthesis) Must-Haves: • Tools: Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime for STA • Flow Experience: • Floorplanning • Power planning • Placement • Clock Tree Synthesis (CTS) • Routing • Physical Verification (DRC/LVS) • Timing Closure • Knowledge of: • Low-power design (UPF/CPF) • ECOs • IR Drop, EM Analysis • STA constraints and timing analysis Nice-to-Haves: • Experience with block-level and/or full-chip PD • Familiarity with scripting (Tcl, Perl, Python) Show more Show less

Job Title: Senior Engineer - FPGA Location: Ahmedabad, Pune, Bangalore Experience level: 5+ Years In depth knowledge with VHDL/Verilog/System Verilog, RTL design, FPGA design, and FPGA design tools. Complete FPGA development flow from logic design, place & route, timing analysis closure, simulation, verification, and validation Experience with Xilinx/Intel FPGA families and corresponding development tools Vivado/Quartus Experience in verification/simulation tools Modelsim/Questa-sim etc. Troubleshooting and debugging FPGA implementations on hardware boards Experience with debugging HW/SW issues and the use of equipment/tools such as oscilloscope, logic analyzer, Chipscope/ILA/Signal Tap Ability to understand synthesis reports, perform timing analysis and write FPGA design constraints Hands-on experience on communication protocols (UART/I2C/SPI etc.) and bus interfaces (AMBA/AXI etc.) Good understanding of digital electronics and design practices Ability to work independently as well as in team Effective interpersonal, communication, presentation and reporting skill Qualifications: Minimum B.E./B.Tech in Electronics/E&TC/ECE About eInfochips · eInfochips, an Arrow company, is a leading global provider of product engineering and semiconductor design services. With over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. The company’s service offerings include digital transformation and connected IoT solutions across various cloud platforms, including AWS and Azure. Along with Arrow’s $30B in revenues, 20,100 employees, and 349 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 200,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients through Arrow Connect. InfochipsInc. is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, sexual orientation, genderidentity, national origin, veteran or disability status. eInfochips (Arrow) COVID-19 Vaccination Policy: eInfochips (Arrow) requires employees to provide proof of full COVID-19 vaccination by December 1, 2021, for all positions located in CO and for business units within immix Group and Zeus. All other employees will be required to identify vaccination status by December 1, 2021. Arrow COVID-19 Vaccination Policy: Arrow requires all new employees in the United States to provide proof of full COVID-19 vaccination prior to beginning work, except where prohibited by law. Show more Show less

Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 18-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Senior Staff Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background Introducing The Information’s 50 Most Promising Startups for 2024 We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 10years or MSEE/CE + 8 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

Senior Staff Physical Design Engineer Greater Bangalore -Hybrid/Hyderabad (Hybrid ) PrincipalPhysical Design Engineer Company Background Introducing The Information’s 50 Most Promising Startups for 2024 We are a well-funded, stealth-mode startup based in Mountain View, CA, founded by senior technical and business executives hailing from category leaders in infrastructure semiconductors and hyperscale cloud services, and backed by top-tier investors with an immensely successful formula & track record on early-stage investments. We are a diverse team of expert chip/software/systems architects and developers who excel in hardware/software solution co-design. Our team has built, and delivered into production, technologies that process over half of the world's global data center traffic. Summary Join an ambitious and highly experienced team of silicon and hyperscale data center systems experts as a Physical Design Engineer. Our team is motivated by a singular mission: to revolutionize the performance and scalability of next-generation distributed computing infrastructure. You have the opportunity to build a groundbreaking new category of product, working alongside some of the industry's most talented hardware and software engineers to create truly disruptive infrastructure solutions that delight our customers. We are looking for talented, motivated engineers with experience in physically implementing large-scale networking and computing semiconductor products, and who are looking to grow in a fast paced, dynamic startup environment. We are looking for experienced physical design engineers who have the range to contribute across the full lifecycle of complex chip development, from CAD tool flow setup, early floorplan exploration in conjunction with microarchitecture development, through block partitioning, power planning, clock network design and construction, through P+R, timing closure, package design, PI/SI analysis, physical verification, and tapeout. Roles and Responsibilities Build and support the CAD tool flow for physical implementation in a cloud-first development environment. Work with architects and microarchitects on the chip-level floorplan and block partitioning. Evaluate tradeoffs in functional partitioning, block size, and interface complexity with other stakeholders. Define and construct the major physical structures, including the clock and reset architecture, the power delivery network, and interconnect topologies. Execute on block-level, cluster-level, and top-level physical implementation, from synthesis, floorplan and power plan, through P+R, through timing closure, physical verification, and tapeout. Interface with foundry and library partners on 3rd party IP and process technology issues, including updates to device models, IP integration requirements, and pre-tapeout signoff. Skills/Qualifications : Proven industry experience and successful track record in the physical implementation of large, high-performance network switching/routing fabrics (Ethernet, Infiniband, HPC), Network Interface Controllers, Smart-NICs, CPUs, or GPUs in the latest silicon process nodes. Deep experience with the latest CAD tools through the entire physical design workflow, e.g., Cadence Genus and Innovus, Synopsys ICC2/FusionCompiler, Tempus, PrimeTime SI, PrimeTime PX, StarRC, ICV, Calibre. Strong familiarity with various analysis tools such as Redhawk, Voltus. Experience with circuit analysis using HSPICE is a plus. Expert knowledge of SystemVerilog, as well as Perl, Python or other scripting languages. Minimum BSEE/CE + 12 years or MSEE/CE + 10 years experience. Proven track record of execution on products which have shipped in high-volume. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

ASIC/SOC Front End Design Engineer Job description: 1. Setup ASIC QA flows for RTL design quality checks. 2. Understand the design: top level interfaces, clock structure, reset structure, RAMs, CDC boundaries, power domains. 3. Running Lint, Synthesis, LEC, Static timing analysis, CDC, RDC, DFT, CLP steps. 4. Come up with clock constraints, false paths, multi-cycle paths, IO delays, exceptions and waivers. 5. Checking the flow errors, design errors & violations and reviewing the reports. 6. Debugging CDC, RDC issues and come up with the RTL fixes. 7. Supporting DFX team for DFX controller integration, Scan insertion, MBIST insertion and DFT DRC & MBIST checks. 8. Handling multiple PNR blocks, building wrappers and propagating constraints, waivers, etc. 9. Flows or Design porting to different technology libraries. 10. Generating RAMs based on targeted memory compilers and integrating with the RTL. 11. Running functional verification simulations as needed. Job Requirements: 1. B.E/M.E/M.Tech or B.S/M.S in EE/CE with 3 to 5 years of relevant experience 2. ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes 3. Modern SOC tools including Spyglass, Synopsys design compiler & primetime, Questa CDC, Cadence Conformal, VCS simulation 4. Experience in signoff of front end quality checks & metrics for various milestones of the project 5. TCL, Perl, Python scripting Experience: 3 to 5 years Location: Hyderabad Notice Period: Immediate Show more Show less

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of its Graphics team working on the design of state of the art memory subsystem components used in their industry-leading Graphics Processors. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will be expected to make architectural trade-offs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks. What You’ll Be Doing Own micro-architecture and RTL development of design modules. Micro-architect features to meet performance, power and area requirements. Work with HW architects to define critical features. Collaborate with verification teams to verify the correctness of implemented features. Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable. Interact with FPGA and S/W teams to prototype the design and ensure that S/W is tested. Work on post-silicon verification and debug. What We Need To See BS / MS or equivalent experience. 4+ years of design experience. Experience in RTL design of complex design units for at least two or three projects. Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB). Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug. Expertise in Verilog. Ways To Stand Out From The Crowd Design experience in memory subsystem or network interconnect IP. Good debugging and problem solving skills. Scripting knowledge (Python/Perl/shell). Leadership experience in leading small 2-3 member teams. Good interpersonal skills and ability & desire to work as a part of a team. NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. JR1965573 Show more Show less

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Design and implement DFT IP w/ Verilog/SystemVerilog and/or VHDL Design and implement RTL for DFT IP incl. POST, IST Develop synthesis automation for DFT IP including synthesis and timing constraints, RTL insertion and verification Own and maintain, extend, and enhance existing DFT IP like LBIST We’re doing work that matters. Help us solve what others can’t. Show more Show less

Work Schedule Standard (Mon-Fri) Environmental Conditions Office Job Summary: We're seeing rapid growth in Synthetic Biology and custom research solutions, especially in biotech, pharma, and academic research. Our revenue is $1M, with a 20% annual growth projection for the next few years. A dedicated Business Development Manager is crucial to maintain momentum, build new businesses, expand our presence, and manage customer relationships. Key Responsibilities: Sales & Business Growth: Develop and implement a strategic sales plan to drive growth for GeneArt Gene Synthesis solutions and custom research solutions in the South Asia region. Identify and develop new business opportunities with biotech, pharma, academic, and government research institutions. Achieve and exceed sales targets by actively managing the sales pipeline and customer relationships. Customer Engagement & Relationship Management: Establish and maintain positive relationships with key decision-makers, scientists, and procurement teams. Understand customer research needs and offer tailored synthetic biology solutions. Conduct technical discussions and presentations to showcase the value of GeneArt offerings. Market & Competitive Intelligence: Supervise market trends, competitor activities, and emerging applications in synthetic biology. Provide market insights and customer feedback to internal teams to refine product offerings and strategies. Collaboration & Cross-functional Support: Work closely with internal teams, including marketing, product management, and technical support, to drive customer success. Support marketing initiatives such as conferences, webinars, roadshows, and workshops. Proposal & Contract Management: Manage customer proposals, quotations, and contract negotiations. Improve customer happiness through smooth order processing and post-sales support. Reporting & CRM Management: Maintain accurate records of customer interactions, sales activities, and pipeline progress in CRM systems. Provide regular sales reports, forecasts, and insights to senior management. Qualifications & Experience: Education: MSc or PhD in Life Sciences, Biotechnology, Molecular Biology, Synthetic Biology, or a related field. Experience: 7+ years of experience in sales, business development, or technical support in synthetic biology, gene synthesis, or molecular biology products. Technical Knowledge: Strong understanding of gene synthesis, molecular cloning, CRISPR, protein expression, and related workflows. Skills: Excellent communication and negotiation skills. Ability to engage with both technical and commercial collaborators. Strong problem-solving skills and a proactive approach to business development. Preferred: Prior experience working with GeneArt solutions or other gene synthesis platforms is a plus. At Thermo Fisher Scientific, each one of our 125,000+ outstanding minds has an unusual story to tell. Join us and contribute to our outstanding mission—enabling our customers to make the world healthier, cleaner, and safer. Apply today http://jobs.thermofisher.com Thermo Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status. Show more Show less

Job title : Associate Expert Scientific Writer – Health Economics and Value Assessment (HEVA) Hiring Manager: Head/Group Lead/Team Lead HEVA Location: Hyderabad % of travel expected: Travel required as per business need Job type: Permanent and Full time About the job Our Team: Sanofi Business Operations(SBO) is an internal Sanofi resource organization based in India and is setup to centralize processes and activities to support Specialty Care, Vaccines, General Medicines, CHC, CMO, and R&D, Data & Digital functions. SGH strives to be a strategic and functional partner for tactical deliveries to Medical, HEVA, and Commercial organizations in Sanofi, Globally. Main responsibilities: The overall purpose and main responsibilities are listed below: Create HEVA communication deliverables (including manuscripts, posters, abstracts, slide decks) aligned with HEVA strategy and global HEVA communication plan across relevant business units and product teams. Contribute to execution of HEVA communication plans with relevant medical communication plans to ensure evidence needs for healthcare decision makers are consistently identified and prioritized in communication plans, supporting integrated clinical and health economic evidence in support of the value of products. Manage core HEVA communication processes, templates, and products across the portfolio in accordance with the scientific and value messages aligned with Core Value Dossier, the US AMCP Dossier, and HEVA contributions as appropriate to other submissions. Ensure Core Value Decks for key products are established and maintained, making available a regularly updated synthesis of critical HEVA evidence on the value of products. Maintain accountability for adherence to the publication standard operating procedure (SOP) and other compliance expectations relevant to HEVA communication processes. Seek opportunities to innovate HEVA value communications to increase the relevance and impact of HEVA evidence and inform optimal access and reimbursement decisions. Create complex and specialized content without supervision. Develop and maintain therapeutic area expertise. Coach and review content created by senior and junior HEVA writers and develop and review content created by them. Manage end-to-end publication content development process including documentation and approval in process in iEnvision (previously, Datavision/Matrix). Collaborate effectively with stakeholders: HEVA, RWE, and Scientific communication global and/or local teams. People: (1) Maintain effective relationships with the end stakeholders (Medical scientific community) within the allocated GBU and product – with an end objective to develop education and communication content as per requirement for HEVA communications; (2) Interact effectively with healthcare professionals on publication content; and (3) Constantly assist writers (senior or junior) in developing knowledge and sharing expertise Performance: (1) Create HEVA communications deliverables (including manuscripts, posters, abstracts, and slide decks) aligned with HEVA strategy and global HEVA communication plan across relevant business units and product teams as per agreed timelines and quality; and (2) Provide strategic support with individuals and institutions, which may serve as resources for publications purpose, etc Process: (1) Develop complex or priority publications material without supervision; 2) Develop subject matter expertise for the assigned therapeutic area; (3) Work with assigned scientific communication team in conducting comprehensive publication-need analysis; (4) Manage core HEVA communication processes, templates, and products across the portfolio in accordance with the scientific and value messages aligned with Core Value Dossier, the US AMCP Dossier, and HEVA contributions as appropriate to other submissions; (5) Ensure Core Value Decks for key products are established and maintained, making available a regularly updated synthesis of critical HEVA evidence on the value of products; (6) Maintain accountability for adherence to the publication SOP and other compliance expectations relevant to HEVA communication processes; (7) Maintain accountability for adherence to the publication SOP and other compliance expectations relevant to HEVA communication processes; (8) Implement the publication plan and associated activities for the year identified for the region; (9) Work with selected vendors within the region to deliver the required deliverables as per defined process; (10) Leverage advanced training delivery tools and techniques thereby enhancing the effectiveness of training delivery; (11) Design an overall plan of action based on end-user feedback and improve course content and delivery; and 12) Take active participation in designing and/or delivering training Stakeholder: (1) Work closely with HEVA global and local teams, RWE global and local teams and scientific communication teams in regions/areas to identify publications needs and assist in developing assigned deliverables; and (2) Liaise with HEVA global and local teams to prepare relevant and customized deliverables About you Experience : 5-7 years of experience in content creation for the pharmaceutical/healthcare industry, or academia Soft skills : Stakeholder management; communication skills; and ability to work independently and within a team environment Technical skills : Relevant training/experience in health economics, public health, epidemiology, or other relevant health-related scientific discipline (including but not limited to therapeutic area/domain knowledge exposure; knowledge of Good Publication Practice; publication submission; and/or project management) Education : Advanced degree in life sciences/pharmacy/similar discipline or medical degree Languages : Excellent knowledge of English language (spoken and written) Pursue progress, discover extraordinary Better is out there. Better medications, better outcomes, better science. But progress doesn’t happen without people – people from different backgrounds, in different locations, doing different roles, all united by one thing: a desire to make miracles happen. So, let’s be those people. At Sanofi, we provide equal opportunities to all regardless of race, colour, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, or gender identity. Watch our ALL IN video and check out our Diversity Equity and Inclusion actions at sanofi.com! null

Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop highly innovative electronic products faster and more cost-effectively. Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. This role is based in Bengaluru. But you’ll also get to visit other locations in India and globe, so you’ll need to go where this job takes you. In return, you’ll get the chance to work with teams impacting entire cities, countries, and the shape of things to come. We make real what matters! This is your role Deploy Siemens EDA ProFPGA prototyping software and hardware solutions at customers and guide the customers to successful design bring-up Work closely with R&D to solve problems, review product specs, and find good general solutions that improve the overall product Train AE’s and customers on the solutionWin pre-sales engagements in cooperation with the technical sales teams Successfully deploy our solutions at early customer sites. This means educating the customer on best practices and tool requirements. It also means working with R&D to make the tool improvements necessary for the customer’s success. Ensure existing customers maximize the value they receive from the solution by developing and enhancing methodology that exploits the solution’s capabilities Ensure customers are kept up-to-date with the latest enhancements Provide customer requirements to R&D and marketing Work with QA and Docs to help them create tests and documentation that will improve our solutions Create examples and tutorials that are shipped with our products. Develop and/or refine methodology employed in creating and using prototypes and maximizing the value of our prototyping solution We don’t need superheroes, just super minds! A good understanding of FPGA based hardware prototyping platforms Working knowledge of multi FPGA prototyping flows(Synthesis, partitioning, PnR, runtime and debug) Practical insights into the application and usage of FPGA prototyping systems Knowledge of design mapping, testbench mapping and transactor development Expertise of hardware/software debug solutions related to FPGA prototyping Knowledge of test bench acceleration, ICE and co-model solutions Highly proficient in HDLs (Verilog/SV) for RTL design and HVLs (SV/UVM) for verification Solid background in Functional Verification, RTL synthesis and PnR flows Conversant with SoC design and architecture concepts Good communication and inter-personal skills. #disw We are Siemens A collection of over 377,000 minds building the future, one day at a time in over 200 countries. We're dedicated to equality, and we encourage applications that reflect the diversity of the communities we work in. All employment decisions at Siemens are based on qualifications, merit and business need. Bring your curiosity and creativity and help us shape tomorrow! We offer a comprehensive reward package which includes a competitive basic salary, variable pay, other benefits, pension, healthcare and actively support working from home. At Siemens, we are always challenging ourselves to build a better future. We need the most innovative and diverse Digital Minds to develop tomorrow’s reality. Find out more about the Digital world of Siemens here: www.siemens.com/careers/digitalminds We are an equal opportunity employer and value diversity at our company. We do not discriminate based on race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. Siemens Software. Where today meets tomorrow Show more Show less

Work Schedule Standard (Mon-Fri) Environmental Conditions Office Job Description Job Summary: We're seeing rapid growth in Synthetic Biology and custom research solutions, especially in biotech, pharma, and academic research. Our revenue is $1M, with a 20% annual growth projection for the next few years. A dedicated Business Development Manager is crucial to maintain momentum, build new businesses, expand our presence, and manage customer relationships. Key Responsibilities: Sales & Business Growth: Develop and implement a strategic sales plan to drive growth for GeneArt Gene Synthesis solutions and custom research solutions in the South Asia region. Identify and develop new business opportunities with biotech, pharma, academic, and government research institutions. Achieve and exceed sales targets by actively managing the sales pipeline and customer relationships. Customer Engagement & Relationship Management: Establish and maintain positive relationships with key decision-makers, scientists, and procurement teams. Understand customer research needs and offer tailored synthetic biology solutions. Conduct technical discussions and presentations to showcase the value of GeneArt offerings. Market & Competitive Intelligence: Supervise market trends, competitor activities, and emerging applications in synthetic biology. Provide market insights and customer feedback to internal teams to refine product offerings and strategies. Collaboration & Cross-functional Support: Work closely with internal teams, including marketing, product management, and technical support, to drive customer success. Support marketing initiatives such as conferences, webinars, roadshows, and workshops. Proposal & Contract Management: Manage customer proposals, quotations, and contract negotiations. Improve customer happiness through smooth order processing and post-sales support. Reporting & CRM Management: Maintain accurate records of customer interactions, sales activities, and pipeline progress in CRM systems. Provide regular sales reports, forecasts, and insights to senior management. Qualifications & Experience: Education: MSc or PhD in Life Sciences, Biotechnology, Molecular Biology, Synthetic Biology, or a related field. Experience: 7+ years of experience in sales, business development, or technical support in synthetic biology, gene synthesis, or molecular biology products. Technical Knowledge: Strong understanding of gene synthesis, molecular cloning, CRISPR, protein expression, and related workflows. Skills: Excellent communication and negotiation skills. Ability to engage with both technical and commercial collaborators. Strong problem-solving skills and a proactive approach to business development. Preferred: Prior experience working with GeneArt solutions or other gene synthesis platforms is a plus. At Thermo Fisher Scientific, each one of our 125,000+ outstanding minds has an unusual story to tell. Join us and contribute to our outstanding mission—enabling our customers to make the world healthier, cleaner, and safer. Apply today http://jobs.thermofisher.com Thermo Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.

Hello Talented Techie! To tackle the biggest challenges of our time, we need inquisitive minds with the ambition to make the impossible possible. Siemens is your place to thrive, challenge the status quo, make a difference, and grow in a team of innovators who share your passion for tech. Are you in? We are looking for: Senior UX Designer You’d describe yourself as: Responsible for delivering all aspects of design, from defining customer needs to delivering concepts and prototypes to UI specifications for development Identify future opportunities and work as a key thought partner with your counterparts in product, engineering, and operations Best Utilization of industry design standards and practices to define and implement design criteria, design guidelines, and design specifications. Collaborate closely with Project Lead, Project Manager and development team in planning, prioritizing, requirements analysis, task analysis, conceptual modeling, interaction design, and usability testing. Design system knowledge to build simple, sophisticated experiences Support product/project teams (product owners, designers, engineering) throughout the project life cycle – recommending appropriate methodology, scoping, and coordinating the entire process, facilitating in-field research and post-research synthesis through analysis. Produce user requirements specifications, personas, storyboards, scenarios, user flow diagrams, wireframes, design prototypes, and design specifications. You’ll create impact by: B.E/B. Tech graduate in any branch of engineering or in B. Des (any branch of Design) 5 to 8 Years of relevant experience in UX Design. A portfolio showcasing high-quality designs and problem-solving ability Proficiency with UX design process, Lean UX methodologies will make valuable contributions. Proven understanding of user testing methods & technologies. Hands on expertise in using tools such as Abode XD, Photoshop, illustrator, Axure, Sketch Possess excellent facilitation, presentation and interpersonal skills will make valuable contributions. Create a better #TomorrowWithUs! We value your outstanding identity and perspective and are fully committed to providing equitable opportunities and building a workplace that reflects the diversity of society. Come bring your authentic self and create a better tomorrow with us. Protecting the environment, conserving our natural resources, encouraging the health and performance of our people as well as safeguarding their working conditions are core to our social and business dedication at Siemens.

Work Schedule Standard (Mon-Fri) Environmental Conditions Office Job Description Job Summary: We're seeing rapid growth in Synthetic Biology and custom research solutions, especially in biotech, pharma, and academic research. Our revenue is $1M, with a 20% annual growth projection for the next few years. A dedicated Business Development Manager is crucial to maintain momentum, build new businesses, expand our presence, and manage customer relationships. Key Responsibilities: Sales & Business Growth: Develop and implement a strategic sales plan to drive growth for GeneArt Gene Synthesis solutions and custom research solutions in the South Asia region. Identify and develop new business opportunities with biotech, pharma, academic, and government research institutions. Achieve and exceed sales targets by actively managing the sales pipeline and customer relationships. Customer Engagement & Relationship Management: Establish and maintain positive relationships with key decision-makers, scientists, and procurement teams. Understand customer research needs and offer tailored synthetic biology solutions. Conduct technical discussions and presentations to showcase the value of GeneArt offerings. Market & Competitive Intelligence: Supervise market trends, competitor activities, and emerging applications in synthetic biology. Provide market insights and customer feedback to internal teams to refine product offerings and strategies. Collaboration & Cross-functional Support: Work closely with internal teams, including marketing, product management, and technical support, to drive customer success. Support marketing initiatives such as conferences, webinars, roadshows, and workshops. Proposal & Contract Management: Manage customer proposals, quotations, and contract negotiations. Improve customer happiness through smooth order processing and post-sales support. Reporting & CRM Management: Maintain accurate records of customer interactions, sales activities, and pipeline progress in CRM systems. Provide regular sales reports, forecasts, and insights to senior management. Qualifications & Experience: Education: MSc or PhD in Life Sciences, Biotechnology, Molecular Biology, Synthetic Biology, or a related field. Experience: 7+ years of experience in sales, business development, or technical support in synthetic biology, gene synthesis, or molecular biology products. Technical Knowledge: Strong understanding of gene synthesis, molecular cloning, CRISPR, protein expression, and related workflows. Skills: Excellent communication and negotiation skills. Ability to engage with both technical and commercial collaborators. Strong problem-solving skills and a proactive approach to business development. Preferred: Prior experience working with GeneArt solutions or other gene synthesis platforms is a plus. At Thermo Fisher Scientific, each one of our 125,000+ outstanding minds has an unusual story to tell. Join us and contribute to our outstanding mission—enabling our customers to make the world healthier, cleaner, and safer. Apply today http://jobs.thermofisher.com Thermo Fisher Scientific is an EEO/Affirmative Action Employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other legally protected status.