2242 Synthesis Jobs - Page 23

Imagine steering a ship from its maiden voyage to becoming a fleet leader. As a Principal Product Manager at Trilogy, you're not just setting sail; you're navigating uncharted waters with purpose and precision. Forget the mundane backlog management and spec filling; your mission is to achieve a tangible, impactful business result. With AI as your ally and user feedback as your compass, you'll carve a path to success with agility and insight. Join us in redefining product management. Your role is not about maintaining the status quo but about achieving a singular, significant goal. Dive deep into user insights, leverage AI, and drive product evolution through rapid, data-informed iterations. If you're ready to break away from the conventional PM mold and make a real difference, we want you on our team. Help us create the future of product management. What You Will Be Doing Craft BrainLifts: Develop a dynamic repository of expert knowledge that enhances AI capabilities, informs decision-making, and demonstrates your domain expertise. Drive Product Evolution: Implement small, data-centric product improvements weekly to guide the product towards a defined, measurable goal. Master the Domain: Achieve a comprehensive, structured understanding of a specific domain to elevate decision-making, produce tailored outputs, and communicate with authority. What You Won’t Be Doing Spending extensive time developing new features; our goal is to release new features weekly. Drafting lengthy PRDs, managing backlogs, or detailing every screen and edge case. Engaging in technical solution development or software architecture design. Basic Requirements Principal Product Manager key responsibilities 4+ years of experience in a product leadership role within a software company, where you have independently crafted the vision of an entire product, defined its roadmap, and refined it based on usage metrics or customer insights (not limited to a feature within a larger product or internal development). Experience with software product management for large enterprises, understanding the nuances of enterprise software selection, purchase, and adoption processes. A passion for integrating AI into your daily workflow, whether for research, analysis, synthesis, or strategic purposes. About Trilogy Hundreds of software businesses run on the Trilogy Business Platform. For three decades, Trilogy has been known for 3 things: Relentlessly seeking top talent, Innovating new technology, and incubating new businesses. Our technological innovation is spearheaded by a passion for simple customer-facing designs. Our incubation of new businesses ranges from entirely new moon-shot ideas to rearchitecting existing projects for today's modern cloud-based stack. Trilogy is a place where you can be surrounded with great people, be proud of doing great work, and grow your career by leaps and bounds. There is so much to cover for this exciting role, and space here is limited. Hit the Apply button if you found this interesting and want to learn more. We look forward to meeting you! Working with us This is a full-time (40 hours per week), long-term position. The position is immediately available and requires entering into an independent contractor agreement with Crossover as a Contractor of Record. The compensation level for this role is $100 USD/hour, which equates to $200,000 USD/year assuming 40 hours per week and 50 weeks per year. The payment period is weekly. Consult www.crossover.com/help-and-faqs for more details on this topic. Crossover Job Code: LJ-5623-IN-Mumbai-PrincipalProdu.002

Ready to break free from the traditional product management treadmill? Imagine driving a product with laser focus on real-world outcomes instead of managing endless backlogs. At Trilogy, we're redefining what it means to be a product leader. We don't want someone to maintain a roadmap—we need a visionary who can achieve measurable business impact through rapid iteration, deep user understanding, and AI-enhanced decision making. This isn't about checking boxes or creating beautiful process diagrams. It's about ownership of meaningful goals and the autonomy to pursue them with intelligence and velocity. You'll be the type of product leader who thrives without a predetermined map, who dives deep into user needs and domain complexities until the path forward becomes crystal clear. Join us in revolutionizing product management. We're building a team that values impact over busywork, decisions rooted in data over endless meetings, and sharp insights over bureaucracy. If you're ready to transform how products evolve and how users experience value, this is your opportunity to lead the charge. What You Will Be Doing Develop comprehensive BrainLifts—structured repositories of expert knowledge that enhance AI capabilities, inform strategic decisions, and demonstrate your domain mastery Execute rapid Product Iterations with weekly deployments focused on incremental improvements that drive measurable outcomes Cultivate specialized Domain Expertise to elevate team decision quality, create precisely tailored solutions, and establish authoritative communication channels What You Won’t Be Doing Orchestrating month-long feature development cycles—our rhythm is weekly shipping and continuous improvement Creating verbose documentation, maintaining extensive backlogs, or specifying every possible interface detail and edge case Engaging in technical implementation details or architectural design decisions Basic Requirements Director of AI Product Management key responsibilities Demonstrated success with 4+ years in product leadership, having personally crafted a complete software product's vision, strategy, and evolution based on quantifiable metrics and user insights (must be a standalone product, not a feature subset or internal/custom development) Proven experience managing enterprise software products, with deep understanding of the unique adoption patterns, purchasing cycles, and implementation requirements that distinguish enterprise clients from consumer or SMB markets Demonstrated passion for integrating AI technologies into your professional workflow, leveraging these tools for enhanced research capabilities, analytical processes, strategic synthesis, or planning methodologies About Trilogy Hundreds of software businesses run on the Trilogy Business Platform. For three decades, Trilogy has been known for 3 things: Relentlessly seeking top talent, Innovating new technology, and incubating new businesses. Our technological innovation is spearheaded by a passion for simple customer-facing designs. Our incubation of new businesses ranges from entirely new moon-shot ideas to rearchitecting existing projects for today's modern cloud-based stack. Trilogy is a place where you can be surrounded with great people, be proud of doing great work, and grow your career by leaps and bounds. There is so much to cover for this exciting role, and space here is limited. Hit the Apply button if you found this interesting and want to learn more. We look forward to meeting you! Working with us This is a full-time (40 hours per week), long-term position. The position is immediately available and requires entering into an independent contractor agreement with Crossover as a Contractor of Record. The compensation level for this role is $100 USD/hour, which equates to $200,000 USD/year assuming 40 hours per week and 50 weeks per year. The payment period is weekly. Consult www.crossover.com/help-and-faqs for more details on this topic. Crossover Job Code: LJ-5623-IN-NewDelhi-DirectorofAIPr1.002

Job Location: Pune Company Description Ferrero is a family-owned company with a truly progressive and global outlook and iconic brands such as Nutella®, Tic Tac®, Ferrero Rocher®, Raffaello®, Kinder Bueno® and Kinder Surprise®. As the love for our brands continues to grow, so too does our global reach. Represented in more than 50 countries, with products sold in more than 170, the Ferrero Group is loved by generations around the world. The secret to our global success? 40,000 dedicated employees who celebrate care and quality to craft a business, careers and brands we are proud of. Join us, and you could be one of them. Diversity Statement Ferrero is committed to building a diverse and inclusive culture in which all employees feel welcomed and appreciated and have the same opportunities. We believe all of our people are equally talented in their own way. In nurturing the curiosity and natural abilities of our employees, we provide them, generation after generation, the means to succeed personally and professionally, enabling them to craft their journey at Ferrero. The diversity of our talents is what makes our work environment multicultural, innovative and highly rewarding. About the Role: To manage all controlling related activities (includes Budgeting, Planning & Forecasting, Monthly Reporting, Cost Allocation & Recharge methodology and alignment on Statutory and Regulatory Compliances) for multiple Hubs like Asia IT DC, Demand Hub, Procurement Service Centre and Finance Shared Service Centre. Also interim in charge of 3PO Business Cases to financially assess the Make or Buy and facilitate relevant stakeholders in taking the strategic decisions and GAP Analysis of Actual vs Plan to identify corrective actions. Involvement in India Local Co-pack acceleration project to assess and confirm on the financial viability of each project and ensuring to include the same in BDG & PS Cycle . Main Responsibilities: PLANNING & FORECAST: Complete financial oversight of all delivery centres Operational expenditures/Revenue and Margins. Undertaking the whole activity of planning cycles BDG/SAF and LE, processes and review locally with Hub Manager and CFO. Support Hub Manager with detailed analysis to provide synthesis at local level during planning processes for OPEX activities. Plan and report for FINT/India Region through the planning and reporting systems (HFM, Oracle (ZEUS), SAP) assuring the correctness of Budget/SAF planning and monthly accounting closure (SAP). Establish a business partnership within Finance Community and ensuring complete alignment on BDG Guidelines on SG&A/Other Cost line item. Financial Evaluation of 3PO activities with a comparison of Make vs Buy and accordingly providing the inputs on cost benefit analysis for business case finalization and approval in Investment Committee. Upon approval of 3PO project along with Industrial controlling ensure to properly report it as discontinuity and impact of the same in next budgeting cycle. CONTROLLING & REPORTING: Supervise monthly actual results by closely liaising with Delivery centre budget owners, delta analysis and monitor the alignment with financial targets. Support in preparation of monthly closing deck stating the business update and on specific projects if any with detailed presentation including delta analysis of Actual vs Plan to Hub Manager and respective Area and Group Stakeholders. This needs to be aligned with New Controlling Model specifically designed for each Hub. Co-ordination with Local Admin/Reporting & Group Team for periodic intercompany ICM update and timely execution of invoicing of OPEX items from Asia DC to FINT, Demand hub to Other Subsidiaries and respectively for all the hubs. GAP Analysis Actual vs Plan of all 3PO projects (like Thermoforming, KSBC and FRM, Seasonal/Co-pack etc. to identify corrective actions. OTHER ACTIVITIES: Support deployment of Group Finance initiatives with impact on Hub Controlling activities, ex. SCOP implementation, New Organization roll-out, IT ICY recharges tool, S4H etc. Establish a full business partnership with All Hub Managers to understand business and convert them to financial impact if any on timely basis. Review and approval of POs, key approver within all the subsequent P2P process. Evaluating new initiatives and investments for all the hubs in reference to the OPEX driven by CAPEX in collaboration with Group Capex Controller. Coordinate with PMO and Line Managers to facilitate the project implementation and to monitor the alignment with Financial Target. Coordinate with Delivery center Manager, Central Delivery Team for Contracts based on Project guidelines, legal, taxation implication. Support Group 3PO during the negotiation phase to validate the cost proposed by Third party (by providing them the local insights). Who we are looking for: Education: Post Graduation with 4-7 years of experience SPECIFIC KNOWLEGE SAP,BW,HFM (Planning & Reporting tool) Excellent proficiency in English Job Referral Code : B How to be successful in the role and at Ferrero: Consumers, quality and care are at the heart of everything we do. So, to be successful at Ferrero, you’ll need to be just as consumer and product centric as we are - dedicated to crafting brilliant results for consumers around the world.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 The Role Play a critical role in shaping the next generation of AMD products, including CPUs, GPUs, and adaptive compute engines. Interface with large, globally distributed design teams to support complex and collaborative development efforts. Drive automation of Synthesis, Place and Route, Logic Eqv, Functional ECO methodologies targeting advanced technology nodes. Own the development and support of next-generation synthesis flows, ensuring scalability and efficiency across projects. Collaborate closely with EDA vendors to identify innovative solutions, resolve tool/methodology issues, and enhance flow capabilities. Contribute to the evolution of AMD’s design infrastructure by improving automation, performance, and methodology robustness. Key Responsibilities Responsible for developing and automating Synthesize, PnR and Functional ECO, for various designs at advanced technology nodes. Script out utilities to automate different components of the implementation flow. Support design teams across global sites on various issues related to Front-End Synthesis flow targets. CAD flow and methodology development on advanced process nodes are preferred. Tool Expertise Required Hands on experience in Front-End Synthesis, Logical Eqv and Conformal ECO flows. Hands on experience in industry standard tools such as DC, Fusion Compiler, FM,VCLP, ICC2, Innovus, Conformal. Hands on experience in any of PnR, STA, Formal Verification or RTL coding domains is a plus. CAD and automation mindset Academic Credentials Masters degree in Electronics Engineering 3-6 years of experience in CAD flow and methodology development on advanced nodes. Proficiency in one or more scripting languages namely Python, Tcl, Perl, sed/awk Strong problem-solving skills and analytical thinking Team player, good work ethic, and excellent communication skills. Job Location : Hyderabad Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Description Join our Multi-Asset Portfolio Solutions team as an Area Product Owner, where you'll play a pivotal role in shaping the future of product innovation. Drive value for customers, guide successful launches, and exceed expectations as a core leader. Collaborate directly with the business to enhance revenue, reduce costs, mitigate risks, and improve processes. As an Area Product Owner in the Multi-Asset Portfolio Solutions team, you will be an integral part of the Multi-Asset Portfolio Solutions team, supporting Fund and Portfolio Management Toolkit function through shaping the future of product innovation as a core leader. You are responsible for driving the direction of the platform, maintaining a Product Cabinet, and prioritizing decisions made for the platform. The Product work has substantial impact across the business/firm and is geared towards revenue enhancement, cost reduction, risk mitigation, process improvement, increasing reach for insights, or other priorities as defined by management. Job Responsibilities Own the product’s vision and execute your strategy to realize it, while rigorously applying product best practices to stay abreast of the latest market and technology opportunities. Complement a strong product intuition with data-informed evidence to actively manage the product backlog in an agile development environment. Critically evaluate data, information, ideas, and arguments when determining what should be built, and describe what is needed with well-written stories. Assist in the end-to-end development of Fund Management Toolkit and facilitating its integration with Portfolio Manager Toolkit. Develop and validate the methodologies for post trade data analysis and enhance the with appropriate data load. Facilitate the new fund launch in line with strategic objectives, while enhancing the intra system component integration viz. Exposures, PTS, Capacity, SAA etc. Incorporate existing tactical tools utilized by PMs on organizational platforms to develop long term strategic solutions. Drive data quality testing and improvement efforts across the Due Diligence platform. Distill insights from data across diverse users, business, and industry sources. Set motivating objectives for the business and your team with well-designed OKRs that measure success by the business outcomes your product achieves. Drive committed partnerships with your business stakeholders, Engineering, Design, and Product peers. Required Qualifications, Capabilities, And Skills Graduate / post-graduate, with a minimum of 10+ years of experience in Banking / Financial Services of which at least 5 years are as a hands-on product manager with demonstrable experience in agile product practices throughout the product lifecycle. Possesses a strong background in econometrics and analytics, with expertise in managing and analyzing complex data sets. Experience in statistical analysis and testing toolsets Familiarity with Product ownership model including project planning, Jira story writing, resource management, requirements management (elicitation, documentation, prioritization, etc.), process mapping, process design, procedure authoring, org design, capacity sizing, etc. High data literacy including data collection, synthesis, and translation of results into concrete actionable solutions. Organized and effective execution – work independently, set, and manage expectations, model work ethic, proactively manage efforts across multiple teams, rigorously communicate. Excellent documentation, analytical, and reasoning skills (e.g., adheres to best practices in meeting management, regularly completes tasks and conducts business with minimal supervision). Applies innovation and design thinking techniques to continually challenge and improve the efficiency, scale, and resilience of our platform. Ability to thrive and drive change in fast paced, complex agenda. Preferred Qualifications, Capabilities, And Skills Familiarity with at least one programming language (i.e., Python or Java). Proficiency in MySQL or GraphQL is preferred. Subject matter expert within Multi-Asset Portfolio Solutions or Portfolio Management Toolkit. Certified Scrum Product Owner (CSPO) certification preferred. ABOUT US JPMorganChase, one of the oldest financial institutions, offers innovative financial solutions to millions of consumers, small businesses and many of the world’s most prominent corporate, institutional and government clients under the J.P. Morgan and Chase brands. Our history spans over 200 years and today we are a leader in investment banking, consumer and small business banking, commercial banking, financial transaction processing and asset management. We recognize that our people are our strength and the diverse talents they bring to our global workforce are directly linked to our success. We are an equal opportunity employer and place a high value on diversity and inclusion at our company. We do not discriminate on the basis of any protected attribute, including race, religion, color, national origin, gender, sexual orientation, gender identity, gender expression, age, marital or veteran status, pregnancy or disability, or any other basis protected under applicable law. We also make reasonable accommodations for applicants’ and employees’ religious practices and beliefs, as well as mental health or physical disability needs. Visit our FAQs for more information about requesting an accommodation. About The Team J.P. Morgan Asset & Wealth Management delivers industry-leading investment management and private banking solutions. Asset Management provides individuals, advisors and institutions with strategies and expertise that span the full spectrum of asset classes through our global network of investment professionals. Wealth Management helps individuals, families and foundations take a more intentional approach to their wealth or finances to better define, focus and realize their goals.

Working Experience on Using CATIA V6 & PLM application. Experience in Door Latches, Glazings, Ambient lightling, Cameras, Radar, Comfort module of Seats, Main ECU etc Stellantis know-how Define technical solutions in coherence with project targets (performance, weight, cost) and technological constrains Develop cad model studies of complex systems made by multiple parts respecting feasibility and vehicle packaging constrains Guarantees the application of design rules and best practices Animation of technical meetings with suppliers, and monitoring of their activities Produce the design technical documentation Track deliverables on a weekly basisplanning basis, convergence and interface freeze Participation in technical meetings. Reporting and synthesis sharing to project Analysis of the robustness of 3D parts, convergence of technical problems with the different specialties (architecture, assembly) Introduce and follow up product design changes Participate to consultation and selection of suppliers Define the product CAD and BOM structure Operate according to Stellantis development process

Weʼre looking to automate our internal operations using cutting-edge agentic AI and LLM-driven tools. This effort will be led by the founding team in close collaboration with a dedicated Generative AI Engineer , who will help implement intelligent automation — and later scale it for external clients and products . Key Responsibilities Work closely with the leadership team to map internal processes that can benefit from AI-based automation (e.g., document handling, research synthesis, client onboarding, code generation, workflow orchestration). Build internal tools using LLMs and agent frameworks (LangChain, OpenAI Functions, AutoGen, CrewAI, etc.) for semi-autonomous task execution. Prototype, test, and refine agentic applications that integrate with internal systems (e.g., Notion, Slack, GitHub, Airtable, email, databases). As the automation matures internally, support the transition to external automation offerings for clients across domains. Maintain a portfolio of your work in GitHub, and contribute reusable components to the broader engineering team. Minimum Qualifications Bachelorʼs or Masterʼs degree in Computer Science, AI, Data Science, or a related technical field. Solid programming skills in Python and experience building backend services, APIs, or automation tools. Demonstrated ability to build and maintain agent-based apps using tools like LangChain, CrewAI, LlamaIndex , or custom orchestration frameworks. A strong GitHub portfolio of previous automation projects or agentic AI applications (personal or professional). Familiarity with REST APIs, cloud services (AWS/GCP), and tools like Docker, FastAPI, or Streamlit. Preferred Qualifications Experience integrating LLMs with external APIs and multi-step workflows (e.g., form parsing + summarization + ticket generation). Familiarity with tools like Zapier , Make , Airflow , or custom workflow engines . Understanding of retrieval-augmented generation (RAG) , embeddings, and prompt engineering best practices. Entrepreneurial mindset with a willingness to explore ambiguous spaces and iterate rapidly. What We Offer A unique opportunity to work directly with founders and AI researchers on defining the next era of automation. A fast-paced, early-stage startup culture with a focus on delivery, ownership, and learning . ESOPs , competitive compensation, and access to high-end compute infrastructure. Long-term growth opportunity to lead automation efforts both internally and across external enterprise deployments . How to Apply Apply on Linkedin with your GitHub portfolio , and a brief statement describing 1-2 agentic apps you've built.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Qualcomm Chennai is looking for a STA and Synthesis Engineer who is passionate in to work with cross-functional engineering teams. In this position, the engineer will be involved in all stages of the design and development cycles Synthesis, Static Timing Analysis and LEC of SoC/Cores Full chip and block level timing closure, IO budgeting for blocks Logical equivalence check between RTL to Netlist and Netlist to Netlist Knowledge of low-power techniques including clock gating, power gating and MV designs ECO timing flow Proficient in scripting languages (TCL and Perl). Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 1-3 yrs experience Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3076514

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualcomm Noida CPU team is hiring for developing high performance and power optimized custom CPU cores. Individuals to Handle hardening complex HMs from RTL to GDS [ Synthesis, PNR, Timing]. We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Desired Experience 2-5 years of experience in Physical design, STA. Solid understanding industry standard tools for physical implementation [ Genus, Innovus, FC, PT, Tempus, Voltas and redhawk]. Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3077790

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Required Skills and Experience : Bachelor’s or Master’s Degree or equivalent experience in Electronics Engineering, Microelectronics, Software Engineering or a related field. The role of Senior DFT engineer require 5+ years of industry experience with shown ability in DFT of highly sophisticated SOCs : Core skills include Scan Codec insertion, Memory BIST and Repair implementation, Logic BIST, ATPG, BSCAN & JTAG (IEEE1149.1 & IEEE1687), Fault Simulation, ATPG Fault models(SAF, TDF, SDD, PDT etc), SDF annotated gate level verification, Scan and Memory Diagnosis. Must have experience with Siemens, Synopsys and/or Cadence Cad tools. Shall have experience in coding with Verilog, VHDL, C/C++, TCL, Perl and or Python. Responsibilities - Accountable for innovative DFT implementation(Scan, MBIST, LBIST & Boundary Scan) at the RTL and Gate level for a given SOC at Hard macro and chip top level. Generate and validate ATPG patterns using simulations. Shall Validate the DFT implementation using RTL and Gate level simulation. Work with Multi-functional Teams on STA, Synthesis, LEC, CLP, verification & Validation. Support the Silicon bring up activities to guarantee the highest stability of the test patterns/program. Chip in to the overall DFT methodology development. Nice to have Skills/Experience :- Shall have Knowledge of IEEE 1149.6, 1500 and 1838. Good experience on Hierarchical Scan implementations with core wrapping concepts Experience in handling multi-clock domains and low power design implementation. Knowledge/Experience on SSN, 2.5D or 3D IC DFT implementation. Communicate effusively with multi-functional functional teams in different geographies and time Zones. Time management and multi-tasking skills. Job Location: You will be joining part of growing team in Hyderabad About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Leverages software and services to transform data into actionable insights to inform the organization's strategic and tactical business decisions. Collects, integrates, analyzes and presents information including from internal and external sources, developing insightful historic, current and predictive views of business operations. Works closely with supported functions to understand business priorities and KPIs. Applies accepted metrics, methods and tools to analyze appropriate datasets. Contributes to the development and delivery of basic Business Intelligence work-streams, including: Data synthesis and report generation. Works on standard, recurring and ad-hoc reporting needs and data analyses. Assists in efforts to develop and enhance data pipelines, workflows and queries based on larger data sets. Applies developed methods for identifying data patterns and trends in available information sources. Assist with the technical design, using object-oriented design techniques. Assistance in measuring performance, increasing efficiencies, and tracking global key initiatives. Optimizes the reporting for speed and efficiency. Creates visual contents in alignment with best UI experience and branding guidelines. Clarify questions brought up by business leaders regarding the reporting. Required Qualifications Diploma or equivalent work experience required. Minimum of 4 years of relevant experience or equivalent combination of education and experience in Business Intelligence. Good business English skills (Written and spoken). Good Advanced excel knowledge Knowledge of VBA Macros is an added advantage

DFT SMTS Silicon Design Engineer New Dehli, India Engineering 66818 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ AECG ASIC DFX - SMTS SILICON DESIGN ENGINEER T HE ROLE : AECG SSD ASIC is a centralized ASIC design group within AMD’s Adaptive and Embedded Computing Organization. The group consists of design teams located in several AMD locations in North America and Asia. It is primarily responsible for architecture, design, and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for cutting edge AMD products. As a member of the AECG SSD ASIC Group, you will help bring to life cutting-edge designs. As a member of the DFT design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. K EY RESPONSIBLITIES : Implementation and verification of DFT architecture and features Scan insertion and ATPG pattern generation ATPG patterns verification with gate-level simulation Test coverage and test cost reduction analysis Post silicon support to ensure successful bring up and enhance yield learning Working with a multi-functional and cross-GEOs team of engineers on DFT (design-for-test) and DFD (design-for-debug) architecture and methodology. Performing design-for-test (DFT) RTL design using architectural specifications and design generation flows Performing DFT RTL integration, synthesis, equivalency checking, timing analysis and defining constraints, verification of DFx logic at RTL and GLS. Writing and maintain DFT documentation and specifications. Developing CAD software, scripts and other support technology to enable successful construction of DFT logics in complex SoC design. Performing scan insertion, ATPG verification and test pattern generation Providing DFT feature bring-up and pattern debug support to production engineering team during first silicon bring-up, qualification and failure analysis. P REFERRED EXPERIENCE : Minimum 12 years of DFT design, integration, verification, ATPG and Silicon Debug experience. Demonstrated technical leadership and works well with cross-functional teams. Excellent communication and interpersonal skills Understanding of Design for Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.) Experience in complex ASIC design (multi-million gates) in DFT/DFD techniques such as JTAG/IEEE standards, scan and ATPG, on-chip test pattern compression and at-speed testing using PLL, memory BIST and repair, logic BIST, power-gating, on-chip debug logic, testing of high speed SerDes IO and analog design. Understanding various technologies that must work with DFT/DFD technology such as CPU’s, memory and I/O controllers, etc. Expertise in scan compression architecture, scan insertion and ATPG methodologies are essential. Working knowledge and experience in Verilog simulator and waveform debugging tools, proficiency in debugging both RTL and gate level simulations Experience in solving logic design or timing issues with integration, synthesis and PD teams. Good working knowledge of UNIX/Linux and scripting languages (e.g., TCL, c-shell, Perl), C++ programming Knowledge in EDA tools/methodology, such as synthesis, equivalency checking, static timing analysis. Knowledge of ATE and digital IC manufacturing test is a plus. Strong problem-solving skills. Team player with strong communication skills. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-RP1 AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

We require B.Sc Chemistry 0-3 years experience candidate, specially from Ahmedabad Gujarat location for R&D Synthesis. He will be responsible for conducting day to day R&D experiments as assigned by the HOD after completion of 3 months proper training. Job Types: Full-time, Permanent Pay: ₹10,000.00 - ₹15,000.00 per month Benefits: Provident Fund Schedule: Day shift Supplemental Pay: Overtime pay Yearly bonus Work Location: In person Application Deadline: 30/04/2025

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Qualcomm Noida CPU team is hiring for developing high performance and power optimized custom CPU cores. Individuals to Handle hardening complex HMs from RTL to GDS [ Synthesis, PNR, Timing]. We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Desired experience: 2-5 years of experience in Physical design, STA. Solid understanding industry standard tools for physical implementation [ Genus, Innovus, FC, PT, Tempus, Voltas and redhawk]. Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

This position is relevant for those with 0 – 3 years of experience. In this role, you will add value to the research requirements at TriChambers in an efficient, effective, and holistic manner. The work profile would entail identifying and delivering objective focused research analysis and synthesis that increases proactivity, as well as aids in incorporating best practices in our internal processes and external deliverables. We are looking for motivated individuals with a knack for business innovation who are driven by their desire to grow personally and professionally. While skills will be taken into consideration, factors such as work ethic, willingness to learn, and motivation will be critical. We are open to applications from all fields and qualifications. All individuals should be willing to work across verticals of management. An indicative list of research areas under which work will be conducted is provided below: Ongoing Mandates : Adding value to ongoing mandates by proactively researching on industry trends, competitor profiling, best practices, growth projection, and opportunity scanning, amongst others. Business Building : Conducting primary, secondary, and tertiary research to support business building initiatives which includes identifying clients, understanding pain points, researching on suitable solutions, as well as gathering general information. Thought Leadership : Utilising statistical, economic, and data modelling tools, as well as qualitative methods of analysis, to contribute to the company’s thought leadership initiatives across different industries. Knowledge Dissemination : Developing presentations and reports, providing key research findings, converting data into usable formats, and identifying effective ways of knowledge dissemination internally and externally. Internal Best Practices : Supporting the continuous expansion and improvement of the company’s knowledge assets, innovating best practices for an effective and efficient work environment, and based on research, recommending short-term and long-term strategies for the company. Notes: Please note that you will be working out of our office in Mumbai. Additionally, given the volume of applications received by us, we will only be able to respond to you if you have been shortlisted. This note is applicable at all stages of the selection process, and if shortlisted, you will receive responses from us within a maximum of 7 days, failing which, we wish you all the best for your future endeavours.

As a candidate for the role, you should possess a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or have equivalent practical experience. Additionally, you need to have at least 5 years of experience in Application-Specific Integrated Circuit (ASIC) design for test, including managing the silicon life cycle through DFT pattern bring-up on Automatic Test Equipment (ATE) and manufacturing. It is crucial that you have familiarity with ATPG, Low Value (LV), Built-in Self Test (BIST), or Joint Test Action Group (JTAG) tool and flow. Preferred qualifications for this position include proficiency in a programming language such as Perl, along with experience in Synthesis, Lint, Change Data Capture (CDC), Local Enhanced Content (LEC), DFT timing, and Static Timing Analysis (STA). An understanding of performance design DFT techniques, end-to-end flows in Design, Verification, DFT, and Partner Domains (PD), as well as the ability to scale DFT will be advantageous. Joining our team means being part of a group that continually pushes boundaries, focusing on developing custom silicon solutions that drive the future of Google's direct-to-consumer products. Your contributions will play a pivotal role in the innovation that underpins products adored by millions globally. Your expertise will be instrumental in shaping the next wave of hardware experiences, delivering unmatched performance, efficiency, and integration. At Google, our mission is to organize the world's information and make it universally accessible and useful. Our collaborative team leverages the best of Google AI, Software, and Hardware to create exceptionally helpful experiences. We are dedicated to researching, designing, and developing new technologies and hardware to make computing faster, seamless, and more powerful, ultimately aiming to enhance people's lives through technology. In this role, your responsibilities will include collaborating with a team focusing on Design for testing (DFT) verification, Pattern generation, Standard Delay Format (SDF) simulations, and Static Timing Analysis (STA) checks. You will be tasked with writing a Pattern delivery using Automatic Test Pattern Generation (ATPG), contributing to Silicon bring-up, working on Yield, Vmin or Return Materials/Merchandise Authorization (RMA) debug, and delivering debug patterns, as well as performing Silicon data analysis.,

Location Karnataka Bengaluru Experience Range 8 - 10 Years Job Description Senior IO-MMU Design Engineer Role Overview: Leads the design and integration of IO Memory Management Units (IO-MMUs) for secure, virtualized, and high-performance SoC architectures. Key Responsibilities: Architect and implement RTL for IO-MMU subsystems Define IO translation and access control logic Collaborate with SoC, interconnect, and virtual memory teams Ensure compliance with IOMMU standards (SMMU, PCIe ATS/PRI, RMRR) Deliver Lint, CDC, synthesis, and DFT clean designs Required Skills: 8+ years of experience in SoC and IP-level RTL design Strong in SystemVerilog, with knowledge of memory protection and address translation Experience with SoC virtual memory systems and PCIe/AXI protocols Familiar with coherency, TLB, page walk and IOVA mechanisms Skilled in timing closure and formal/CDC tools

This Job is based in Australia One of Australia’s leading research & teaching universities Vibrant campus life with a strong sense of community & inclusion Enjoy a career that makes a difference by collaborating & learning from the best At UNSW, we pride ourselves on being a workplace where the best people come to do their best work. The DNA Nanotech Lab at UNSW Sydney is recruiting a postdoctoral researcher to join a team working at the interface of supramolecular chemistry, DNA nanotechnology, and biomaterials science. The successful candidate will build functional, responsive systems from the bottom up using DNA and RNA self-assembly, under the supervision of Dr. Felix Rizzuto. This is a hands-on research role with significant intellectual freedom. The appointee will design and execute programs that leverage the chemistry of small and light-activated molecules for non-equilibrium DNA systems; characterise materials using advanced imaging (AFM, TEM), fluorescence spectroscopy, and biostructural tools; and collaborate with a diverse team of students and researchers across chemistry, biology, and materials science. Opportunities exist for the fellow to supervise students, collaborate with industry partners on translational research, contribute to grant development, and establish new lines of inquiry within the group’s broader mission. For more info on the group, see https://www.rizzutogroup.org/.. About The Role $113K - $121K plus 17% Superannuation and annual leave loading Fixed Term – 2 years Full-time (35 hours per week) The role reports to Scientia Senior Lecturer Dr. Felix Rizzuto and has no direct reports. About Us UNSW isn’t like other places you’ve worked. Yes, we’re a large organisation with a diverse and talented community; a community doing extraordinary things. But what makes us different isn’t only what we do, it’s how we do it. Together, we are driven to be thoughtful, practical, and purposeful in all we do. If you want a career where you can thrive, be challenged, and do meaningful work, you’re in the right place. The School of Chemistry is internationally recognised for its excellence in research and teaching. Our mission is to nurture students to become leaders who will generate societal, economic, and environmental benefits. The School is one of the largest and most prestigious schools in Australia for thriving research programs. Our School’s QS ranking for 2025 is #49 globally and the highest in Australia. For further information on the School go to https://www.unsw.edu.au/science/our-schools/chemistry Specific Responsibilities For This Role Include Contribute independently or as a team member in collaborative research with a focus to enhance the quality of research outcomes in the discipline area. Conduct research (as per the norms of the discipline) and/or enable research teams to create scholarly output that is recognised by peers. Undertake specific research project/s under the guidance of a research leader and contribute to development of research activities. Support the dissemination of research outcomes through appropriate channels and outlets. Undertake discipline-appropriate research activities, e.g. surveys, literature reviews, data gathering and/or recording of results using appropriate research methods. Participate in and/or present at conferences and/or workshops relevant to the project as required. Assist with the supervision of research students in the research area where required. Align with and actively demonstrate the Code of Conduct and Values. Cooperate with all health and safety policies and procedures of the university and take all reasonable care to ensure that your actions or omissions do not impact on the health and safety of yourself or others. About The Successful Applicant (Selection Criteria) To Be Successful In This Role You Will Have A PhD in Chemistry, Biotechnology, Nanotechnology, or a related discipline. Strong prior experience in DNA nanoscience and/or DNA origami synthesis and characterisation. Previous experience with non-academic and industry projects is desirable. Demonstrated expertise in supramolecular chemistry, computational modelling, and/or biochemistry is desirable. Demonstrated ability to undertake high quality academic research and conduct independent research with limited supervision. Evidence of supervision or mentoring of students. Demonstrated track record of publications and conference presentations relative to opportunity. Evidence of highly developed interpersonal skills, ability to work in a team, collaborate across disciplines and build effective relationships. An understanding of and commitment to UNSW’s aims, objectives and values in action, together with relevant policies and guidelines. Knowledge of health and safety responsibilities and commitment to attending relevant health and safety training. You should systematically address the selection criteria listed above in your application. Please apply online - applications will not be accepted if sent to the contact listed. Contact : Felix Rizzuto E: f.rizzuto@unsw.edu.au Applications close: August 12th, 2025 Find Out More About Working At UNSW At Www.unsw.edu.au UNSW is committed to equity diversity and inclusion. Applications from women, people of culturally and linguistically diverse backgrounds, those living with disabilities, members of the LGBTIQ+ community; and people of Aboriginal and Torres Strait Islander descent, are encouraged. UNSW provides workplace adjustments for people with disability, and access to flexible work options for eligible staff. The University reserves the right not to proceed with any appointment.

At PwC, our people in project portfolio management focus on optimising project portfolios to drive strategic business outcomes. These individuals oversee project selection, prioritisation, and resource allocation to facilitate successful project delivery. In programme management at PwC, you will oversee and coordinate multiple projects to facilitate successful delivery and alignment with organisational goals. Your work will involve strong leadership, communication, and problem-solving skills. Enhancing your leadership style, you motivate, develop and inspire others to deliver quality. You are responsible for coaching, leveraging team member’s unique strengths, and managing performance to deliver on client expectations. With your growing knowledge of how business works, you play an important role in identifying opportunities that contribute to the success of our Firm. You are expected to lead with integrity and authenticity, articulating our purpose and values in a meaningful way. You embrace technology and innovation to enhance your delivery and encourage others to do the same. Examples Of The Skills, Knowledge, And Experiences You Need To Lead And Deliver Value At This Level Include But Are Not Limited To: Analyse and identify the linkages and interactions between the component parts of an entire system. Take ownership of projects, ensuring their successful planning, budgeting, execution, and completion. Partner with team leadership to ensure collective ownership of quality, timelines, and deliverables. Develop skills outside your comfort zone, and encourage others to do the same. Effectively mentor others. Use the review of work as an opportunity to deepen the expertise of team members. Address conflicts or issues, engaging in difficult conversations with clients, team members and other stakeholders, escalating where appropriate. Uphold and reinforce professional and technical standards (e.g. refer to specific PwC tax and audit guidance), the Firm's code of conduct, and independence requirements. Future of Work: Research Analysts collect, analyze, and interpret workforce data, supporting the Future of Work team’s research initiatives. They play a crucial role in developing insights that inform workforce strategies, talent planning, and organizational adaptability. Key Responsibilities: Perform detailed data analysis on workforce trends, using both internal and external data sources. Assist in drafting and editing research reports, white papers, and presentations. Conduct qualitative research, such as employee interviews and case studies, to complement quantitative data. Collaborate with other departments to translate research findings into actionable insights. Technical Skills: Data Collection & Survey Design Core Skill : Gathering and processing workforce data from diverse sources. Underlying Abilities: Survey administration: Create and distribute surveys to gather workforce data (e.g., employee satisfaction, job market trends). Data cleaning: Ensure datasets are free from errors and inconsistencies before analysis. Qualitative data collection: Conduct interviews or focus groups to gather deeper insights into workforce behaviors. Application: Research Analysts must be skilled at collecting accurate, reliable data that forms the foundation for meaningful analysis and insights. Statistical Analysis Core Skill: Proficiency in statistical tools such as SPSS, R, Python, or Excel to analyze workforce data. Underlying Abilities: Regression analysis: Analyze relationships between different workforce variables (e.g., job satisfaction and retention rates). Trend forecasting: Use historical data to predict future workforce trends. Data visualization: Create compelling visualizations (charts, graphs) that clearly communicate insights to stakeholders. Application: Analysts must transform raw data into clear, actionable insights that help leadership make informed decisions about workforce strategies. Workforce Benchmarking Core Skill: Compare internal workforce data against industry benchmarks. Underlying Abilities: Identifying key performance indicators (KPIs): Determine which workforce metrics (e.g., turnover rate, productivity) are relevant to compare against competitors. External data sourcing: Access reliable benchmark data from industry reports, government statistics, and third-party research organizations. Gap analysis: Identify gaps between organizational performance and industry standards, providing recommendations to close those gaps. Application: By benchmarking, analysts help the organization stay competitive by identifying areas where workforce strategies can be improved or aligned with industry best practices Report Writing & Documentation Core Skill: Ability to produce clear, detailed, and actionable reports based on workforce data, trend analysis, and research findings. Underlying Abilities: Data synthesis: Compile and summarize complex workforce data, research insights, and trend analysis into structured, accessible reports. Clarity and precision: Ensure that reports clearly communicate key insights and workforce trends, with attention to both detail and accuracy. Visual presentation: Use charts, graphs, and other visual aids to enhance the understanding of data and research findings, making complex information easier to digest for stakeholders. Tailored communication: Adapt report content and tone based on the audience, ensuring that technical reports for analysts differ from strategic reports for executives. Application : Effective report writing in the Future of Work pillar ensures that research findings and workforce trends are conveyed in a manner that is actionable and insightful for decision-makers. These reports are critical for informing workforce strategies, talent planning, and organizational readiness for future shifts in labor markets. Soft Skills: Critical Thinking & Problem-Solving Core Skill: The ability to analyze complex data, identify trends, and develop actionable insights. Underlying Abilities: Hypothesis generation: Use workforce data to generate and test hypotheses about employee behavior and organizational outcomes. Pattern recognition: Identify key trends in workforce data that suggest future risks or opportunities. Solution development: Propose actionable strategies based on data-driven insights to address workforce challenges or optimize talent management. Application : Research Analysts must go beyond simply reporting data—they need to draw conclusions and provide strategic recommendations that drive decision-making. Attention to Detail Core Skill: Ensuring that all research and data analysis is accurate and precise. Underlying Abilities: Data validation : Ensure that datasets are free of errors before analysis. Rigorous editing: Review research reports and presentations to ensure accuracy and clarity before dissemination. Quality control: Maintain high standards for data accuracy and research validity, avoiding misinterpretation or false conclusions. Application: Attention to detail ensures that research outputs are reliable and that insights derived from data are actionable and grounded in fact. Collaboration & Communication Core Skill: Working effectively with cross-functional teams and communicating research insights to various stakeholders. Underlying Abilities Cross-department collaboration: Work with HR, finance, and operations to align workforce data with broader organizational strategies. Presenting research: Effectively present complex data to stakeholders, ensuring they understand its implications for workforce planning. Teamwork: Collaborate with other analysts and researchers to ensure all data and insights are integrated into broader research objectives. Application: Research Analysts must ensure that their findings are effectively shared and used by other teams to support broader strategic objectives.

As a Hardware Design Engineer, your primary responsibility will be to design and develop digital/analog hardware and design flows, encompassing schematic, synthesis, simulation, mixed signals PCB design, and realistic design verification through test bench methodologies. You will be tasked with designing PCB layouts to facilitate the development of high-speed and reliable circuits, while also demonstrating an understanding of circuit routing and schematics. Your role will require proficiency in layout design software such as Altium and OrCAD, as well as a strong knowledge of CAD library administration, encompassing symbol and footprint generation, and database administration. It will be essential for you to stay updated with the latest design technology to ensure the successful execution of projects. In addition to design tasks, you will be responsible for developing documentation and requirements specifications for assigned projects, analyzing and resolving design-related issues promptly, and collaborating with the project team to understand circuit requirements and limitations. The ideal candidate for this position must possess a strong knowledge of electronics components and demonstrate the ability to perform component placement and routing in accordance with requirements, all while maintaining component integrity.,

You should have at least 3+ years of relevant experience in SoC Physical design, with a focus on multiple technology nodes including 5nm for TSMC and other foundries. Your expertise should include hands-on P&R skills, particularly in ICC/Innovus. You must possess expert knowledge in all aspects of Physical Design (PD) from Synthesis to GDSII, with a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and working at the top level in the latest technology nodes will be highly beneficial. Collaboration with CAD, Methodology & IP teams for PD implementation is critical, requiring regular sync-ups for deliveries. You should have significant knowledge, and preferably hands-on experience, in SoC STA, Power, Physical Verification, and other sign-off processes. Problem-solving capabilities, proactive attitude, hardworking nature, and strong interpersonal skills are essential for this role. A Bachelor's Degree in Electrical, Electronics, or Computer Engineering is required for this position. About Company: 7Rays Semiconductor Private Ltd. provides end-to-end custom SoC design solutions, including SoC Architecture, RTL design, Design verification, DFT, Physical Design & Analog design. The company focuses on offering services to top semiconductor and system companies to assist them in designing complex SoCs. The company believes in building effective partnerships with clients to deliver high-quality solutions tailored to their needs. With a dedicated engineering team and a successful track record in project execution, the company is committed to excellence and innovation in SoC Design, Development, and deployment of customers" products.,

Title: Technical Assistant - R & D Custom Field 2: 2138 Location: Bavla, Gujarat, IN Country/Region: IN State: Guja City: Bavla Company: Dishman Carbogen Amcis Limited Business Unit: Contract Research Travel Description: M.Sc in organic chemistry. Having knowledge of organic synthesis work in R&D. Job Segment: Organic Chemistry, Science, Research

Who we are and what we do? World Resources Institute India is an independent, non-profit global research organization that turns big ideas into action at the nexus of environment, economic opportunity and human well-being. Our work focuses on building sustainable and livable cities and working towards a low carbon economy. Through research, analysis, and recommendations, World Resources Institute puts ideas into action to build transformative solutions to protect the earth, promote livelihoods, and enhance human well-being. WRI India has the capacity to convene key stakeholders, and forge strategic partnerships with governments, business, foundations, civil society organizations, institutes and NGOs, to scale-up solutions that can bring game-changing results for the sustainable management of natural resources in India. Overview Of Food And Land Use Coalition Established in 2017, the Food and Land Use Coalition (FOLU) is a community of organizations and individuals committed to the urgent need to transform the way we produce and consume food and use our land for people, nature, and climate. The core partners of the FOLU India Country platform are Council on Energy Environment and Water (CEEW), The Energy and Resources Institute (TERI), Revitalising Rainfed Area Network (RRA-Network), and WRI India. Working at FOLU India offers you the unique opportunity to learn and grow as you collaborate with a diverse set of change agents across India. As a unique group that works on food system transformation, we seek thoughtful, open-minded and sensitive individuals who can help us support this transformation and make a positive difference in the way we produce and consume food. More about FOLU India: https://www.foluindia.org/ Background and about the role: We are initiating the development of the Food Systems Hub (FSH) that will serve as a multidisciplinary platform for policy research, evidence generation, capacity building, and stakeholder engagement around sustainable, equitable, and resilient food systems. The Hub will focus on the intersections of agriculture, nutrition, health, environment, and livelihoods, with an emphasis on systems thinking and policy integration.To support this initiative, we are seeking a highly motivated, analytical, and policy-savvy consultant who can devote to help shaping the intellectual, analytical, and strategic foundation of the Hub and its subsequent launch by December 2025. The Food System Hub is visualized as a living portal and the service of the consultant is required in its inititial rolling out phase. Responsibilities Of The Consultant (FSH Development) Following is the scope of work: Assist in preparing content for the Food Systems Hub's knowledge portal Thematically categonize and catalogue policy narratives, media, and institutional documents for the Hub. Support stakeholder mapping and engagement frameworks. Analyze national and sub-national policy responses impacting food systems Track emerging global frameworks and initiatives Contribute to the preparation of presentations, policy briefs, synthesis reports, and strategic roadmaps for the Hub. Any other tasks assigned by the reporting officer in alignment with the above tasks Deliverables: Data inventory and integrated dashboard of key indicators Stakeholder consultation summaries Contribution in preparing Food systems landscape review document Annotated policy matrix across ministries and schemes Concept note and framework for the Hub Draft strategy and operational plan for the Hub Fulfill any additional requirements necessary for the establishment of the FSH Requirements: Master’s degree in Public Policy, Development Studies, Economics, or related disciplines that align with the tasks. Minimum 2 years of relevant work experience in research, consulting, or policy advisory roles. Experience in food systems is desirable. Strong quantitative and qualitative research skills with proven ability to integrate multi-sectoral evidences. Proficiency in statistical/analytical softwares and visualization tools Experience in handling state and non-state datasets. Excellent written and verbal communication skills in English. Ability to work with the team and stakeholders. Location : New Delhi, India with travel to other locations whenever required. Position – Consultant -Food Systems Hub Development Duration – 8 months Expected Start Date: 1st August 2025 Remuneration: Commensurate with the qualification and experience of the candidate Reporting Manager - FOLU India Country Coordinator Interested applicants to share CVs with cover letter and writing samples that align with the above brief. Email ID: [email protected] List of Documents to be attached: CV (3 pages max) Cover Letter (1 page) detailing motivation and suitability Relevant writing sample/s (if any) Only shortlisted applicants will be contacted for the next step of hiring. Diversity, Equity, and Inclusion (DEI) @WRI India WRI India values and promotes diversity, equity and inclusion across all areas of our work and workforce. Integrating these values into our actions fosters a progressive and collaborative culture and can also enhance our impact. It is our responsibility to create a welcoming working environment for people of diverse cultures, backgrounds and experience to learn together. We are responsible for fostering a safe and inclusive workplace where questions, concerns and information about diversity, equity and inclusion are part of our ongoing dialogue and development. Learn more about WRI India’s commitment to Diversity, Equity, and Inclusion (DEI). Click Here People-centric to the core: We keep our people at the centre of everything we do - from a welcoming work environment to benefits and a culture that encourages staff to stay healthy, happy, engaged, and growing.

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. 8 - 16 years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.12+ years of experience with a Bachelor's/ Master’s degree in Electrical/ Electronics engineering

2. OBJECTIVE: Logistics: Responsible for implementation and continuous improvement of transportation flows (Domestic & Import) for both New Projects and Serial Life. Actively support Supply Chain Strategy involving suppliers, transport negotiations, CFT alignment, mass production, and ongoing operations. Optimize TFR & CFR by ensuring efficient transportation solutions throughout product life. Setup and manage inbound part flows, supporting both project milestones and stable daily operations. Address transport-related issues in Serial Life such as window time non-compliance, routing deviations, and daily delivery failures. Packaging: Own and execute packaging solutions from concept to mass production in new projects while managing Serial Life packaging stability, cleanliness, and maintenance. Drive packaging strategy, cost optimization, and KPI ownership across the full product lifecycle. Resolve daily packaging quality concerns, manage inventory and return loops, and initiate Monozukuri activities for cost and performance improvement. Ensure all packaging documentation is maintained and updated through both project and serial phases. Optimize TFR & CFR: Ensure optimum packaging solution and maximizing the density of packaging to minimize Freight Cost Manage complete Packaging Documentation at all phases – Provisional and Signed FLCA / PDS 3. JOB DIMENSIONS: Number of People Supervised: Direct Reports: - Functional Reports: - Total: - 4. KEY ACCOUNTABILITIES: Description Ensure on-time logistics deliverables for both New Project launches and Serial Life operations. Develop and maintain logistics flow architecture (MIFA), including supplier-to-plant routing and make-or-buy decisions. Perform transportation cost analysis and delivery mode selection (DAP, milk run, local 3PL, etc.) for both phases. Maintain a live database for logistics costing (FCA/DAP), including updates for ongoing cost tracking in Serial Life. Monitor and report all logistics KPIs during Serial Life: on-time delivery, route compliance, window time coordination, etc. Optimize transportation networks and propose corrective actions in cases of regular route or delivery failures. Benchmark practices, implement MZK activities for logistics efficiency in Serial operations. Coordinate logistics change management activities, including source changes, delivery frequency changes, and cost optimization (FETE). Conduct monthly logistics performance reviews and implement improvement actions for Serial programs. Validate infrastructure readiness at supplier sites for both launch and ongoing operations. Lead daily issue resolution forums for delivery delays, transport damage, or route conflicts. Packaging: Ensure packaging availability with compliance to safety, cost, quality, and ergonomic standards for both New Projects and Serial Life. In New Projects: Drive design, development, validation, and launch of packaging from concept through trials and sign-off. In Serial Life: Resolve daily packaging issues such as breakage, incorrect packing, contamination, or handling difficulty. Own and manage Pack Cost KPI across the lifecycle – from CAPEX investments to recurring operational costs. Track and execute Monozukuri improvements to reduce packaging cost per Unit increase density, and improve loop efficiency. Monitor and resolve packaging cleanliness issues, ensuring compliance with cleanliness class requirements. Ensure proactive maintenance of packaging assets – bins, racks, pallets – by coordinating with suppliers and internal teams. Coordinate with plant teams to resolve serial line-side packaging and ergonomic concerns. Maintain digital packaging data, validate continuous readiness of packaging concepts, and manage change-related revalidations. Support ECR/ECN changes with updated packaging and loop planning. Ensure proper tracking of packaging assets, GRNs, and documentation in SAP for both new and serial operations. Conduct workshops and audits with suppliers to identify and implement cost reduction and standardization in serial packaging. Ensure packaging stock levels, reverse logistics issues, and handling challenges are addressed promptly in Serial Life 5. COMMUNICATIONS & WORKING RELATIONSHIPS: Candidate Will work and communicate with following Team Communications & Working Relationships: Candidate will work and communicate with the following: Internal & External Logistics and Packaging Teams Tier 1 & Pack Suppliers, 3PLs Logistics Service Providers (Local & Import) Internal Supply Chain Teams – Logistics, IFE, Capacity, SMRT, Program Mgmt, IRF Cross-Functional Teams – Purchase, Engineering, BoM, ONL, Project Mgmt, SQE, Cost Controller Plant Teams: CPL, IQ, VPE, Manufacturing, Finance Corporate: New Programs, Global Transport & Packaging 6. Performance INDICATORS (INDICATIVE): 100% achievement of Transportation & Packaging Cost KPI – both for Project Profitability and Serial Life TPC targets. Readiness and Quality in Supply Chain Deliverables: 100% of Program Milestone Deliverables (New Projects) 100% Transportation & Packaging Readiness (Ongoing Operations) Full Packaging Documentation Sign-off (FCLA/PDS) Serial Life Improvement Metrics: Daily packaging/transportation issue closure rate Cost savings through Monozukuri initiatives Loop efficiency and asset recovery rate Compliance to Cleanliness and Maintenance schedules Process & Strategy Improvements: Creation & adherence to RASIC/SOP Cost convergence through synergy/standardization 7. QUALIFICATIONS, eXPERIENCE & SKILLS: Minimum bachelor’s in mechanical engineering / management / supply chain, Master degree preferred 9-10 years in Automotive SCM and preferred in Project SC activities; Experience in Managing external team Experience in Logistics Design & Setup, Packaging Cost Management/ Optimization, Packaging/ Product Development Processes 8. COMPETENCIES, CORE VALUES, BEHAVIOURS: - Technical: Automotive Logistics, Transport & EXIM Regulations Green/Brownfield Setup, Logistics & Packaging Costing CAD/CATIA/Pack Assist, Simulation & PLM Tools Exposure to Cleanliness Standards and Returnable Packaging Systems Knowledge of Packaging Materials, Process & Maintenance Supplier/Vendor Management for Serial Life operations Strong analytical and communication skills Behavioral: Team player, autonomous and proactive Result-oriented with strong synthesis skills Flexible and willing to travel Culturally aware with strong stakeholder coordination Hands-on leader with strong initiative in both launch and serial environments