2242 Synthesis Jobs - Page 20

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. We are hiring across mutliple roles in the below domain: 1. Physical Design 2.RTL Design 3. Design Verification 4. STA/ Synthesis 5. DFT 6. FPGA Emulation 7. Validation Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Additional Qualcomm Noida CPU team is hiring for developing high performance and power optimized custom CPU cores. Individuals to Handle hardening complex HMs from RTL to GDS [ Synthesis, PNR, Timing ]. We are excited to add folks with us for the most cutting-edge work. Here, individuals would have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. Desired experience: 12+ years of experience in Physical design, STA. Solid understanding industry standard tools for physical implementation [ Genus, Innovus, FC, PT, Tempus, Voltas and redhawk]. Solid grip from floorplan to PRO and timing signoff along with understanding of IR drop and physical verification aspect. Should have experienced about preparing complex ECOs for timing convergence [ across huge set of corners] through Tweaker / Tempus / Physical PT ECOs. Should be aware about the tricks for minimizing power. Experience in deep submicron process technology nodes is strongly preferred. Knowledge of high performance and low power implementation methods is preferred. Willing to push PPA to the best possible extent. Strong fundamentals. Expertise in Perl, TCL language Applicants Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers.

Purpose of the Role: To conduct research under guidance of group lead to optimise the cost and improve the yield to aid in the business growth of UPL. Job Responsibilities: 1. To set up reactions based on discussion and planning with Team Leader to optimise synthesis of out of patent agrochemical intermediates and active ingredient. 2. To carry out reactions to develop non-infringing processes and improve cost effectiveness of existing products by improving yield, modifying processes and maintaining quality, monitoring and concluding based on analysis. 3. Communicate on daily basis on the progress of the project. 4. Achieve reproducibility and consistency of results. Maintain daily records and update for QMS system. 5. Follow safe handling practises of chemicals and reactions to maintain industrial hygiene and reduce environmental wastes. 6. Tabulate data of experiments needed for review meeting. 7. Maintenance of Equipment or instruments given under laboratory control. Collaborate with other divisions for work related matters. Qualification: a) MSc in Chemistry with 1-3 yrs of experience. b) Setting up reactions, monitoring and conclude based on analysis. Reproducibility and consistency of results. c) Good record maintenance, safe handling practises of chemicals and chemical wastes.

Role Overview: We are seeking an experienced Primary Market Research (PMR) leader who combines deep expertise in traditional qualitative and quantitative research with a knowhow of AI/ML and Generative AI applications in insights generation. The ideal candidate will lead high-impact global research engagements, mentor teams, and partner with Data science & AI team and modernize how we collect, synthesize, and communicate insights using the power of AI. Key Responsibilities: Lead and execute end-to-end PMR projects across therapy areas and geographies (US and international markets preferred), including ATUs, pricing, demand estimation, and patient journey studies. Apply both traditional methodologies and AI-enhanced techniques (e.g., NLP, text analytics, automated coding) to improve study design, analysis, and storytelling. Use Generative AI tools (e.g., ChatGPT, Claude, custom LLMs) to accelerate insight synthesis, automate reporting, and augment qualitative and open-ended data analysis. Champion the integration of machine learning models for survey optimization, segmentation, and forecasting. Guide the adoption of AI-driven dashboards, conversational analytics , and virtual co-pilot solutions for clients and internal teams. Manage and mentor a high-performing team of market researchers, fostering a culture of innovation, cross-learning, and continuous improvement. Collaborate closely with clients and internal stakeholders to scope, design, and deliver insights aligned with business strategy. Maintain strong vendor/field agency relationships while ensuring project timelines, budgets, and quality benchmarks are met. Demonstrate storytelling excellence , crafting compelling and data-driven narratives that influence strategic decision-making. Serve as a thought leader , promoting capability building in AI for insights across the organization. Skills & Experience: 15+ years of experience in healthcare/life sciences primary market research , with a proven ability to lead multi-country, multi-method projects. Strong foundational knowledge in qualitative and quantitative methodologies . Exposure to tools such as Qualtrics, Decipher, SurveyMonkey, SPSS, Q Research, R, or Python is a plus. Hands-on experience or working knowledge of AI/GenAI platforms like ChatGPT, Bard, Claude, or enterprise LLMs for: Text summarization Sentiment & theme extraction Automated charting & reporting Generating discussion guides or survey instruments Passion for exploring and embedding emerging technologies in traditional research workflows. Excellent interpersonal, presentation, and client engagement skills. Strong project management and problem-solving capabilities. Ability to operate in a fast-paced, deadline-driven environment with agility and flexibility. Preferred Qualifications: Master’s degree in Life Sciences, Market Research, Business Analytics, Behavioral Sciences, or related fields. Certification or exposure to AI/ML in market research or marketing analytics is highly desirable. Familiarity with healthcare compliance, pharma regulations, and therapy-specific dynamics.

Synthesis of Compounds and Process Scale up To ensure that the process parameters are maintained well within the limits All SOPs and safety procedures are followed during the Operation, and abnormality is reported back. Required Candidate profile Halogenation – Chlorination / Bromination / Fluorination Nitration Methylation Oxidation Redox reactions High Pressure reactions Exposure to Distillation processes – simple, fractional, etc.

Job Title: VLSI Design Engineer Location: India Experience: Varies (typically 6–10+ years) Job Summary: We are seeking a talented and motivated VLSI Design Engineer to be part of our front-end design team working on advanced SoC/ASIC products. The role involves RTL design, IP integration, and working across multiple design phases for cutting-edge semiconductor solutions. Key Responsibilities: Develop RTL using Verilog/SystemVerilog for IPs and sub-systems. Participate in microarchitecture definition and design specifications. Integrate third-party and custom IPs into larger SoC designs. Perform synthesis, lint, CDC checks, and support timing closure. Work with verification and physical design teams for design convergence. Ensure power, area, and performance goals are met. Required Skills: Strong expertise in Verilog/SystemVerilog RTL design. Solid understanding of digital logic design and VLSI principles. Experience in SoC or ASIC design flow. Familiar with industry-standard bus protocols (AXI, AHB, APB). Hands-on experience with tools like Design Compiler, PrimeTime, and SpyGlass. Scripting skills in TCL, Perl, or Python are a plus.

Your Mission, Roles And Responsibilities The T ooling Re ference C ost (TReC) analyst, is responsible for the Tooling target costs calculation within Faurecia Interior Systems programs. Acquisition phase: TReC Analyst is responsible to define the whole tooling package for the project in accordance with program management system (PMS). Among the tasks mentioned in PMS, the TReC Analyst has the following most important tasks and responsibilities: Reading and interpretation of the bill of material (Concept Engineering) and the process flow chart (Program Manufacturing). Define the whole Tooling list in accordance with data above, for, Inhouse and Bought Out Parts (BOP), and assembly as well, in relation with IReC & FReC team members. Elaborate tool technical concept Images, CAD, 2D drawings (movements, inserts, number of cavities, etc…) Define the Tooling cost according to Tool and Equipement strategy (T&E buyer). If possible, make proposals to improve Faurecia quote competitiveness. Apply the Tooling margin defined by sales department (Customer Business Unit). Create Tooling price synthesis, based on RFQ definition in the relevant OEM template. Distribution of the costing results to acquisition team (Program Manager, T&E Buyer…). Respect the delivery and quality commitments for the needed outputs. Perform the regulary updates all along acquisition rounds with OEM. Foster & develop a strong network with the worldwide CBUs to improve collaboration and communication. Development phase: TReC Analyst is responsible to support Engineering and T&E buyer for Tool cost estimation for ECR management, and gives target to T&E during the Tooling RFQ phase (before SNC). TReC Analyst has the following most important tasks and responsibilities: CAD data interpretation to estimate the impact of part design changes on Tooling cost. At Tool RFQ phase, based on technical definition (IDS…) and T&E strategy, calculate tooling cost according to Tooling Reference Cost (TReC) methodology with dedicated calculation software. Perform TReC at SNC synthesis to compare suppliers cost breakdown to TReC values. Evaluate the gaps with suppliers and justify. Support Purchasing department during the negotiation with suppliers. After nomination, transfer TReC calculation files for maintaining the existing databases. Support engineering or program changes with TReC targets. Others Close collaboration with CBU Cost Analysts (In house and BOP). Collabration with Central costing to continuously improve TReC methodology. Propose constructive improvement ideas to increase costing department competencies and efficiency. Qualifications The ideal candidate will have/be: Bachelor’s / Master's degree in Engineering or Diploma in Tool & Die Design, with a specialisation in Injection Tools. Minimum 6-10 years for Sr. TReC Cost Analyst in an industrial environment including a first technical experience (production, manufacturing engineering,…) Technical process oriented knowledge on Injection Molding tools, Post Processing Tools (Plastic Welding tools, Covering, Parts Checking Gauges) and Assembly technologies. Product knowlegde for Interior parts like Instrument panel, Door panel & Center console assembly. Knowledge on several supplier technologies is a plus Demonstrated strong communication, analytical and synthesis skills Fluent in 2 languages including English French/German language basics knowledge could be a plus.

Overview Join global organization with 82000+ employees around the world, as a AI/Automation Lead role based in IQVIA Kochi & Bangalore. You will be part of IQVIA’s world class technology team and will be involved in design, development, enhanced software programs or cloud applications or proprietary products. We’re offering an exciting opportunity to work on cutting-edge problem-solving using Generative AI and automation technologies. If you're passionate about innovation, thrive in a fast-paced environment, and want to make a tangible impact across teams—this role is for you! Job Overview: What You’ll Do Conduct research and experimentation with state-of-the-art generative AI models, including but not limited to LLMs, diffusion models, and audio/video synthesis models. Explore and evaluate the latest AI technologies to address business use cases, prototype solutions, and present demos Develop and integrate Retrieval-Augmented Generation (RAG) pipelines to enhance the contextual relevance and accuracy of generative model outputs. Apply Prompt Engineering techniques to optimize LLM behavior across diverse tasks and domains. Design and implement scalable, efficient AI-driven solutions tailored to diverse team needs. Collaborate with stakeholders to validate solutions and refine outcomes Design and manage scalable deployment pipelines for AI models using Azure and other cloud platforms. Benchmark and evaluate AI/ML services across major cloud providers (Azure, AWS, GCP) for performance, cost, and scalability. What We’re Looking For Strong problem-solving skills and a creative mindset. Proficiency in Python and experience with AI/ML frameworks (e.g., PyTorch, TensorFlow). A self-starter with a strong passion for AI/ML research, automation, and innovation who constantly learns and applies new AI frameworks and tools. Proven ability to work independently and deliver high-impact results. Excellent communication skills for presenting ideas and solutions clearly. IQVIA is a leading global provider of clinical research services, commercial insights and healthcare intelligence to the life sciences and healthcare industries. We create intelligent connections to accelerate the development and commercialization of innovative medical treatments to help improve patient outcomes and population health worldwide . Learn more at https://jobs.iqvia.com

We’re offering an exciting opportunity to work on cutting-edge problem-solving using Generative AI and automation technologies. If you're passionate about innovation, thrive in a fast-paced environment, and want to make a tangible impact across teams—this role is for you! What You’ll Do Conduct research and experimentation with state-of-the-art generative AI models, including but not limited to LLMs, diffusion models, and audio/video synthesis models. Explore and evaluate the latest AI technologies to address business use cases, prototype solutions, and present demos Develop and integrate Retrieval-Augmented Generation (RAG) pipelines to enhance the contextual relevance and accuracy of generative model outputs. Apply Prompt Engineering techniques to optimize LLM behavior across diverse tasks and domains. Design and implement scalable, efficient AI-driven solutions tailored to diverse team needs. Collaborate with stakeholders to validate solutions and refine outcomes Design and manage scalable deployment pipelines for AI models using Azure and other cloud platforms. Benchmark and evaluate AI/ML services across major cloud providers (Azure, AWS, GCP) for performance, cost, and scalability. What We’re Looking For Strong problem-solving skills and a creative mindset. Proficiency in Python and experience with AI/ML frameworks (e.g., PyTorch, TensorFlow). A self-starter with a strong passion for AI/ML research, automation, and innovation who constantly learns and applies new AI frameworks and tools. Proven ability to work independently and deliver high-impact results. Excellent communication skills for presenting ideas and solutions clearly. IQVIA is a leading global provider of clinical research services, commercial insights and healthcare intelligence to the life sciences and healthcare industries. We create intelligent connections to accelerate the development and commercialization of innovative medical treatments to help improve patient outcomes and population health worldwide . Learn more at https://jobs.iqvia.com

We’re offering an exciting opportunity to work on cutting-edge problem-solving using Generative AI and automation technologies. If you're passionate about innovation, thrive in a fast-paced environment, and want to make a tangible impact across teams—this role is for you! What You’ll Do Conduct research and experimentation with state-of-the-art generative AI models, including but not limited to LLMs, diffusion models, and audio/video synthesis models. Explore and evaluate the latest AI technologies to address business use cases, prototype solutions, and present demos Develop and integrate Retrieval-Augmented Generation (RAG) pipelines to enhance the contextual relevance and accuracy of generative model outputs. Apply Prompt Engineering techniques to optimize LLM behavior across diverse tasks and domains. Design and implement scalable, efficient AI-driven solutions tailored to diverse team needs. Collaborate with stakeholders to validate solutions and refine outcomes Design and manage scalable deployment pipelines for AI models using Azure and other cloud platforms. Benchmark and evaluate AI/ML services across major cloud providers (Azure, AWS, GCP) for performance, cost, and scalability. What We’re Looking For Strong problem-solving skills and a creative mindset. Proficiency in Python and experience with AI/ML frameworks (e.g., PyTorch, TensorFlow). A self-starter with a strong passion for AI/ML research, automation, and innovation who constantly learns and applies new AI frameworks and tools. Proven ability to work independently and deliver high-impact results. Excellent communication skills for presenting ideas and solutions clearly. IQVIA is a leading global provider of clinical research services, commercial insights and healthcare intelligence to the life sciences and healthcare industries. We create intelligent connections to accelerate the development and commercialization of innovative medical treatments to help improve patient outcomes and population health worldwide . Learn more at https://jobs.iqvia.com

Alternate Job Titles: Senior R&D Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and driven engineering professional with a strong foundation in VLSI concepts, CMOS circuit design, and EDA tools. With2-3 years of hands-on experience in the semiconductor industry, you thrive in dynamic environments where innovation, collaboration, and continuous learning are valued. Your curiosity drives you to explore emerging technologies such as AI/ML, and you have developed proficiency in scripting languages like TCL and Python to solve complex engineering challenges. You have a keen eye for detail and a solid grasp of timing, power, and noise analysis, enabling you to deliver robust and reliable design solutions. Your exposure to industry-standard tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim has honed your technical expertise, and you are comfortable navigating various stages of the design flow, from synthesis to signoff. As a team player, you communicate effectively, share knowledge openly, and support your peers in achieving shared goals. You value diversity, equity, and inclusion, and are eager to contribute to a culture that fosters creativity and personal growth. If you are ready to challenge yourself, make an impact, and be part of a world-class engineering team, Synopsys is the place for you. What You’ll Be Doing: Developing and maintaining scripts and automation flows using TCL, Python, and Make to streamline EDA tool operations and design processes. Performing advanced timing, power, and noise analysis on CMOS circuits, leveraging your understanding of setup/hold constraints and leakage concepts. Contributing to the characterization of standard cell libraries, including NLDM/CCSN and LVF methodologies, and ensuring accurate modeling for signoff. Collaborating with design, verification, and methodology teams to optimize PPA (Power, Performance, Area) and address STA (Static Timing Analysis) challenges. Utilizing tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim to support verification, synthesis, and signoff activities. Participating in root cause analysis of timing and power issues, implementing innovative solutions, and documenting best practices for future projects. Staying abreast of the latest trends in AI/ML and exploring their application in EDA tool flows and design optimization. The Impact You Will Have: Accelerate the delivery and quality of Synopsys' IP and design solutions through automation and process innovation. Enhance product reliability by ensuring precise timing and power characterization, directly influencing customer satisfaction. Drive cross-functional collaboration, sharing insights and solutions that elevate team performance and project outcomes. Contribute to the adoption of cutting-edge AI/ML techniques, positioning Synopsys as a leader in intelligent EDA workflows. Reduce design cycle times and resource bottlenecks through effective scripting and workflow optimization. Mentor and support junior engineers, fostering a culture of knowledge sharing and continuous improvement. What You’ll Need: 2-3 years of experience in VLSI design, EDA tool flows, or related semiconductor engineering roles. Proficiency in TCL, Python, and Make for scripting and automation. Strong understanding of CMOS circuit fundamentals, including timing (setup/hold), power (leakage/dynamic), and noise analysis. Experience with cell library characterization methodologies (NLDM/CCSN, LVF) and familiarity with library constructs and syntax. Working knowledge of STA analysis, PPA trends, and basic understanding of PNR (Place & Route). Hands-on experience with EDA tools: VCS, Design Compiler, Primetime, HSPICE/Primesim. Who You Are: Analytical thinker with strong problem-solving skills and a passion for innovation. Effective communicator, able to collaborate across disciplines and share complex ideas clearly. Self-motivated and adaptable, eager to learn new technologies and methods. Detail-oriented with a commitment to delivering high-quality results under tight deadlines. Team player who values diversity, equity, and inclusion in the workplace. The Team You’ll Be A Part Of: You will join a vibrant team of R&D engineers focused on advancing the state of the art in chip characterization, timing, and power analysis. Our team collaborates closely with cross-functional partners in design, verification, and methodology to deliver next-generation semiconductor solutions. We foster a culture of innovation, mentorship, and continuous improvement, ensuring every member has an opportunity to grow and make a meaningful impact. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Designation: Data Scientist (LLMs & GenAI) Job Overview: We are looking for an experienced Python developer with a strong background in Large Language Models (LLMs), Generative AI (GenAI), excellent knowledge prompt engineering, tools for RAG development. The ideal candidate will have hands-on experience in prompt engineering, working with advanced AI frameworks such as LlamaIndex, LangChain, LangGraph, and AutoGen. This role involves building scalable applications and solutions that leverage the latest advancements in AI to solve complex business problems like intelligent chatbots, assistants and digital twins. Key Responsibilities: Develop and implement AI-driven solutions using Python and state-of-the-art LLMs like Azure OpenAI, Lama, Gemini. Design and optimize prompt engineering strategies to improve model responses and performance. Work with tools like LlamaIndex, LangChain, and LangGraph to integrate AI into business workflows. Use LangGraph and AutoGen to design and manage multi-step reasoning workflows for complex applications by using poly LLMs. Develop APIs and interfaces for integrating LLM-based models into existing systems on Flask. Perform performance testing, debugging, and continuous improvement of APIs. Research on developing conversational agents, personalized recommendations, and other GenAI-powered products like intelligent chatbots, assistants and digital twins. Keep up with the latest developments in AI/ML and apply new techniques to improve our models and tools. Required Skills & Qualifications: Experience: 2-4 years of Python development experience with a focus on AI/ML. Knowledge: In-depth understanding of LLMs, GenAI, and prompt engineering. Frameworks: Proficiency in LlamaIndex, LangChain, LangGraph, and AutoGen. Machine Learning: Experience with deploying and scaling machine learning models in production environments. Speech processing : Proficiency with speech-to-text or voice recognition systems such as Azure cognitive services and Google Speech API. NLP: Solid understanding of natural language processing, tokenization, and semantic analysis. APIs: Strong experience in developing and integrating RESTful APIs on Flask for AI/ML systems. Problem Solving: Ability to create scalable solutions for multi-modal, poly LLM and generative AI applications. Collaboration: Excellent communication and teamwork skills to collaborate with cross-functional teams. Preferred Qualifications: Knowledge on Speech synthesis and Sentience simulation Experience with cloud platforms (Azure and GCP) for deploying and scaling AI/ML models. Familiarity with containerization (Docker) and orchestration tools (Kubernetes) for deploying microservices. Experience with reinforcement learning, transformers, or other cutting-edge techniques. Understanding of ethical AI, data privacy, and responsible AI practices. Job Type: Full-time Ability to commute/relocate: Bangalore, Karnataka: Reliably commute or planning to relocate before starting work (Preferred) Education: Bachelor's (Required) Experience: LLM: 2 years (Preferred) LangChain or LangGraph: 2 years (Preferred) Docker: 2 years (Preferred) STT / ASR: 2 years (Preferred) API Development: 2 years (Preferred) Work Location: In person

Applications are invited for the Post of Junior Research Fellow ( JRF ) for the Anusandhan National Research Foundation (ANRF) Prime Minister Early Career Research Grant (PMECRG) project in the Center for Nanobiotechnology (CNBT), at Vellore Institute of Technology (VIT), Vellore, T.N, India. Title of the Project : “ Preparation of chiral magnetic nanomaterials for enantiomer dependent nanotherapeutics against drug resistant Melanoma ”. Qualification : M.Sc. Chemistry, B. Tech Biotechnology, Nanotechnology, Material Science, Chemical Engineering with a GATE score or Or M. Tech in Biotechnology, Nanotechnology, Material Science or allied branch. Or M.Pharm with GPAT or equivalent examination. Desirable Skills : Prior experience in nanomaterial synthesis, in vitro cell culture studies will be given preference Stipend : Rs. 37,000 + 10 % HRA, per month , stipend will be as per Institute norms. No. of Vacancies : 01 Posts Age Limit (if any) : Not exceeding 30 years i.e. Age must be from 18 to 30 years Sponsoring Agency : ANRF, NEW DELHI. Duration : 12 Months Principal Investigator : Dr. Pranav, Assi stant Professor (Sr), Center for Nanobiotechnology, Vellore Institute of Technology (VIT) Vellore - 632 014, Tamil Nadu. Send your complete CV along with relevant documents pertaining to the details of qualifications, scientific accomplishments, experience (if any) and latest passport size photo etc. on or before ( 31/07/2025) through online http://careers.vit.ac.in No TA and DA will be paid for appearing the interview. Shortlisted candidates will be called for an interview at a later date which will be intimated by email. The selected candidate will be expected to join at the earliest.

At Bayer we’re visionaries, driven to solve the world’s toughest challenges and striving for a world where ,Health for all, Hunger for none’ is no longer a dream, but a real possibility. We’re doing it with energy, curiosity and sheer dedication, always learning from unique perspectives of those around us, expanding our thinking, growing our capabilities and redefining ‘impossible’. There are so many reasons to join us. If you’re hungry to build a varied and meaningful career in a community of brilliant and diverse minds to make a real difference, there’s only one choice. Process Development Scientist I POSITION PURPOSE: The Process Development Scientist-I with some supervision from the Chemical Development Lead focuses on the route scouting and Chemical Process Development of Bayers' existing and pipeline crop protective agents. Collaborates with all internal and external functional teams. The job holders ensure all the experimental work is done following the highest safety standards and document the generated data in the Electronic Lab Notebook. The applicant will have an excellent practical and theoretical understanding of synthetic organic chemistry or a relevant technology and can design and execute high-quality, thoughtful experimentation while making significant contributions both independently and as a member of a team. The candidate will work within an interdisciplinary and cross-divisional team in the Crop Protection Innovation organization. TASKS AND RESPONSIBILITIES: Conduct process chemistry research as an individual contributor, which includes, but is not limited to, research on inventing new synthetic routes and associated manufacturing processes that turn the molecules into agrochemical solutions Conduct experiments for route scouting, process optimization, safety evaluation, high throughput screening and chemo/biocatalytic reaction discovery and optimization. Invent synthetic routes and develop safe, robust, and cost-effective processes to manufacture Crop Protection Agents developing the synthetic routes Contribute to the Chemical Development Process by conducting laboratory experiments by own hand and providing experimental results, technical updates, documentation, data interpretation, recommendations for process optimization, etc. With the help of the Process Engineer optimize unit operations Investigate optimization, generate safety and process engineering data required for scale-up of chemical reactions This is a highly practical role where you will be working in the R&D laboratories to generate new synthetic routes and assist in the design, planning and execution of multi-step experimental studies guided by risk assessment to deliver safe, efficient, robust manufacturing processes. Collaborate within project teams by working closely with analytical chemists, process engineers, pilot plant team and project managers within the Crop Protection Innovation organization. Staying up to date with the latest advancements in chemistry and technologies. Find opportunities to use these technologies in solving process development challenges Follow all company, site and laboratory Environmental, Health and Safety (EHS)-related protocols, processes, guidelines and SOPs. Actively participate in EHS discussions with peers and management for continuous improvement of EHS practices. KEY WORKING RELATIONS: Internal Crop Protection Innovation Team Analytical Chemist from Pilot Plant Team AIM Production Team AIM Analytical team at Vapi External Coordinate with various vendors and engineers for instrument installation/maintenance activities WHO YOU ARE: M.Sc/M.Pharm in Organic Chemistry with more than 8 year’s experience or Fresh PhD or PostDoc in Organic Chemistry in designing and performing experiments in a laboratory setting to meet project timelines and objectives. Experience in independent planning and execution of experiments for multistep synthesis of complex organic molecules. Experience in independent interpretation of data from experiments and using it to make conclusions/decisions regarding the direction of future experimentation Comprehensive and state-of-the-art knowledge of modern synthetic methodologies as well as a basic understanding of organic reaction mechanisms and retrosynthesis. Strong understanding of small molecule analysis including chromatographic and spectroscopic techniques and structure elucidation by NMR and Mass Spectroscopy is required Embraces ambitious goals and drives progress with urgency. Consistently seeking opportunities to acquire knowledge, develop skills, and share insights. Possesses a strong willingness to learn and grow through challenging experiences, actively engaging in giving and receiving constructive feedback to foster continuous improvement. Effectively interacts with diverse teams across functions, cultivating strong working relationships with both internal and external collaborators to enhance overall performance Ability to work in the shifts Ever feel burnt out by bureaucracy? Us too. That’s why we’re changing the way we work— for higher productivity, faster innovation, and better results. We call it Dynamic Shared Ownership (DSO). Learn more about what DSO will mean for you in your new role here https://www.bayer.com/en/strategy/strategy Bayer does not charge any fees whatsoever for recruitment process. Please do not entertain such demand for payment by any individuals / entities in connection with recruitment with any Bayer Group entity(ies) worldwide under any pretext. Please don’t rely upon any unsolicited email from email addresses not ending with domain name “bayer.com” or job advertisements referring you to an email address that does not end with “bayer.com”. YOUR APPLICATION Bayer is an equal opportunity employer that strongly values fairness and respect at work. We welcome applications from all individuals, regardless of race, religion, gender, age, physical characteristics, disability, sexual orientation etc. We are committed to treating all applicants fairly and avoiding discrimination. Location: India : Gujarat : Vapi Division: Crop Science Reference Code: 833702 Contact Us 022-25311234

Job Title: Marketing and Research Intern Department: Marketing and Research Company: Macsen Laboratories Location: Udaipur Duration: 3 months (In office) Company Description Macsen Laboratories, a pharmaceutical and chemical manufacturing organization with its origin dating back to 1952, is engaged in manufacturing niche Active Pharmaceutical Ingredients, pharmaceutical application dyes, compounds of precious and rare earth metals, and other specialty inorganic compounds. Macsen has also started new verticals of Pharmaceutical Analytical Services, Contract Research, and Custom Synthesis. Headquartered in the city of Lakes, Udaipur (Rajasthan, India), Macsen presently has various manufacturing units in Udaipur. Qualifications - Any Graduate Bachelor's in Marketing, Business, and Science - Knowledge of basic Microsoft Office tools and email. - Good written and verbal communication. Key Responsibilities: ● Research potential new products in the chemical and pharmaceutical sectors. ● Product Research for our e-commerce store. ● Source and evaluate suppliers for materials required for product development. ● Support in organizing product data and maintaining supplier databases ● Provide support in day-to-day marketing and research operations Note - This is a 3-month internship with the possibility of a Pre-Placement Offer (PPO) based on performance. Perks and Benefits - Gain practical exposure in marketing fields. - Stipend and recommendation letter.

We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s chip design team. As a member of DFT team you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug. You will play a key role in silicon bring-up, workload execution and validation. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Proficiency inC and Pythonfor validation and automation Hands on experiencec in Writing/ maintaining test programs and automation scripts using C and Python Experience in chip bring-up /debug Experience in chip-level throttling issuesincluding power, thermal, and frequency-related behavior Knowledge on Analyzing trace data/logs and on-chip debug outputs for failure root cause Should be able to InterpretVerilog RTLto support functional and performance debug Collaborate with RTL, firmware, validation, and DFT teams for end-to-end issue resolution Strong understanding ofchip boot flowsandbring-up sequences Familiarity withassembly-level debuggingon RISC/V, ARM, or other architectures Ability to read and debugVerilog RTL code In depth understanding of chip internals, including resets, clocking, and register programming Preferred technical and professional experience Experience inpost-silicon validation, emulation or pre-silicon environments Exposure to firmware-hardware interactions Knowledge of debug infrastructure and on-chip monitoring tools Familiarity with version control tools like Git

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs, supporting complex architectures with multi-core, multi-power, and multi-reset domains. Demonstrate strong proficiency with front-end flows, including Lint, CDC, low-power (UPF) checks, synthesis, DFT, and Static Timing Analysis (STA). Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI, and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4. Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation, working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs, supporting complex architectures with multi-core, multi-power, and multi-reset domains. Demonstrate strong proficiency with front-end flows, including Lint, CDC, low-power (UPF) checks, synthesis, DFT, and Static Timing Analysis (STA). Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI, and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4. Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation, working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team’s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M.Tech/ B.Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Date: 11 Jul 2025 Location: Kolthur Shamirpet, Medchal, TG, IN, 500078 Custom Field 1: Discovery Services Job Description Job Title: Research Associate Trainee Job Location: Hyderabad/Bangalore Department: Discovery Chemistry About Syngene : Syngene (www.syngeneintl.com) is an innovation-led contract research, development and manufacturing organization offering integrated scientific services from early discovery to commercial supply. At Syngene, safety is at the heart of everything we do personally and professionally. Syngene has placed safety at par with business performance with shared responsibility and accountability, including following safety guidelines, procedures and SOPs, in letter and spirit Mandatory expectation for all roles as per Syngene safety guidelines Overall adherence to safe practices and procedures of oneself and the teams aligned Contributing to development of procedures, practices and systems that ensures safe operations and compliance to company’s integrity & quality standards Driving a corporate culture that promotes environment, health, and safety (EHS) mindset and operational discipline at the workplace at all times. Ensuring safety of self, teams and lab/plant by adhering to safety protocols and following environment, health, and safety (EHS) requirements at all times in the workplace. Ensure all assigned mandatory trainings related to data integrity, health, and safety measures are completed on time by all members of the team including self Compliance to Syngene’ s quality standards at all times Hold self and their teams accountable for the achievement of safety goals Govern and Review safety metrics from time to time Core Purpose Of The Role Role Accountabilities Attend training on environment, health, and safety (EHS) measures. Follow environment, health, and safety (EHS) requirements always in the workplace ensuring individual and lab/plant safety Perform synthetic chemistry reactions, reaction workups, purification of the compounds by column chromatography, crystallization, re-crystallization techniques, preparative TLC and operating lab equipments. Ensure that the samples generated during synthesis are given for analysis and record subsequent results obtained and update the supervisor / group leader on the progress of synthesis and ensure samples are packed appropriately for shipment. Record the observations of experiment/reaction, results, utilization of resources and other activities related to the reaction in the laboratory or e-notebook following guidelines and in timely manner and ensure that the same is handled safely and confidentially. Ensure that the instrument / equipment is calibrated, undergone preventive maintenance and are kept clean before use and in case of any breakdown, report to maintenance immediately. Ensure that they know the MSDS of the chemicals they are handling and aware of emergency response procedures in case of accidental spillage, leakage or fire and ensure proper waste segregation as per EHS norms. Leadership Capabilities Syngene Values All employees will consistently demonstrate alignment with our core values Excellence Integrity Professionalism Accountabilities as a Syngene Leader (only for Leadership Hires) Champion effective Environment, Occupational Health, Safety and Sustainability (EHSS) practices for the company and oversee compliance with those practices within Biologics business. Play an active leadership role in monitoring and verifying safety performance through Gemba walks and other safety-led activities. Foster a corporate culture that promotes an environment, occupational health, safety, and sustainability (EHSS) mindset as well as the highest standards of quality, integrity, and compliance. Put people at the heart of our success by providing clear, active leadership defined by the Syngene leadership framework setting high standards of people management, career planning and talent retention as a priority. Specific requirements for this role Experience – 0-3 Years Education – MSc General/Organic Chemistry Equal Opportunity Employer It is the policy of Syngene to provide equal employment opportunity (EEO) to all persons regardless of age, color, national origin, citizenship status, physical or mental disability, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, genetic information, marital status, status with regard to public assistance, veteran status, or any other characteristic protected by applicable legislation or local law. In addition, Syngene will provide reasonable accommodations for qualified individuals with disabilities.

University: Delft University of Technology Country: Netherlands Deadline: 2025-09-01 Fields: Chemistry, Chemical Engineering, Materials Science, Computational Chemistry, Physical Chemistry Are you driven to advance the frontiers of catalysis research and eager to develop innovative solutions for sustainable chemical processes? If you are seeking to deepen your expertise in molecular catalysts, reaction mechanisms, and computational chemistry, the ISE group at Delft University of Technology (TU Delft) offers a unique opportunity to contribute to groundbreaking research in this dynamic field. At TU Delft, fully funded PhD and Postdoctoral positions are now open in the ISE group under the supervision of Dr. Evgeny Pidko. These positions focus on the development of reactivity theories, mechanistic understanding, and new design strategies for robust and sustainable molecular hydrogenation catalysts. The research aims to explore the life cycle of molecular catalysts, including their dynamics, deactivation, and performance optimization, using state-of-the-art computational modeling, chemistry automation, kinetic studies, and operando spectroscopy. About The University Or Research Institute Delft University of Technology (TU Delft), located in the Netherlands, is internationally recognized as a leading institution in science, engineering, and technology. TU Delft fosters a vibrant academic environment that emphasizes interdisciplinary collaboration, innovation, and excellence in research. The university is renowned for its commitment to sustainable solutions and offers world-class facilities, making it an ideal place for ambitious researchers to thrive. The ISE group, led by Dr. Evgeny Pidko, is at the forefront of catalysis research, integrating advanced experimental and computational techniques to address pressing challenges in molecular chemistry and sustainable catalysis. Research Topic and Significance The primary focus of these positions is the study of reactivity theories and mechanisms of catalytic reactions, with an emphasis on the design of more robust and sustainable molecular hydrogenation catalysts. Hydrogenation reactions are central to numerous industrial processes, from the synthesis of fine chemicals to large-scale energy applications. However, the stability and efficiency of molecular catalysts remain significant challenges. By investigating the dynamics, deactivation pathways, and performance tuning of these catalysts, the research seeks to provide novel insights and practical strategies for the development of next-generation catalytic systems. This work is highly relevant in today’s context, where sustainable chemical processes are critical for addressing global energy and environmental issues. Project Details The Available Positions Are Part Of The ISE Group At TU Delft, Led By Dr. Evgeny Pidko. The Group’s Research Encompasses Both Experimental And Computational Approaches To Catalysis. The Projects Will Involve – In-depth investigation of molecular hydrogenation catalyst dynamics and deactivation mechanisms. – Performance tuning using computational modeling, chemistry automation, kinetic studies, and operando spectroscopy (including FTIR, UV-Vis, NMR). – Development of new design strategies for catalysts through data-driven and mechanistic approaches. There Are Two Specific Positions Available Postdoc: Catalyst Dynamics & Reaction Mechanisms – Focused on organometallic chemistry, homogeneous catalysis, reaction mechanisms, and advanced spectroscopy. – Emphasizes experimental innovation, lab automation, and chemical kinetics. PhD: Catalysis Theory & In Silico Catalyst Design – Centered on computational chemistry, quantum chemistry, and computational catalysis. – Involves coding, automation, and data-driven catalyst design, with a strong interest in catalytic conversion fundamentals and reaction network analysis. Candidate Profile For The Postdoctoral Position The ideal candidates for these positions will have a strong academic background and a passion for advancing catalysis research. Specific requirements include: – A PhD in organometallic chemistry or homogeneous catalysis. – Expertise in organometallic chemistry, homogeneous catalysis, reaction mechanisms, and operando spectroscopy (FTIR, UV-Vis, NMR). – Strong affinity with lab automation, coding, chemical kinetics, and experimental innovation. For The PhD Position – An MSc in computational chemistry, physical chemistry, or a related field. – Experience with quantum chemistry and computational catalysis. – Affinity with coding and automation. – Strong interest in the fundamentals of catalytic conversion, reaction network analysis, or data-driven catalyst design. Applicants should be motivated, innovative, and eager to work collaboratively in an interdisciplinary environment. Application Process Description The application deadline for both positions is September 1, 2025. For detailed descriptions and to apply, please visit the following links: – Postdoc Position: https://lnkd.in/dzKYNXD9 – PhD Position: https://lnkd.in/dCFcZJ5H For any questions, interested candidates are encouraged to contact Prof. Evgeny Pidko directly at E.A.Pidko[at]tudelft[dot]nl. Conclusion If you are passionate about catalysis and aspire to contribute to transformative research in molecular chemistry, these fully funded PhD and Postdoctoral positions at TU Delft offer an outstanding platform to advance your career. We encourage all eligible and motivated candidates to apply and to explore similar opportunities in the field. Get the latest openings in your field and preferred country—straight to your email inbox. Sign up now for 14 days free: https://phdfinder.com/position-alert-service/ We’re an independent team helping students find opportunities. Found this opportunity helpful? Support us with a coffee! Also See Postdoctoral Researcher in Life Cycle Assessment (LCA) of Bio-Based Processes and Products… Postdoctoral Opportunity in Applied Planning and Scheduling Under Uncertainty for Offshore… PhD Position in Catalysis with Supported Metal Phosphides at Max-Planck-Institut für Kohlenforschung Fully Funded PhD Scholarships in Carbon Capture, Utilisation, and Storage (CCUS) at Edith… Two Postdoctoral Positions in Biofabrication at the MERLN Institute, Maastricht University

You will need a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. Additionally, you should have at least 4 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. It is also essential to have experience in the design and development of Security or Audio blocks, as well as with a scripting language like Perl or Python. Familiarity with DSI2 or MIPI C/D Phy is necessary. Ideally, you should have a Master's or PhD degree in Electrical Engineering, Computer Engineering, or Computer Science. Preferred qualifications include experience with ASIC or FPGA design verification, synthesis, timing/power analysis, and DFT. Knowledge of high-performance and low-power design techniques, assertion-based formal verification, FPGA and emulation platforms, and SOC architecture is also beneficial. As a part of the team working on custom silicon solutions for Google's direct-to-consumer products, you will play a crucial role in shaping the future of hardware experiences. Your contributions will drive innovation behind products that are beloved by millions worldwide, delivering exceptional performance, efficiency, and integration. The Platforms and Devices team at Google focuses on various computing software platforms and first-party devices and services. By researching, designing, and developing new technologies, the team aims to enhance user interaction with computing, making it faster and more seamless, and creating innovative experiences for users globally. Your responsibilities will include collaborating with architects to develop microarchitecture, performing Verilog/SystemVerilog RTL coding, functional/performance simulation debugging, and conducting Lint/CDC/FV/UPF checks. You will also participate in test planning and coverage analysis, develop RTL implementations meeting power, performance, and area goals, and be involved in synthesis, timing/power closure, pre-silicon, and post-silicon bring-up. Additionally, you will create tools/scripts to automate tasks, track progress, and collaborate with multi-disciplined, multi-site teams in Architecture, RTL design, verification, DFT, and Partner Domains.,

At Cadence, we are committed to hiring and developing leaders and innovators who are eager to make a difference in the technology industry. With over 30 years of experience in electronic design, Cadence is a pioneer in computational software expertise. Our Intelligent System Design strategy enables us to provide software, hardware, and IP solutions that bring design concepts to life. Our clientele includes some of the most innovative companies worldwide, developing cutting-edge electronic products for various dynamic market applications. The Cadence Advantage: - You will have the opportunity to work on cutting-edge technology in a creative and innovative environment that encourages you to make a significant impact. - Our employee-friendly policies prioritize the physical and mental well-being of our employees, career development, learning opportunities, and recognizing individual successes. - Our unique One Cadence - One Team culture fosters collaboration across teams to ensure customer success. - We offer multiple avenues for learning and development tailored to individual requirements and interests. - Join a diverse team of passionate and talented individuals who are dedicated to exceeding customer expectations daily. As a senior member of the India Field Organization for the Digital and Signoff Group, you will collaborate closely with top semiconductor customers to develop unique methodologies for implementing cutting-edge designs. Your role involves understanding customer challenges, creating efficient methodologies, leveraging the latest tool capabilities, and guiding customers towards achieving their design objectives. You will gain comprehensive technical knowledge, exposure to the latest designs, and the opportunity to influence both internally and externally. In this position, you will actively contribute to the evolution of key technology solutions for design challenges and work with product teams to shape product direction based on your feedback. Your understanding of customer needs will play a crucial role in influencing business strategy and collaborating with sales teams to drive account strategies. Key Responsibilities: - Drive RTL-to-GDSII metrics on complex designs independently - Engage in methodology discussions with key stakeholders - Collaborate with the sales team to implement account strategies - Promote and facilitate the adoption of new technologies among customers - Provide innovative solutions to customer challenges using tool capabilities or scripting techniques - Implement ML-based solutions to enhance productivity and performance - Collaborate with global AE teams and mentor junior team members Qualifications: - BE/BTech/ME/MS/MTech in Electrical/Electronics Experience and Technical Skills: - 8+ years of experience in Digital Implementation flow on advanced nodes - Expertise in Synthesis/PnR/STA domains - Proficiency in scripting languages and flow development is advantageous - Strong debugging skills and the ability to prioritize critical issues Behavioral Skills: - Excellent written, verbal, and presentation skills - Ability to establish close working relationships with customers and management - Willingness to explore unconventional solutions to challenges - Effective cross-functional and cross-geographical collaboration - Uphold integrity while striving for continuous improvement Join us at Cadence where we are dedicated to meaningful work and solving challenges that others cannot.,

Qualcomm India Private Limited is a leading technology innovator that aims to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems. This includes working on circuits, mechanical systems, Digital/Analog/RF/optical systems, test systems, FPGA, and/or DSP systems to launch cutting-edge products. Collaboration with cross-functional teams is essential to develop solutions that meet performance requirements. To be considered for this role, you should have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field along with 4+ years of Hardware Engineering experience. Alternatively, a Master's degree with 3+ years of experience or a PhD with 2+ years of experience is also acceptable. The ideal candidate should possess strong analytical and technical skills, especially in ASIC design. Responsibilities for this position include participating in ASIC development projects, focusing on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification. You will be expected to create design experiments, conduct detailed PPA comparison analysis, collaborate with various teams for optimization, and develop Place & Route recipes for optimal PPA results. Qualifications required for this role include 6-15 years of experience in High-Performance core Place & Route and ASIC design Implementation. Preferred qualifications involve extensive experience in Place & Route with FC or Innovus, knowledge of complete ASIC flow with optimization techniques, proficiency in STA using Primetime and/or Tempus, and skills in Perl/Tcl, Python, C++, among others. Problem-solving abilities, experience with CPU micro-architecture, low power implementation techniques, and clock tree implementation techniques are also desired. Qualcomm is an equal opportunity employer committed to providing accessible processes for individuals with disabilities. If accommodation is needed during the application/hiring process, individuals can contact Qualcomm for support. The company expects its employees to adhere to all applicable policies and procedures, including confidentiality requirements. Staffing and recruiting agencies are advised that only individuals seeking a job at Qualcomm should use the Careers Site. Unsolicited submissions from agencies will not be accepted. For more information about this role, interested individuals can contact Qualcomm Careers directly.,

Qualcomm India Private Limited is a company of inventors at the forefront of 5G technology, unlocking new possibilities that will revolutionize industries, create job opportunities, and enhance lives. As part of the Engineering Group in the Hardware Engineering division, you will be joining a dynamic team responsible for designing Low Power controller IP cores and subsystem digital design for cutting-edge Snapdragon SoCs used in mobile, compute, IoT, and Automotive markets globally. In this role based at Qualcomm's Bangalore office, your key responsibilities will include micro-architecture and RTL design for Cores/subsystems, collaborating closely with Systems, Verification, SoC, SW, PD & DFT teams, enabling software teams to utilize hardware blocks, qualifying designs through static tool checks, and reporting progress status against expectations. Preferred qualifications for this position include 5 to 10 years of experience in digital front-end design (RTL design) for ASICs, expertise in RTL coding in Verilog/SV/VHDL, familiarity with UPF and power domain crossing, experience in synthesis, logical equivalence checks, RTL and netlist CLP, proficiency in various bus protocols, low power design methodology, clock domain crossing designs, formal verification, and database management flows. Additionally, expertise in Perl/TCL/Python language, post-Si debug, and strong communication skills are valued qualities for this role. To be considered for this opportunity, you should hold a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field with at least 4+ years of Hardware Engineering experience, or a Master's degree with 3+ years of relevant work experience, or a PhD with 2+ years of related work experience. Qualcomm is an equal opportunity employer committed to providing accessible accommodations for individuals with disabilities during the application/hiring process. Please reach out to disability-accommodations@qualcomm.com for support. The company expects its employees to comply with all applicable policies and procedures, including confidentiality requirements. If you are a staffing or recruiting agency, please note that Qualcomm's Careers Site is exclusively for individual job seekers, and submissions from agencies will be considered unsolicited. For more information about this role, please contact Qualcomm Careers directly.,

As an ideal candidate for this role in Bengaluru, you should possess a solid understanding of Synthesis, Static Timing Analysis (STA), and Formal Verification (FV) concepts. Additionally, expertise in Place and Route (PNR) along with STA knowledge would be advantageous. With 3 to 5 years of experience, you will play a key role in leveraging your skills to contribute effectively to the team.,