2242 Synthesis Jobs - Page 16

Key Responsibilities: Drive block-level and/or full-chip physical design from RTL to GDSII. Floorplanning, placement, clock tree synthesis (CTS), and routing. Work on static timing analysis (STA) and timing closure. Run and debug physical verification (LVS/DRC/ERC) and power integrity checks (IR Drop/EM). Collaborate with RTL, DFT, synthesis, verification, and packaging teams. Ownership of PPA (Power, Performance, Area) targets and meeting timing goals. Participate in multiple tape-outs and manage block-level signoff closure. Automate and optimize flows using Tcl, Perl, Python, or shell scripting. Keep up-to-date with the latest EDA tools and technology trends. Required Skills & Experience: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field. 4–10 years of experience in physical design with successful tape-outs. Strong expertise in Synopsys/Cadence tools (ICC2, Fusion Compiler, Innovus, PrimeTime, etc.). Deep understanding of digital design concepts, timing, and power trade-offs. Hands-on experience in advanced technology nodes (16nm and below preferred). Experience with scripting languages (Tcl, Python, Perl, Shell). Familiarity with ECO flows, DFT insertion, and low-power design techniques (UPF/CPF). Knowledge of signal and power integrity issues (IR/EM) is a plus.

About CollegePass At CollegePass, we empower students to turn their interests into Ivy League-worthy stories. Our admissions consultants are intellectual advisors who blend research excellence with personalized student mentoring. You’ll work at the intersection of strategy, global admissions trends, and high-impact advising. Key Responsibilities Work 1-on-1 with high school and undergrad students to map out spike narratives, timelines, and application strategy. Research global universities, programs, competitions, summer schools, and scholarships. Design extracurricular and supercurricular roadmaps tailored to each student’s academic interests and future goals. Track shifting admissions trends and synthesize them into actionable strategies. Create research-backed guides and tools for the advising team. Contribute to long-form content briefs, research mentoring, and competition prep strategy. Who You Are Bachelor’s degree from a top university; academic honors or research experience is preferred. Exceptional research, synthesis, and writing skills. Strong interpersonal skills and ability to work directly with students and families. Organized, deadline-driven, and meticulous. Passionate about mentoring and student success. Familiarity with U.S., U.K., or global undergraduate/graduate admissions a plus.

Logic Design Engineer II Bangalore, Karnataka, India Date posted Jul 21, 2025 Job number 1848527 Work site Up to 50% work from home Travel None Role type Individual Contributor Profession Hardware Engineering Discipline Silicon Engineering Employment type Full-Time Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Cloud Compute Development Organization (CCDO) is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. We are looking for an SOC RTL to PD Engineer to join the team. Qualifications Required Qualifications: MS with 2+ years of experience or BS with 4+ years of experience. At least 3+ years of experience applying digital design principles in SOC and/or IP development. Strong Static Timing Analysis background; understanding timing signoff fundamentals. Experience in EDA tools such as Primetime, StarRC, Design Compiler, ICC, and Innovus. Experience with timing constraints management and debug tools supporting constraints quality checks, constraints verification, constraints promotion & demotion. Through understanding in writing timing constraints, exceptions, clock constraints; good understanding in SDC commands and TCL constraints. Understanding in design closure challenges in power and clock domain crossings. Understanding reset and FIFO related design requirements. Preferred Qualifications Experience with FEV and industry standard tools such as Formality and/or Conformal Applied understanding of low power design principles. Highly Proficient in Verilog/System Verilog coding constructs. Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting) Strong understanding in clock crossing techniques Strong understanding in IJPF (Low power intent). Ability to write scripts using Perl, TCI, Python etc. Familiarity with Industry standard interface protocols is a plus. Good verbal and written communication skills. Responsibilities Ensure high quality deliverables from RTL to Physical Design Learn custom synthesis flow and setup and an perform synthesis while ensuring high quality of results Create, analyze, and maintain timing constraints/SDCs Analyze and drive UPF solutions for low power checks Drive RTL to Synthesis FEV clean Collaborate with RTL and Physical Design team to address design feedback and drive quality Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.  Industry leading healthcare  Educational resources  Discounts on products and services  Savings and investments  Maternity and paternity leave  Generous time away  Giving programs  Opportunities to network and connect Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

About Us: Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs. Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolves design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolves Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities. Tessolves clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose. For more details, visit www.tessolve.com. Job Overview Job Description: We are seeking a highly skilled and experienced Lead STA (Static Timing Analysis) Engineer to join our team in Bangalore. The ideal candidate will have deep expertise in timing closure for high-speed designs and hands-on experience with Synopsys timing tools. Key Responsibilities: Lead STA efforts for complex SoC designs at advanced nodes (3nm and below) Perform timing analysis and closure using Synopsys PrimeTime and FusionCompiler Work on high-speed interfaces including 100G Ethernet and PCIe Gen6 Collaborate with design, physical implementation, and verification teams to resolve timing issues Develop and maintain timing constraints and methodologies Ensure timing sign-off quality and compliance with project requirements Required Skills & Experience: 8–12 years of experience in Static Timing Analysis Strong hands-on expertise with Synopsys STA tools (PrimeTime, FusionCompiler) Proven experience in high-speed SERDES designs (GHz+ frequencies) Familiarity with TSMC 3nm or similar advanced process nodes (preferably 5nm and below) Solid understanding of digital design, timing constraints, and physical design flow Excellent problem-solving and communication skills

Job title : Sr. Associate – HEVA (Evidence Synthesis) Hiring Manager: Head/Group Lead/Research Lead/Team Lead HEVA Location: Hyderabad % of travel expected: Travel required as per business need Job type: Permanent and Full time About The Job Sanofi Global Hub is an internal Sanofi resource organization based in India and is setup to centralize processes and activities to support Specialty Care, Vaccines, General Medicines, CHC, CMO, and R&D, Data & Digital functions . MedHub strives to be a strategic and functional partner for tactical deliveries to Medical, HEVA, and Commercial organizations in Sanofi, Globally. Main Responsibilities The overall purpose and main responsibilities are listed below: Support HEVA team in assigned therapy area portfolio to plan and generate robust health economics and value based evidence to maximize the value propositions from both a global and US perspective working within the Market Access tripod Support the execution of quality research projects, economic models, trial design recommendations and other activities in support of programs/products Seek opportunities to innovate HEVA value identification, evidence generation and dissemination process/plan to increase the relevance and impact of HEVA evidence to ensure reimbursement decisions optimal access Develop and maintain TA expertise People: (1) Support and maintain effective relationships with key stakeholders (2) Work effectively with global HEVA teams across various time zones Performance: (1) Support in the HEVA evidence generation plan: Develop research plan for pre-launch, launch and post-launch evidence for investigational and marketed drugs; Evidence generation plan includes burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective, and prospective observational studies, economic evaluations, development and analysis of patient-reported outcomes; Provide strategic support with individuals and institutions, which may serve as resources for evidence generation purpose, etc. (2) Support execution of approved HEVA study(s) and manage ongoing study(s) if required: Supports the manager/HEVA product lead to manage and execute research studies to support the clinical, economic and humanistic value of products; Studies include but are not limited to burden of illness studies, epidemiology, literature reviews, meta-analysis, retrospective and prospective observational studies, economic evaluations, and patient-reported outcomes (3) Support development of core value dossier (CVD) and AMCP dossiers and provide strategic direction Process: (1) Assist HEVA team in development of HEVA strategic evidence material (2) Assist manager in development of core HEVA strategic evidence generation processes, templates, and products across the portfolio in accordance to the scientific and value messages aligned with CVD, the US AMCP dossier, and HEVA contributions as appropriate to other submissions (3) Maintain adherence to the evidence generation guidelines and other standards relevant to HEVA evidence generation processes Stakeholder: (1) Work with HEVA, RWE, Clinical, Medical Affairs, Marketing, External Affairs and Market Access global or local teams in regions/areas to identify evidence generation and dissemination needs and assist in developing assigned deliverables (2) Support HEVA team to prepare relevant & customized deliverables for these Teams About You Experience: 5+ years of experience in HEOR for the pharmaceuticals industry, CRO consultancy or academia. Soft and technical skills: Stakeholder management; writing/communication skills; external engagement and ability to work independently and within a team environment Strong analytical skills to translate clinical and economic information and messages into payer evidence strategies; Understands reimbursement decisions to determine value drivers and how evidence is used in decision making and how it impacts various payers (e.g., providers, patients, health systems); Knowledge of methods and principles of health economics, health technology assessment (HTA) reviews Education: Advanced degree in life sciences/pharmacy/similar discipline or medical degree Languages: Excellent knowledge of English language (spoken and written) Why choose us? Bring the miracles of science to life alongside a supportive, future-focused team. Discover endless opportunities to grow your talent and drive your career, whether it’s through a promotion or lateral move. Enjoy a thoughtful, well-crafted rewards package that recognizes your contribution and amplifies your impact. Join an international biopharma company. Pursue progress, discover extraordinary Better is out there. Better medications, better outcomes, better science. But progress doesn’t happen without people – people from different backgrounds, in different locations, doing different roles, all united by one thing: a desire to make miracles happen. So, let’s be those people. At Sanofi, we provide equal opportunities to all regardless of race, colour, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, or gender identity. Watch our ALL IN video and check out our Diversity Equity and Inclusion actions at sanofi.com! null Pursue Progress . Discover Extraordinary . Join Sanofi and step into a new era of science - where your growth can be just as transformative as the work we do. We invest in you to reach further, think faster, and do what’s never-been-done-before. You’ll help push boundaries, challenge convention, and build smarter solutions that reach the communities we serve. Ready to chase the miracles of science and improve people’s lives? Let’s Pursue Progress and Discover Extraordinary – together. At Sanofi, we provide equal opportunities to all regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity, protected veteran status or other characteristics protected by law.

LOCATION: Hyderabad, India DEPARTMENT: Chemistry Solutions Office Location: Mallapur Hyderabad Years of experience: 0 to 0 Salary Range: INR to (Annual) Scope This role is responsible for executing chemicals reactions to synthesize required quantities of molecules / compounds as per client specifications using efficient route and techniques. Responsibilities Set-up and execute reactions for synthesis of target molecules/ compounds: Understand the project requirements as specified by the client, the synthetic route Understand and discuss the MSDS (Material Safety Data Sheet) with team members Identify and mitigate any potential safety risk with the help of supervisor Plan and execute reactions with proper reagents and equipment (glassware, stirrers, vacuum pumps etc.) maintaining specified conditions (temperature, pressure etc.), with optimum usage and minimum wastage Ensure parallel execution of multiple reactions Monitor the reaction by observing progress by using analytical techniques Identify and execute appropriate workup and purification technique to produce an intermediary / final compound of desired quality Analyze analytical data, evaluate and interpret results from the synthesis and report Meet productivity benchmarks on number of reactions / number of steps / number of compounds / quality / compounds purity / project timelines Ensure safety at work through enforcement of good laboratory practices: Follow safety and quality systems in the labs Maintenance and usage of equipment/apparatus/instruments as per SOPs and general housekeeping norms Maintain records, data integrity and IP confidentiality: Document reactions executed, research findings/ observations accurately in lab notebooks as per client requirements to ensure data integrity Maintain strict IP confidentiality and adhere to all related policies To prepare final reports as required Ensure high morale and skill development of team: Improve knowledge of organic chemistry (particularly synthesis) / Analytical techniques etc. through one-on-one discussions with supervisor/ regular classroom trainings/ project trainings/ further education programs etc. Functional/ Technical Skills Knowledge of Chemistry & Execution Knowledge of Safety Protocols Knowledge of IP & Confidentiality and Data Integrity Ability to conduct cost benefit analysis and optimum usage of resources Required Educational Qualification & Relevant experience MSc (Organic/ Medicinal Chemistry) with 1 - 5 years of relevant experience Additional Requirements Candidates with their research publications in leading journals would be preferred Additional Responsibilities: Reporting Team Reporting Designation Reporting Department: Educational Qualifications Preferred Category: Field specialization: Degree: Academic score: Institution tier: Required Certification/s: Required Training/s: Required work experience Industry: Role: Years of experience: Key Performance Indicators: Required Competencies: Required Knowledge: Required Skills: Required abilities Physical: Other: Work Environment Details: Specific requirements Travel: Vehicle: Work Permit: Other details Pay Rate: Contract Types: Time Constraints: Compliance Related: Union Affiliation:

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: MTS SILICON DESIGN ENGINEER (AECG ASIC TFM Lead) THE ROLE: As a Silicon Design Engineer in the AMD AECG ASIC TFM (Tools Flows Methodology) team, you will work with design experts to come up with the best implementation methodologies/flows and work on development and support of the BE flows. THE PERSON: Engineer with good attitude who seeks new challenges and has good analytical and communication skills. Candidate needs to have the ability and desire to learn quickly and should be a good team player. KEY RESPONSIBILITIES: Define and drive key Beckend/Physical Design methodologies. Partner with AMD CAD Teams, Design team, physical design teams to ensure seamless end to end design flows. Work with existing development teams to define roadmaps for existing flows and assist in difficult technical debug. Work closely with design teams to gather requirements and develop strategies to tackle key technical problems. Work on Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk PREFERRED EXPERIENCE: 8+ years of professional experience in physical design, preferably with high performance designs. Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction. Experience in floorplanning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation Versatility with scripts to automate design flow. Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams Excellent physical design and timing background. Strong analytical/problem solving skills and pronounced attention to details. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-SR4 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

We help the world run better At SAP, we enable you to bring out your best. Our company culture is focused on collaboration and a shared passion to help the world run better. How? We focus every day on building the foundation for tomorrow and creating a workplace that embraces differences, values flexibility, and is aligned to our purpose-driven and future-focused work. We offer a highly collaborative, caring team environment with a strong focus on learning and development, recognition for your individual contributions, and a variety of benefit options for you to choose from. What you’ll do: Because user experience is of vital importance to the success of all SAP products, SAP constantly evaluates and improves its products to ensure that SAP users get the best user experience possible. User Experience at SAP covers all activities from conception and design of future SAP products to maintenance and improvements of existing applications. Expectations and Tasks You are a strong interaction designer with empathy for the end user You feel responsible for your work and accompany your designs throughout the design driven development process Gathering end-user requirements by organizing, executing, and moderating end-user site visits, focus groups and user days including collection and synthesis of results. Development of user interface designs using various prototyping techniques and documented in UI specifications Verification of designs through reviews, validations and formal usability testing with end users You have a good technical understanding (preferably in HTML5, CSS3 and JavaScript) to discuss design alternatives and solutions with developers You are offering design support and consulting for the development teams What you bring: University degree in Interaction Design, Industrial Design, Human-Computer Interaction or comparable fields is required Minimum 8+ years of experience in Interaction Design Demonstrated ability to design complex experiences for web applications and mobile solutions for enterprise platforms Strong in interaction design, identifying user stories, creating user flows and low-to-high fidelity designs Experience in a fast-paced software development environment with an ability to execute against aggressive timelines Strong communication skills and the ability to effectively engage and convey ideas to cross-functional technical and non-technical teams Excellent written and verbal communication skills in English Creative and analytical thinking is required Demonstrated ability to learn complex technology. Must be a solid team player in international teams with good writing, presentation and time management skills. Meet your team: As a User Experience Designer in SAP S/4HANA Cloud you work together with a highly motivated and creative team of international interaction designers, user researchers and visual designers. Your team is responsible to drive all application design activities for SAP S/4HANA Cloud Private Edition. You will closely collaborate with Product Managers and Engineering to enable users to do their business in the most effective and efficient manner. #UXT3 #SAPReturnshipIndiaCareers Bring out your best SAP innovations help more than four hundred thousand customers worldwide work together more efficiently and use business insight more effectively. Originally known for leadership in enterprise resource planning (ERP) software, SAP has evolved to become a market leader in end-to-end business application software and related services for database, analytics, intelligent technologies, and experience management. As a cloud company with two hundred million users and more than one hundred thousand employees worldwide, we are purpose-driven and future-focused, with a highly collaborative team ethic and commitment to personal development. Whether connecting global industries, people, or platforms, we help ensure every challenge gets the solution it deserves. At SAP, you can bring out your best. We win with inclusion SAP’s culture of inclusion, focus on health and well-being, and flexible working models help ensure that everyone – regardless of background – feels included and can run at their best. At SAP, we believe we are made stronger by the unique capabilities and qualities that each person brings to our company, and we invest in our employees to inspire confidence and help everyone realize their full potential. We ultimately believe in unleashing all talent and creating a better and more equitable world. SAP is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to the values of Equal Employment Opportunity and provide accessibility accommodations to applicants with physical and/or mental disabilities. If you are interested in applying for employment with SAP and are in need of accommodation or special assistance to navigate our website or to complete your application, please send an e-mail with your request to Recruiting Operations Team: Careers@sap.com For SAP employees: Only permanent roles are eligible for the SAP Employee Referral Program, according to the eligibility rules set in the SAP Referral Policy. Specific conditions may apply for roles in Vocational Training. EOE AA M/F/Vet/Disability: Qualified applicants will receive consideration for employment without regard to their age, race, religion, national origin, ethnicity, age, gender (including pregnancy, childbirth, et al), sexual orientation, gender identity or expression, protected veteran status, or disability. Successful candidates might be required to undergo a background verification with an external vendor. Requisition ID: 428131 | Work Area: Software-User Experience | Expected Travel: 0 - 10% | Career Status: Professional | Employment Type: Regular Full Time | Additional Locations: #LI-Hybrid.

We help the world run better At SAP, we enable you to bring out your best. Our company culture is focused on collaboration and a shared passion to help the world run better. How? We focus every day on building the foundation for tomorrow and creating a workplace that embraces differences, values flexibility, and is aligned to our purpose-driven and future-focused work. We offer a highly collaborative, caring team environment with a strong focus on learning and development, recognition for your individual contributions, and a variety of benefit options for you to choose from. What you’ll do: Because user experience is of vital importance to the success of all SAP products, SAP constantly evaluates and improves its products to ensure that SAP users get the best user experience possible. User Experience at SAP covers all activities from conception and design of future SAP products to maintenance and improvements of existing applications. Expectations and Tasks You are a strong interaction designer with empathy for the end user You feel responsible for your work and accompany your designs throughout the design driven development process Gathering end-user requirements by organizing, executing, and moderating end-user site visits, focus groups and user days including collection and synthesis of results. Development of user interface designs using various prototyping techniques and documented in UI specifications Verification of designs through reviews, validations and formal usability testing with end users You have a good technical understanding (preferably in HTML5, CSS3 and JavaScript) to discuss design alternatives and solutions with developers You are offering design support and consulting for the development teams What you bring: University degree in Interaction Design, Industrial Design, Human-Computer Interaction or comparable fields is required 12+ years of overall experience with relevant experience in Interaction Design Demonstrated ability to design complex experiences for web applications and mobile solutions for enterprise platforms Strong in interaction design, identifying user stories, creating user flows and low-to-high fidelity designs Experience in a fast-paced software development environment with an ability to execute against aggressive timelines Strong communication skills and the ability to effectively engage and convey ideas to cross-functional technical and non-technical teams Excellent written and verbal communication skills in English Creative and analytical thinking is required Demonstrated ability to learn complex technology. Must be a solid team player in international teams with good writing, presentation and time management skills. Meet your team: As a User Experience Design Expert in SAP S/4HANA Cloud you work together with a highly motivated and creative team of international interaction designers, user researchers and visual designers. Your team is responsible to drive all application design activities for SAP S/4HANA Cloud Private Edition. You will closely collaborate with Product Managers and Engineering to enable users to do their business in the most effective and efficient manner. #UXT4PF Bring out your best SAP innovations help more than four hundred thousand customers worldwide work together more efficiently and use business insight more effectively. Originally known for leadership in enterprise resource planning (ERP) software, SAP has evolved to become a market leader in end-to-end business application software and related services for database, analytics, intelligent technologies, and experience management. As a cloud company with two hundred million users and more than one hundred thousand employees worldwide, we are purpose-driven and future-focused, with a highly collaborative team ethic and commitment to personal development. Whether connecting global industries, people, or platforms, we help ensure every challenge gets the solution it deserves. At SAP, you can bring out your best. We win with inclusion SAP’s culture of inclusion, focus on health and well-being, and flexible working models help ensure that everyone – regardless of background – feels included and can run at their best. At SAP, we believe we are made stronger by the unique capabilities and qualities that each person brings to our company, and we invest in our employees to inspire confidence and help everyone realize their full potential. We ultimately believe in unleashing all talent and creating a better and more equitable world. SAP is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to the values of Equal Employment Opportunity and provide accessibility accommodations to applicants with physical and/or mental disabilities. If you are interested in applying for employment with SAP and are in need of accommodation or special assistance to navigate our website or to complete your application, please send an e-mail with your request to Recruiting Operations Team: Careers@sap.com For SAP employees: Only permanent roles are eligible for the SAP Employee Referral Program, according to the eligibility rules set in the SAP Referral Policy. Specific conditions may apply for roles in Vocational Training. EOE AA M/F/Vet/Disability: Qualified applicants will receive consideration for employment without regard to their age, race, religion, national origin, ethnicity, age, gender (including pregnancy, childbirth, et al), sexual orientation, gender identity or expression, protected veteran status, or disability. Successful candidates might be required to undergo a background verification with an external vendor. Requisition ID: 428132 | Work Area: Software-User Experience | Expected Travel: 0 - 10% | Career Status: Professional | Employment Type: Regular Full Time | Additional Locations: #LI-Hybrid.

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Roles and Responsibilities Qualcomm modem team is looking for world-class RTL design engineers looking to work on cutting edge wireless technology, which will be deployed worldwide in our industry leading devices. You will be contributing to RTL design and integration of one or more flagship Modem core IPs. Responsibilities include: Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification. RTL ownership. Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals Working collaboratively with block designers, verification, architecture, implementation, and post-silicon teams to resolve issues and ensure timely project execution. Collaborating with cross-functional teams, debugging and identifying issues, providing workarounds, and making recommendations on bug fixes. Skillset Required The candidate must have at least 1 to 4 years of front-end ASIC RTL design experience. The candidate must be strong in design micro-architecture and RTL coding (SystemVerilog / Verilog / VHDL). Other requirements include: Hands-on experience with multi-clock designs. Exposure to synthesis and STA. Awareness of low power and high-speed design. Knowledge of industry-standard front-end tool flows (lint, CDC, etc.). Strong critical thinking, problem-solving, and debugging skills. Good communication and interpersonal skills. Flexible to work with multi-geo teams. Minimum Qualifications: Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 9-13 years of hardware engineering or related work experience. OR Master’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 8-12 years of hardware engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field and 5+ years of hardware engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3073973

Meta is hiring talented individuals to join our Infrastructure organization as ASIC Frontend Implementation Engineers (RDC/CDC). In this role, you will play a critical part in designing and developing efficient System on Chip (SoC) and IP for data center applications. As an ASIC Frontend Implementation Engineer, your primary focus will be on the front-end implementation process and static verification tools, transforming RTL designs into optimized netlists. You will utilize your expertise in RTL Lint, CDC analysis, timing constraints, and synthesis to ensure seamless integration of various components to build efficient System on Chip (SoC) and IP for data center applications.By joining our team, you'll have the opportunity to contribute to the development of cutting-edge technology that powers Meta's infrastructure. ASIC Engineer, Frontend Implementation RDC/CDC Responsibilities: Perform Flat and Hierarchical Clock Domain Crossing and work with the designers to analyze the complex clock domain crossings and sign off the CDC Perform Flat and Hierarchical Reset Domain crossing Checks. Understand the Reset-Architecture by working with Design and FW teams and develop reset groups and the corresponding reset sequence for RDC Perform RTL Lint and work with the Designers to create waivers Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist for Timing, Area, Power Developing Automation scripts and Methodology for all Front End (FE)-tools including (Lint, CDC, RDC,) Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback Minimum Qualifications: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience 2+ years of experience in static verification tools Experience with Lint, Clock Domain & Reset Domain crossing Knowledge of SOC Integration (Clocking, Reset, PLL, etc) Knowledge of front-end ASIC flows Experience with RTL design using SystemVerilog or other HDL Successful candidates must remain in role in the same team in India for a minimum period of 24 months before being eligible for transfer to another role, team or location Preferred Qualifications: Scripting and programming experience using Perl/Python, TCL, and Make Experience with Design Compiler, Spyglass, PrimeTime, Formality or equivalent tools Experience with SOC Design Integration and Front-End Implementation Experience with developing structural rule based checks for RTL & Netlist Experience with Netlist-CDC Analysis and improving MTBF Knowledge of Timing/physical libraries, SRAM Memories About Meta: Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics. Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As an ideal candidate for the ASIC Digital Design Engineer, Senior role, you are a highly motivated and innovative individual with a deep understanding of ASIC development flow. You possess a strong theoretical and practical background in high-speed serializer and data recovery circuits. You are someone who thrives in dynamic environments and embraces the challenges that come with constant technological changes. You are self-motivated, proactive, and able to balance good design quality with tight deadlines. Your excellent communication skills enable you to interact seamlessly with different design groups and customer support teams. You are known for your ability to resolve issues creatively and exercise independent judgment in selecting methods and techniques to obtain solutions. You are a team player who can produce excellent results both as an individual and as part of a team. What You’ll Be Doing: Supporting development and verification of digital designs for next-generation NRZ and PAM-based SerDes products. Setting up and Running lint/cdc/rdc checks and synthesis flow. Working with Verilog and VCS to ensure design accuracy. Defining synthesis design constraints and resolving STA issues. Collaborating with mixed-signal engineers to deliver high-end mixed-signal designs from specification development to functional and performance tests. Setting up flows/process for quality checks, release management for different front-end flows. Interacting with Application Engineers for customer support and resolving technical issues with Analog and P&R teams. The Impact You Will Have: Contributing to the development of cutting-edge SerDes products that lead the industry. Enhancing the performance, power, and size efficiency of our silicon IP offerings. Enabling rapid market entry for differentiated products with reduced risk. Driving innovation in high-speed digital design and data recovery circuits. Supporting the creation of high-performance silicon chips and software content. Collaborating with a world-class team to solve complex design challenges. What You’ll Need: BSEE or MSEE with a minimum of 4 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and synthesis flow. Experience in coding, verifying verilog and system verilog design. Experience of working with minimum supervision and owning and delivering for Front end activities in IP/SOC Experience of leading technically for Front end activities. Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows. Scripting experience in Shell, Perl, Python, and TCL (preferred). Who You Are: Excellent communicator with the ability to interact with diverse teams. Self-motivated and proactive, with a strong attention to detail. A creative problem-solver who can think independently. Capable of working under tight deadlines while maintaining high-quality standards. A team player who can contribute effectively both individually and collaboratively. The Team You’ll Be A Part Of: Join our highly experienced mixed-signal design and verification team, where you will work alongside experts in digital and mixed-signal engineering. Our team is dedicated to developing innovative solutions for the next generation of high-speed SerDes products, providing continuous training and opportunities for growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

About CollegePass At CollegePass, we empower students to turn their interests into Ivy League-worthy stories. Our Research Associates are intellectual advisors who blend research excellence with personalized student mentoring. You’ll work at the intersection of strategy, global admissions trends, and high-impact advising. Key Responsibilities Work 1-on-1 with high school and undergrad students to map out spike narratives, timelines, and application strategy. Research global universities, programs, competitions, summer schools, and scholarships. Design extracurricular and supercurricular roadmaps tailored to each student’s academic interests and future goals. Track shifting admissions trends and synthesize them into actionable strategies. Create research-backed guides and tools for the advising team. Contribute to long-form content briefs, research mentoring, and competition prep strategy. Who You Are Bachelor’s degree from a top university; academic honors or research experience is preferred. Exceptional research, synthesis, and writing skills. Strong interpersonal skills and ability to work directly with students and families. Organized, deadline-driven, and meticulous. Passionate about mentoring and student success. Familiarity with U.S., U.K., or global undergraduate/graduate admissions a plus.

About Pandita AI Solutions Pandita AI Solutions is a rapidly growing AI startup with headquarters in Palo Alto, CA and a thriving engineering division in Mysore, India . We are pioneers in developing generative AI systems, foundation models, and multimodal applications that solve real-world problems across industries like healthcare, scientific computing, and document intelligence. We’re now looking to automate our internal operations using cutting-edge agentic AI and LLM-driven tools. This effort will be led by the founding team in close collaboration with a dedicated Generative AI Engineer , who will help implement intelligent automation — and later scale it for external clients and products . Key Responsibilities Work closely with the leadership team to map internal processes that can benefit from AI-based automation (e.g., document handling, research synthesis, client onboarding, code generation, workflow orchestration). Build internal tools using LLMs and agent frameworks (LangChain, OpenAI Functions, AutoGen, CrewAI, etc.) for semi-autonomous task execution. Prototype, test, and refine agentic applications that integrate with internal systems (e.g., Notion, Slack, GitHub, Airtable, email, databases). As the automation matures internally, support the transition to external automation offerings for clients across domains. Maintain a portfolio of your work in GitHub, and contribute reusable components to the broader engineering team. Minimum Qualifications Master’s degree in Computer Science, AI, Data Science, or a related technical field. Solid programming skills in Python and experience building backend services, APIs, or automation tools. Demonstrated ability to build and maintain agent-based apps using tools like LangChain, CrewAI, LlamaIndex , or custom orchestration frameworks. A strong GitHub portfolio of previous automation projects or agentic AI applications (personal or professional). Familiarity with REST APIs, cloud services (AWS/GCP), and tools like Docker, FastAPI, or Streamlit. Preferred Qualifications Experience integrating LLMs with external APIs and multi-step workflows (e.g., form parsing + summarization + ticket generation). Familiarity with tools like Zapier , Make , Airflow , or custom workflow engines . Understanding of retrieval-augmented generation (RAG) , embeddings, and prompt engineering best practices. Publications in International conferences such as IEEE, ICML, NIPS Entrepreneurial mindset with a willingness to explore ambiguous spaces and iterate rapidly. What We Offer A unique opportunity to work directly with founders and AI researchers on defining the next era of automation. A fast-paced, early-stage startup culture with a focus on delivery, ownership, and learning . ESOPs , competitive compensation, and access to high-end compute infrastructure. Long-term growth opportunity to lead automation efforts both internally and across external enterprise deployments .

Senior Backend Developer - AI/ML Platform **Discvrai** • Full-time • Remote/Hybrid • Gurugram, India **₹6,00,000 - ₹6,00,000 per year** ### About Discvrai Discvrai aims to transform how users find and understand information. We harness AI to deliver trustworthy, deep insights, simplifying the synthesis of complex data. Our platform features an AI Search Agent for quick, relevant results and specialized deep research capabilities, especially in US equities. Additionally, we offer a growing library of interactive, AI-generated articles across various domains, enabling seamless and in-depth exploration. ### Role Overview We're seeking a talented Senior Backend Developer to join our innovative AI-driven platform. You'll be instrumental in building robust, scalable backend systems that power our AI search capabilities and financial research tools. This role offers the flexibility of remote/hybrid work while contributing to cutting-edge AI applications. ### Key Responsibilities • Design and develop high-performance backend systems using **Python** • Manage and optimize **MongoDB** and **PostgreSQL** databases for large-scale data processing • Integrate and implement **Generative AI** models and APIs into our platform • Build RESTful APIs and microservices architecture • Collaborate with AI/ML teams to deploy and scale Gen-AI solutions • Ensure data security, performance optimization, and system reliability • Work closely with frontend developers and product teams • Troubleshoot, test, and deploy backend applications ### Required Qualifications • **2-5 years** of backend development experience • Strong proficiency in **Python** and its frameworks (FastAPI, Django, Flask) • Hands-on experience with **MongoDB** and **PostgreSQL** • Practical experience with **Generative AI** tools, APIs, and model integration • Knowledge of RESTful API design and microservices architecture • Experience with cloud platforms (AWS, GCP, Azure) • Understanding of AI/ML workflows and data pipelines • Strong problem-solving skills and attention to detail ### Preferred Qualifications • Experience with vector databases and AI embeddings • Knowledge of LangChain, OpenAI APIs, or similar AI frameworks • Familiarity with financial data and equity research • Experience with Docker, Kubernetes, and CI/CD pipelines • Previous experience in AI/ML product development ### What We Offer • **Competitive salary**: ₹6 LPA • **Flexible work environment**: Remote/Hybrid options • Opportunity to work with cutting-edge AI technology • Collaborative and innovative team culture • Professional growth in the rapidly evolving AI space • Impact on how users discover and understand complex information ### Work Arrangement This position offers flexibility with remote work options and hybrid arrangements. Our office is located in Gurugram for those who prefer in-person collaboration. **Ready to shape the future of AI-powered information discovery? Apply now!*

Company Description REVA University is a State Private University in Bengaluru, Karnataka, established in 2013. Spread over 45 acres, the campus offers state-of-the-art infrastructure, well-equipped laboratories, custom-built teaching facilities, and a fully air-conditioned library. The University offers undergraduate, postgraduate, and research programs in various disciplines, including Engineering and Technology, Science, Commerce, and Management. Accredited with NAAC A+, REVA University is committed to creating a vibrant academic environment conducive to higher learning and research. Role Description This is a full-time on-site role for a Project Assistant, located in Yelahanka, Bengaluru. The Project Assistant will be responsible for assisting in project planning, synthesis, coordination, and execution. The role involves synthesis, characterization, manuscript drafting, literature review, maintaining project documentation, conducting research, and providing administrative support. The Project Assistant will work closely with project head and team members to ensure timely and successful completion of projects. Qualifications MSc in Chemistry with CGPA>7 Excellent organizational and time management skills Proficiency in MS Office (Word, Excel, PowerPoint) Strong written and verbal communication skills Ability to work both independently and as part of a team Attention to detail and problem-solving skills Experience in an academic or educational setting is beneficial

A career in our Advisory Acceleration Centre is the natural extension of PwC’s leading class global delivery capabilities. We provide premium, cost effective, high quality services that support process quality and delivery capability in support for client engagements. To really stand out and make us fit for the future in a constantly changing world, each and every one of us at PwC needs to be a purpose-led and values-driven leader at every level. To help us achieve this we have the PwC Professional; our global leadership development framework. It gives us a single set of expectations across our lines, geographies and career paths, and provides transparency on the skills we need as individuals to be successful and progress in our careers, now and in the future. Responsibilities As a Manager, you'll work as part of a team of problem solvers, helping to solve complex business issues from strategy to execution. PwC Professional skills and responsibilities for this management level include but are not limited to: Develop new skills outside of comfort zone. Act to resolve issues which prevent the team working effectively. Coach others, recognise their strengths, and encourage them to take ownership of their personal development. Analyse complex ideas or proposals and build a range of meaningful recommendations. Use multiple sources of information including broader stakeholder views to develop solutions and recommendations. Address sub-standard work or work that does not meet firm's/client's expectations. Use data and insights to inform conclusions and support decision-making. Develop a point of view on key global trends, and how they impact clients. Manage a variety of viewpoints to build consensus and create positive outcomes for all parties. Simplify complex messages, highlighting and summarising key points. Uphold the firm's code of ethics and business conduct. Market Intelligence, AC Manager The Market Intelligence team provides strategic analysis and actionable insights to PwC US leadership to help shape the firm’s business strategy. The team analyzes market trends, competitive landscape, emerging tech, and industry dynamics to help drive PwC’s growth, market strategies, and strategic initiatives. Successful candidates will have at least 9-10 years of experience in the following: Strong research, analytical, data synthesis, and critical thinking skills to formulate strategic analysis with actionable insights. Proficient in data-driven strategy development covering industry/tech/business disruptions, innovation, competition, and business growth. Analyze competitors, industry, and business trends and synthesize findings to develop market assessments and support business development initiatives. Adept at learning unfamiliar topics to craft analysis and recommendations for various business issues that help drive PwC’s overall business strategy. Connect multiple pieces of information and research in a structured way and build a compelling story around it. Storytelling skills are a must for this role. Good understanding of industry databases and research tools (Capital IQ, Factiva, AlphaSense, etc.). Proficiency in MS Office tools. Prior experience in management consulting, business/corporate strategy, strategic planning, and research analysis is preferred. Cross-industry and evolving technology landscape exposure is highly desirable. Successful Candidate Should Also Build relationships with colleagues and assess their needs. Thrive in an ambiguous environment and effectively collaborate with team members. Effectively communicate the implications of analyses. Have strong research analysis and storyboarding skills. Lead projects with minimal supervision and mentor junior team members. Explore out-of-the-box approaches/ideas and actively contribute to brainstorming. Education Preferred fields of study include Strategy, Business Studies, Finance, Economics, and Business Analytics. MBA Finance/Operations or equivalent from Tier1/2/Premier institutions with relevant experience in research, analysis, and strategy formulation. Candidates with prior experience working in Big4/similar professional services firms will be preferred.

You should have at least 3+ years of relevant experience leading SoC Physical design projects across multiple technology nodes, including 5nm for TSMC and other foundries. Your expertise should include hands-on Place and Route (P&R) skills with in-depth knowledge of ICC/Innovus. You must possess expert knowledge in all phases of Physical Design (PD) from Synthesis to GDSII, with a solid background in Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and strong familiarity with the top level at the latest technology nodes will be beneficial. Collaboration with CAD, Methodology & IP teams is a crucial aspect of PD implementation, necessitating regular sync-ups for deliveries. You should have significant knowledge and preferably hands-on experience in SoC Static Timing Analysis (STA), Power analysis, Physical Verification, and other sign-off processes. Strong problem-solving abilities, a proactive approach, hard work ethic, and excellent interpersonal skills are essential for this role. A Bachelor's Degree in Electrical, Electronics, or Computer Engineering is required. About Company: 7Rays Semiconductor Private Ltd. provides end-to-end custom SoC design solutions, encompassing SoC Architecture, RTL design, Design verification, DFT, Physical Design, and Analog design. Our focus is on serving top semiconductor and system companies to facilitate the design of their complex SoCs. We prioritize building effective partnerships with our clients to deliver high-quality, tailored solutions. With a dedicated engineering team and a proven history of successful project execution, we are dedicated to excellence and innovation in SoC Design, Development, and deployment of customer products.,

You are a highly skilled and experienced engineer with a deep understanding of synthesis, timing closure, power optimization, and constraints management. Your expertise includes working on advanced nodes under 5nm and proficiency in low-power, high-performance design. Familiarity with RTL, DFT, LDRC, TCM, VCLP, and PTPX gives you an edge in tackling complex design challenges. Your ability to use scripting languages such as TCL, Perl, and Python is a valuable asset. Holding a BS or MS in Electrical Engineering or a related field with over 9 years of relevant experience, you are well-equipped to drive continuous technological innovation and transform the future. Your responsibilities will include developing innovative methodologies for implementing high-performance CPUs, GPUs, and interface IPs. You will utilize advanced technologies and tool features to enhance quality of results and streamline the implementation process. Contributing to the development and implementation of power, performance, and area (PPA) methodologies for complex IPs will be a key part of your role. Working with industry-leading Synopsys tools such as RTLA and Fusion Compiler, you will solve critical design challenges and collaborate with a global team to stay ahead of technological advancements. Your impact will be significant as you advance the state-of-the-art in high-performance core and IP implementation, enhance the performance and efficiency of Synopsys" design methodologies and tools, and enable the development of cutting-edge semiconductor technologies at advanced nodes. You will contribute to the successful delivery of high-quality, high-performance IPs to the market, drive innovation, and support Synopsys" mission to lead in chip design, verification, and IP integration. To excel in this role, you will need deep knowledge of synthesis, timing closure, power optimization, and constraints management, along with experience in low-power, high-performance design at advanced nodes under 5nm. Proficiency in RTL, DFT, LDRC, TCM, VCLP, and PTPX, as well as familiarity with scripting languages such as TCL, Perl, and Python, are essential. A BS or MS in Electrical Engineering or a related field with 9+ years of relevant experience will further strengthen your qualifications. You are a detail-oriented and innovative engineer with a passion for pushing the limits of technology. Your problem-solving skills, ability to optimize design processes, and effective collaboration with a global team set you apart. Motivated by continuous improvement and making a significant impact in the field of semiconductor design, you are well-suited to join the growing global team at Synopsys dedicated to advancing high-performance core and IP implementation.,

1.DV 2.PD 3.DFT 4.RTL 5.PD(VLCP)/(EMIR) 6.PV 7.STA/Synthesis

Role & responsibilities Experience in the development of Generic APIs Development / improvement of the assigned products and overall review of development activities. To finalize route based on literature or feasibility of process or availability of raw materials. Technology transfer, scale-up and troubleshooting To provide required relevant information for regulatory filing and response to regulatory queries. To prepare and review documents Maintain the development records and overall review of given projects. To maintain records as per IMS requirements. Preferred candidate profile Must have experience in the development of Generic APIs

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high performance analog semiconductors whose solutions are powering the wireless networking revolution. At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management and the freedom to make meaningful contributions in a setting that encourages creativity and out-of-the-box thinking. Our work culture values diversity, social responsibility, open communication, mutual trust and respect. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together can change the way the world communicates. Requisition ID: 74460 Summary Job Description Digital design engineer developing complex mixed-signal ICs for frequency control, clock generation, network synchronization, and other timing applications. Candidate will take a supporting or leading role depending on experience relative to other team members, but regardless of experience level, candidate will be involved in all aspects of the design process from system conceptualization to mass production. For example, candidate will participate in digital system architecture, block- and system-level RTL design/coding, algorithm and firmware development, digital circuit back-end (e.g. synthesis, timing closure, P&R preparation, scan insertion), firmware development (some ICs include embedded processors), digital design verification, and full-chip mixed-signal verification. Responsibilities will also include detailed documentation, test vector development, lab test and evaluation, customer support, and other activities as required for the achievement of high volume production. Responsibilities Digital design specification, design, analysis, and HDL (Verilog) coding Behavioral modeling of analog and mixed signal circuits Digital back-end: synthesis, physical implementation (prep for P&R), static timing, scan insertion, etc. Verification of digital sub-systems, mixed-signal sub-systems, and the entire chip using a combination of digital models/RTL, firmware, and behavioral models. Test bench development Validation of silicon functionality, behavior, and performance Job Requirements Master's with 7-10 years of IC design experience or PhD with 4-6 years of IC design experience Strong motivation to contribute to all facets of chip design from conceptualization to release to production Working knowledge of digital IC circuit design in an HDL synthesis environment Working knowledge of digital verification and testing techniques Good verbal and written communication skills, positive attitude, desire to learn, and willingness to work on a team Working knowledge of UNIX operating systems Additional skills (one or more of these are highly desirable): Experience with digital design at geometries ranging from 130-40 nm Experience with digital IO interfaces such at I2C, SPI, etc. Competence in high-level languages (e.g. Matlab, C), scripting languages (e.g. Tcl, Perl, Python, SKILL), and version control systems (e.g. SVN, SOS) Working knowledge of System Verilog and/or UVM Experience leading a team of digital designers, either formally or informally Experience with embedded processor design and firmware/software development, especially for 8051 or ARM cores Competence in exploring digital and firmware system/architecture trade-offs such as memory size (ROM, RAM, FLASH, OTP, cache), clock speed, multiple clock domains, and the necessity for dedicated logic and DSP Experience with memory generators and MBIST Low power design and implementation techniques Familiarity with DSP techniques and algorithms Experience with Phase-locked-loops, Frequency Synthesizers or CDR circuits. Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law.

About LSEG: The London Stock Exchange Group (LSEG) is a global financial markets infrastructure and data provider headquartered in London, UK. Established in 2007, though its core institution—the London Stock Exchange—dates to 1801, LSEG plays a meaningful role in capital markets worldwide. It operates several trading venues, including the London Stock Exchange, Borsa Italiana, and Turquoise. Application Support Engineer role that does the ingestion and delivery of subsets of licensed data to each of our client bases using in-house software. This role also involves taking database backup/restore, application installation & configuration, system maintenance and troubleshooting, DB failover, Cluster failover and DR failover. Interacting with the software, supervising the application process and logs, handling issues or escalating issues to the respective team. The role requires a detail-oriented person who can follow through on instructions, adapt as needed while working in a heavy multi-tasking and fast-paced role. We are the leading source of intelligent information for the world's businesses and professionals, providing customers with competitive advantage. Intelligent information is a unique synthesis of human intelligence, industry expertise and innovative technology that provides decision-makers with the knowledge to act, enabling them to make better decisions faster. We deliver this must-have insight to the financial and risk, legal, tax and accounting, intellectual property and science and media markets, powered by the world's most trusted news organization. Location : Bengaluru Job Type : Full Time Experience Level : 7 + years Day-to-Day responsibilities will include, but not limited to: Process daily, weekly and monthly files using our in-house software Maintain checklist and deliver data as per schedule Assist data quality team, support team and data metrics team with operational projects Maintain documentation on process and procedures Incident and change management processes Support development team with data needs Get along with vendors to resolve timing, data quality and other issues Data analysis and divergence using in-house application Attend queries raised by internal clients and resolve them within prescribed timeline Candidates should be willing to work on 24/7 shifts Required Skills Application support experience Technical skills and experience: I. SQL Server & DBA skills (DB backup/restore, log shipping, import/export, data issue management) II. Windows Administration skills III. Experience performing DR failover, cluster failover IV. Knowledge of networking V. Sophisticated application setup and configuration VI. Experience analyzing & fix technical issues in Database, Operating system and application VII. Basic scripting knowledge Excellent written and oral communication skills Well organized, detail-oriented, ability to work independently, Problem solving and time management skills Experience We are looking for Graduates (B.Sc/M.Sc Computer Science, B.CA/ MCA, B.E ) with demonstrated ability in Application support or Technical operation. Why Join Us? Work on a critical system with high visibility across the organization. Be part of a supportive and skilled team focused on operational excellence. Opportunity to lead technical improvements and influence support strategy. Competitive salary and benefits with learning and career development opportunities. Every day will bring new and exciting challenges on the job while you: Learn and use groundbreaking technologies. Apply sophisticated fix techniques to provide outstanding solutions to our customers' individual needs. Interact with leading engineers around the world. What Makes This Opportunity Exciting Lead with Impact: You won’t just maintain systems—you’ll drive improvements, influence architecture decisions, and help shape the support strategy for a business-critical data platform. Growth-Driven Culture: We're committed to your professional development. You’ll have access to learning resources, certifications, and the opportunity to mentor others and grow into a leadership or architecture role. Modernization Journey: Be part of a team that’s modernizing its data estate. While we rely on SQL Server and SSIS today, we’re actively exploring cloud-native platforms—your voice will help guide that transition. Collaborative Environment: Work multi-functionally with guides in data engineering, DevOps, and analytics in a culture that values curiosity, accountability, and continuous improvement. Tech that Matters: You'll support systems that drive real-time business decisions, impact thousands of users, and power insights across departments. LSEG is a leading global financial markets infrastructure and data provider. Our purpose is driving financial stability, empowering economies and enabling customers to create sustainable growth. Our purpose is the foundation on which our culture is built. Our values of Integrity, Partnership , Excellence and Change underpin our purpose and set the standard for everything we do, every day. They go to the heart of who we are and guide our decision making and everyday actions. Working with us means that you will be part of a dynamic organisation of 25,000 people across 65 countries. However, we will value your individuality and enable you to bring your true self to work so you can help enrich our diverse workforce. You will be part of a collaborative and creative culture where we encourage new ideas and are committed to sustainability across our global business. You will experience the critical role we have in helping to re-engineer the financial ecosystem to support and drive sustainable economic growth. Together, we are aiming to achieve this growth by accelerating the just transition to net zero, enabling growth of the green economy and creating inclusive economic opportunity. LSEG offers a range of tailored benefits and support, including healthcare, retirement planning, paid volunteering days and wellbeing initiatives. We are proud to be an equal opportunities employer. This means that we do not discriminate on the basis of anyone’s race, religion, colour, national origin, gender, sexual orientation, gender identity, gender expression, age, marital status, veteran status, pregnancy or disability, or any other basis protected under applicable law. Conforming with applicable law, we can reasonably accommodate applicants' and employees' religious practices and beliefs, as well as mental health or physical disability needs. Please take a moment to read this privacy notice carefully, as it describes what personal information London Stock Exchange Group (LSEG) (we) may hold about you, what it’s used for, and how it’s obtained, your rights and how to contact us as a data subject. If you are submitting as a Recruitment Agency Partner, it is essential and your responsibility to ensure that candidates applying to LSEG are aware of this privacy notice.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SE NIOR SILICON DESIGN ENGINEER 1. Must have SoC implementation knowledge with deep level expertise in at least one domain. Have responsibility for processes of significant technical importance and for results in SoC implementation and/OR related areas. Solve complex, novel and non-recurring problems; initiates significant changes to existing processes/methods and leads development and implementation. Influences technical decisions that have a significant impact on final product. Requires limited supervision and is evaluated according to project performance. Coaches and mentors less experienced staff; influences others as a technical leader. very good communication and presentation skills Proficiency in scripting Required Skills: SoC implementation expertise. Multi million gates integration. Low power implementation, Constraints validation, Formal verification Floorplanning, Power planning. Clock Tree Synthesis (CTS). Awareness of Synthesis, SCAN and DFT implementation Static Timing analysis (STA). Analysis: IR, EM, Noise. Physical Verification #LI-PK2 Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Responsibilities & Key Deliverables Key Responsibilities & Deliverables: 1. Time-Driven Part Development: Spearhead parts' development in strict alignment with the APQP methodology, emphasizing timely execution without compromising quality. 2. Budgetary Mastery: Strategize and implement the investment budget, focusing on optimal time and resource allocation for swift returns. 3. Punctual FTG Tracking: Ensure timely development and tracking of FTGs, setting clear benchmarks and timelines to guarantee prompt deliveries. 4. Swift Quote Analysis: Accelerate synthesis preparation for quotes, enabling rapid decisions and quicker turnarounds. 5. Prototype Expediency: Manage proto parts quotes' settlement and development, ensuring rapid response times and faster development cycles. 6. Efficient Financial Operations: Expedite Capital & Revenue PR & PO releases and supplier capital payment releases, emphasizing speed and precision in financial transactions. 7. ROCM Swift Updates: Ensure real-time ROCM settlement and updates, eliminating lags and fostering prompt actions. 8. Rapid Supplier Collaboration: Lead supplier interactions with a keen focus on immediate responses, setting clear SOP timelines, and ensuring on-the-dot handovers. 9. Capacity Excellence: Prioritize swift establishment of supplier capacities, ensuring they are up and running in record time without quality compromises. 10. Tooling Precision: Oversee tooling agreements with speed and accuracy, ensuring swift closures and timely implementations. 11. Process Acceleration: Collaborate with suppliers to finalize processes at breakneck speed, while ensuring the integration of PFMEA and alignment with FTG concept design, planning, and calibration. 12. Swift Supplier Auditing: Expedite supplier audits for swift finalization of new sources and immediate identification of existing source gaps. 13. Rapid Pricing Decisions: Collaborate seamlessly with the pricing team to quickly finalize new parts' costs and promptly suggest VA/VE proposals. 14. Change Management: Dive into various Cross-Functional Teams (CFT), ensuring immediate adaptability and swift change management processes. 15. Supplier Enhancement: Prioritize rapid elevation of supplier competencies through immediate technical assistance, training, and guidance. 16. Real-time MIS Management: Ensure instantaneous MIS preparations, enabling real-time insights and decisions. 17. Swift Synergy Building: Foster speedy collaborations within and outside the department, ensuring real-time collaborations and feedback loops. 18. Unwavering Quality Adherence: Ensure the stringent and swift adherence to the Quality Management System (QMS) specific to the CDMM department, with quality always at the forefront. Experience 5-10 Years Industry Preferred Qualifications BE - Electrical /Electronics General Requirements Competencies Expected: Product & Process Knowledge in (Battery Properitary components like Infotainment, Instrument Cluster, BCM, Battery Management Sensors, HUD, USB docking, Wireless charger, Antenna, Passive Keyless Entry system, Electonic steering lock APQP & PPAP Part and tooling Cost analysis and synthesis Gerber study and Manufacturing Feasibility Capacity analysis Project Management Tooling Estimation and Budget Management Knowledge in Packaging & Logistics Knowledge in VAVE activites Job Segment: Electrical, Engineering, Automotive