Category Engineering Hire Type Employee Job ID 5945 Remote Eligible No Date Posted 04/11/2024 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a driven and detail-oriented individual with a passion for cutting-edge technology and continuous learning. With 0-1 years of related experience, you possess a sufficient understanding of DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. You have moderate experience in generating scan patterns and coverage statistics for various fault models like stuck-at, IDDQ, transition faults, and path delay. Your experience in scan stuck-at and at-speed coverage exploration, simulation, and debug is commendable. Familiarity with state-of-the-art EDA tools for DFT, design, and verification is a plus. Additionally, you have some knowledge of STA for DFT mode timing constraint development and exploration. Your debugging skills and demonstrated experiences in Perl/TCL/Python scripting are an advantage. You are an excellent communicator and can effectively work with cross-functional teams across geographies. Design experience in MBIST, LBIST, and Analog DFT is an added advantage. You value inclusion and diversity and are committed to contributing to a collaborative and innovative work environment. What You’ll Be Doing: Implementing DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. Generating scan patterns and coverage statistics for various fault models. Exploring, simulating, and debugging scan stuck-at and at-speed coverage. Utilizing state-of-the-art EDA tools for DFT, design, and verification. Developing and exploring STA for DFT mode timing constraints. Collaborating with cross-functional teams across geographies to achieve project goals. The Impact You Will Have: Enhancing the reliability and quality of our high-performance silicon chips through robust DFT methodologies. Contributing to the efficiency of our chip design and verification processes. Supporting the continuous innovation of our technology and products. Ensuring seamless integration of DFT in our chip design workflows. Improving fault detection and coverage, thereby reducing time-to-market for our products. Fostering a collaborative and inclusive work environment that drives technological advancements. What You’ll Need: 0-3 years of related experience in DFT architectures and methodologies. Moderate experience in generating scan patterns and coverage statistics for various fault models. Experience in scan stuck-at and at-speed coverage exploration, simulation, and debug. Familiarity with state-of-the-art EDA tools for DFT, design, and verification. Basic knowledge of STA for DFT mode timing constraint development and exploration. Who You Are: Excellent communicator with the ability to work effectively with cross-functional teams. Detail-oriented and driven by a passion for technology and continuous learning. Strong debugging skills and experience in scripting languages like Perl, TCL, and Python. Committed to fostering an inclusive and diverse work environment. Adaptable and eager to take on new challenges and responsibilities. The Team You’ll Be A Part Of: You will join a dynamic and innovative team focused on developing and implementing cutting-edge DFT methodologies to enhance the reliability and performance of our silicon chips. The team collaborates closely with cross-functional groups across geographies to drive technological advancements and achieve project goals. Together, we are committed to continuous learning, innovation, and fostering an inclusive work environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: General Management Hire Type: Employee Job ID 10752 Date posted 04/23/2025 You Are: You are a seasoned professional with a robust understanding of project and program management. You have a knack for driving the on-time delivery of patches and releases for small products and can assist with larger product releases. You possess excellent interpersonal and communication skills, enabling you to interface seamlessly between R&D, DevOps, management, and Application Engineers. You bring a wealth of experience in software development, particularly in C/C++, and have an in-depth knowledge of project management concepts. Your passion for customer focus and quality is evident in your work, and you are always on the lookout for tools and automation to improve productivity and quality. You thrive in a process-orient ed environment, are confident in handling conflicting situations, and can work effectively across multiple teams and geographies. Your background in the EDA domain and knowledge of configuration management tools and Unix environments make you a valuable asset. With over 5 years of relevant experience in program management, process and releases, or software development, you are ready to take on new challenges and drive success for Synopsys. What You’ll Be Doing: Take ownership and drive on-time delivery of patches and releases for small products. Assist other Release Managers on larger products and assignments. Independently drive commitments and convergence of patches and releases as per established processes, welcoming new ideas. Act as the interface between R&D, DevOps, management, and Application Engineers. Utilize excellent interpersonal, communication, and follow-up skills to ensure team collaboration and success. hands-on experience in C/C++ software development to enhance project outcomes. What You’ll Need: Hands-on experience in C/C++ software development. In-depth knowledge of program management concepts. Experience with Perforce, Perl, Shell scripts, Python, Make, and other industry-stand ard configuration management tools. Proficiency in Unix environments. 5+ years of relevant experience in program management, process and releases, or software development. Excellent academic background with a B .E./B.Tech/M.T ech in Computer Science, Electrical, or Electronic Engineering from reputed universities. Who You Are: Process-orient ed and confident in handling conflicting situations. Flexible, resourceful, and responsible in completing assigned tasks. Passionate about customer focus and quality. Enthusiastic about trying new tools and automation for productivity and quality improvements. Experienced in multi-team, cross-geograph y product delivery. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 10201 Date posted 03/20/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Business Analyst with over 10 years of experience in IT, including at least 7 years in software testing and quality-related roles. Your expertise in Tricentis Tosca automation, particularly with SAP, Salesforce, Oracle CPQ, APIs, and web applications, sets you apart. You have a deep technical knowledge and understanding of software testing best practices and are proficient in automating User Experience (UX) for web-based, API, and desktop applications, including Vision AI+. You excel in test data management, continuous integration/continuous deployment (CI/CD) pipelines, and integrating Tricentis Tosca with QTest. Your leadership experience in test automation, collaborative mindset, and excellent communication skills make you an invaluable asset to any team. You are customer-centric, always seeking to deliver unique solutions, and you thrive in agile environments. You are open to learning new skills and technologies to stay ahead in a dynamic industry. What You’ll Be Doing: Designing and developing Test Automation Frameworks, approach, and methodologies for large enterprise projects. Creating, maintaining, and executing end-to-end test cases, test scripts, and test data. Defining test automation strategy, best practices, project structure, and review processes. Performing test infrastructure setup, upgrades, and migrations, including Tricentis Tosca. Managing users, projects, and test portfolios using Tosca Server and Tosca Commander. Integrating Tricentis Tosca with third-party tools. Conducting regular reviews and maintenance of the test portfolio to ensure adherence to best practices. Defining upgrade and maintenance approaches and performing necessary upgrades and migrations. Collaborating effectively with global cross-functional teams and stakeholders. Mentoring and guiding team members on test automation best practices. The Impact You Will Have: Enhancing the quality and reliability of software products through robust automation frameworks. Streamlining testing processes, leading to faster time-to-market for our solutions. Ensuring seamless integration of Tricentis Tosca with other tools and platforms. Driving continuous improvement in testing methodologies and practices. Providing leadership and mentorship to junior team members, fostering a culture of excellence. Contributing to the overall success and innovation of Synopsys' technology offerings. What You’ll Need: Minimum 7 years of experience in Tricentis Tosca automation with SAP, Salesforce, Oracle CPQ, APIs, Web applications, etc. Expertise in automating User Experience (UX) for Web-based, API, and Desktop applications, including Vision AI+. Proficient in Test Data management using Tricentis Data Services (TDS) and Tricentis Test Case Design (TCD). Experience in DEX Configuration & Execution. Ability to set up Continuous Integration/Continuous Deployment (CI/CD) pipelines with Tricentis Tosca. Expertise in QTest integration with Tosca Certifications TRICENTIS Certified SAP Testing Specialist TRICENTIS Certified Tosca Architect TRICENTIS Certified Automation Engineer TRICENTIS Certified QTest Specialist TRICENTIS Certified Test Design Specialist Who You Are: As a professional with a sophisticated understanding of software testing and automation, you possess excellent written and verbal communication skills, enabling you to effectively engage with diverse audiences. You have a customer-centric approach, always striving to deliver unique and impactful solutions. Your collaborative mindset allows you to work seamlessly within global cross-functional teams, and your openness to learning new skills and technologies ensures you remain at the forefront of industry advancements. You are a proactive leader, advocating for test-driven development (TDD) practices and driving necessary changes to achieve optimal results. The Team You’ll Be A Part Of: You will join a dynamic team of forward-thinking professionals dedicated to advancing software testing and automation practices. The team focuses on integrating cutting-edge technologies and methodologies to enhance the quality and reliability of our software products. Collaboration, innovation, and continuous improvement are at the core of our team's values, and we strive to create an environment where every member can thrive and contribute to our collective success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 9330 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a forward-thinking Cloud DevOps Engineer with a passion for modernizing infrastructure and enhancing the capabilities of CI/CD pipelines, containerization strategies, and hybrid cloud deployments. You thrive in environments where you can leverage your expertise in cloud infrastructure, distributed processing workloads, and AI-driven automation. Your collaborative spirit drives you to work closely with development, data, and GenAI teams to build resilient, scalable, and intelligent DevOps solutions. You are adept at integrating cutting-edge technologies and best practices to enhance both traditional and AI-driven workloads. Your proactive approach and problem-solving skills make you an invaluable asset to any team. What You’ll Be Doing: Designing, implementing, and optimizing CI/CD pipelines for cloud and hybrid environments. Integrating AI-driven pipeline automation for self-healing deployments and predictive troubleshooting. Leveraging GitOps (ArgoCD, Flux, Tekton) for declarative infrastructure management. Implementing progressive delivery strategies (Canary, Blue-Green, Feature Flags). Containerizing applications using Docker & Kubernetes (EKS, AKS, GKE, OpenShift, or on-prem clusters). Optimizing service orchestration and networking with service meshes (Istio, Linkerd, Consul). Implementing AI-enhanced observability for containerized services using AIOps-based monitoring. Automating provisioning with Terraform, CloudFormation, Pulumi, or CDK. Supporting and optimizing distributed computing workloads, including Apache Spark, Flink, or Ray. Using GenAI-driven copilots for DevOps automation, including scripting, deployment verification, and infra recommendations. The Impact You Will Have: Enhancing the efficiency and reliability of CI/CD pipelines and deployments. Driving the adoption of AI-driven automation to reduce downtime and improve system resilience. Enabling seamless application portability across on-prem and cloud environments. Implementing advanced observability solutions to proactively detect and resolve issues. Optimizing resource allocation and job scheduling for distributed processing workloads. Contributing to the development of intelligent DevOps solutions that support both traditional and AI-driven workloads. What You’ll Need: 5+ years of experience in DevOps, Cloud Engineering, or SRE. Hands-on expertise with CI/CD pipelines (Jenkins, GitHub Actions, GitLab CI, ArgoCD, Tekton, etc.). Strong experience with Kubernetes, container orchestration, and service meshes. Proficiency in Terraform, CloudFormation, Pulumi, or Infrastructure as Code (IaC) tools. Experience working in hybrid cloud environments (AWS, Azure, GCP, on-prem). Strong scripting skills in Python, Bash, or Go. Knowledge of distributed data processing frameworks (Spark, Flink, Ray, or similar). Who You Are: You are a collaborative and innovative professional with a strong technical background and a passion for continuous learning. You excel in problem-solving and thrive in dynamic environments where you can your expertise to drive significant improvements. Your excellent communication skills enable you to work effectively with diverse teams, and your commitment to excellence ensures that you consistently deliver high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team focused on optimizing cloud infrastructure and enhancing workloads to contribute to overall operational efficiency. This team is dedicated to driving the modernization and optimization of Infrastructure CI/CD pipelines and hybrid cloud deployments, ensuring that Synopsys remains at the forefront of technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10815 Remote Eligible No Date Posted 21/04/2025 Alternate Job Titles: Staff Implementation Engineer Senior Physical Design Engineer Technical Solutions Engineer We Are: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 10602 Date posted 04/17/2025 Alternate Job Titles: Senior Technical Writer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: Energetic, experienced, and organized, you are a writer who thrives in a vibrant environment and is passionate about cutting-edge technology. You have a knack for turning complex technical information into clear, concise, and user-friendly documentation. With a strong background in technical writing within the software or hardware industry, you bring a blend of creativity and precision to your work. You are a team player who can also work independently, and you take pride in delivering high-quality content on time. Your excellent communication and interpersonal skills enable you to collaborate effectively with engineers and other stakeholders. You are always eager to learn and adapt to new technologies, ensuring that your documentation remains relevant and up-to-date. If you care about doing a good job, about details, and about contributing to a dynamic team, Synopsys is the place for you. What You’ll Be Doing: Planning, organizing, writing, and editing a variety of customer documentation. Collaborating with engineers to understand product functionalitie s and features. Creating user manuals, reference guides, and online help content in various formats. Ensuring documentation is accurate, clear, and comprehensive. Maintaining and updating existing documentation to reflect product updates. Utilizing authoring tools such as FrameMaker and Oxygen to produce high-quality content. The Impact You Will Have: Empower customers to effectively use and optimize Synopsys products. Enhance user experience through clear and accessible documentation. Support product adoption and customer satisfaction. Contribute to the success of product releases with timely and accurate documentation. Facilitate better communication and understanding between customers and the engineering team. Help maintain Synopsys' reputation as a leader in semiconductor IP solutions. What You’ll Need: Degree or masters in electronics, science, hardware, computing, software, physics, mathematics, or engineering disciplines. Other technical disciplines considered. 3-5 years of technical writing experience in the software or hardware industry. Excellent problem-solvin g skills with strong logical reasoning. Proficiency with authoring tools such as FrameMaker and Oxygen. Excellent English writing and speaking skills. Who You Are: Excellent communication and interpersonal skills. Energetic and capable of learning new technologies as necessary. Team player with the ability to work independently. Detail-oriente d and committed to delivering high-quality work. Proactive and able to take ownership of projects with minimal supervision. The Team You’ll Be A Part Of: You will be part of a dynamic and experienced Technical Publications team that works closely with world-class engineers to create essential customer documentation. Our team is committed to empowering customers worldwide with comprehensive and user-friendly content that enhances their experience with Synopsys products. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 10318 Date posted 04/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a talented, energetic, and experienced individual eager to join our Synopsys Cloud Operations Support team. You possess a strong foundation in Linux administration and Azure fundamentals, with a keen eye for detail and a dedication to maintaining comprehensive documentation and adhering to established processes. Your communication skills are exceptional, enabling you to convey technical concepts clearly to both technical and non-technical audiences. You excel in practical decision-making and agile goal delivery, thriving in a dynamic team environment where collaboration and problem-solving are key. Multi-tasking and effective prioritization come naturally to you, allowing you to manage R&D-related activities efficiently and communicate actions and results as needed. With a background in customer support, computer operations, or systems administration, you bring a wealth of experience to the table, particularly in UNIX system administration and network operations. What You’ll Be Doing: Designing, automating, and supporting Linux systems and services in a 24/7 production environment. Independently and collaboratively evaluating, recommending, and implementing technical solutions to meet business needs. Collaborating with other technical teams to solve problems and continually evolve the technology. Troubleshooting issues to identify root causes and help unblock the customer. Preparing and maintaining documentation of systems, standards, configurations, and procedures. Supporting day-to-day operations including installation, configuration, maintenance, and troubleshooting of the engineering secure computing environment. Responding to alerts, reporting issues, escalating problems as required, and resolving significant matters using independent judgment within established support practices. Ensuring compliance with Synopsys security policies to protect stakeholder information. The Impact You Will Have: Maintaining the high-performance Synopsys Cloud environment, ensuring smooth operations and compliance with security policies. Contributing to the overall reliability and scalability of our cloud infrastructure. Enhancing customer satisfaction by resolving technical issues promptly and effectively. Driving continuous improvements in our technology and processes through collaboration and innovation. Ensuring the security and integrity of our systems through vigilant monitoring and maintenance. Supporting Synopsys' mission to lead in chip design, verification, and IP integration by providing a robust and reliable cloud environment. What You’ll Need: Extensive knowledge of Linux operating systems and security patching. Experience with installing, monitoring, and administering Linux systems (Ubuntu and RHEL primarily). One or more Linux System Administrator Certifications. Experience with monitoring and logging tools. Programming/Scripting skills in Shell/Python. Basic Networking fundamentals including TCP/IP, DNS, subnetting, and routing. Knowledge of networking for virtual machines, particularly regarding security and performance. Knowledge of remote desktop software solutions such as VNC, Citrix Xen server, and VDI. Solid knowledge of infrastructure services like Kickstart, NFS, DNS, and DHCP. Knowledge in Azure resources like VM, Network, NSG, and Blob Storage is a plus. Who You Are: Ability to clearly communicate technical concepts to both technical and non-technical users. Proven ability to work in a dynamic team environment, collaboratively resolving problems spanning multiple disciplines. Enthusiastic and capable of learning on the job. The Team You’ll Be A Part Of: The team's purpose is to build, operate, and maintain a high-performance Synopsys Cloud environment. You will be part of a dynamic team that collaborates to solve complex problems and continually evolve our technology to meet business needs. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10808 Remote Eligible No Date Posted 21/04/2025 Sr. Staff Verification Expert (CXL IP Design) The candidate will be part of the R&D in IP Group in India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will include IP Design Verification using UVM based environment methodology. Job Description: The candidate will be part of the Synopsys CXL IP Design verification R&D team at Synopsys. You will own UVM based verification environment, which handles multiple features of IP, test plan creation, test case writing, random constraint creation, coverage closure, SVA and Release. As part of the work, you will closely work with lead and be part of a global team of experienced engineers. Technical Expertise Needed: BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP. Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI,APB,AHB) etc Good knowledge of System Verilog. Hands-on experience with coverage closure and writing SVA for IP/SOC. Good simulation debugging skills. Experience with Perforce or similar revision control environment. Experience with Python/TCL or any scripting knowledge is an added advantage. Job Responsibilities include - Understand Standard Specifications, create testplan for the product and create UVM based testbench architecture. Propose and enhance the UVM architecture with unique idea for verification. Be single point of contact with hands-on experience on all verification tasks – Testbench Creation – Testplan creation – Coverage closure – SVA – Release Perform peer review of testbench code for continuous quality. Own simulation debugs using DVE/Verdi, interact with Design Team and aid in debug and Verification closure. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. Lead team of engineers to perform various verification activities on IPs/Subsystems. Anticipate problems and risks and work towards a resolution and risk mitigation plan. Assist and mentor the team in day-to-day activities and grow the capabilities of verification team for future assignments. Review various results and reports to provide continuous feedback to the team and improve quality of deliverables. Report status to management and provide suggestions to resolve any issues that may impact execution. The candidate must have excellent oratory and written communication skills in English, should be a team player and possess good problem-solving skills and show high levels of initiative. This position requires prior industry experience and is not open for college fresh grads. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, colour, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Delhi, National Capital Territory of Delhi, India Category: Engineering Hire Type: Employee Job ID 10807 Date posted 04/21/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled R&D Engineer with a deep understanding of system verification. You are enthusiastic about developing cutting-edge verification solutions for high-performance computing, data centers, mobile/client devices, automotive systems, and IoT segments. Your experience in architecting and building SystemVerilog UVM-based verification components, coupled with your expertise in cache coherency protocols and functional verification, makes you an ideal candidate for this role. You are a team player with excellent problem-solving abilities, strong analytical skills, and a keen attention to detail. Your background in verification IP development and your programming prowess in languages like Perl, Python, and Shell scripting set you apart as a valuable asset to our team. What You’ll Be Doing: Responsible for functional verification involving coherent and non-coherent IP designs. Collaborating with market leaders in High Performance Computing, Data Centre, Mobile/Client, Automotive, and IoT segments to define and develop products that meet complex verification requirements. Architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. Developing verification plans and driving functional coverage-driven verification closure of real designs. Debugging and resolving issues in verification environments to ensure robust and reliable verification processes. The Impact You Will Have: Enhancing the reliability and performance of high-performance computing and data center systems through rigorous verification processes. Contributing to the advancement of mobile and client devices by ensuring the integrity and functionality of their verification protocols. Driving innovation in the automotive sector by developing robust verification solutions for automotive systems. Supporting the growth of IoT applications by providing reliable and efficient verification for IoT devices. Collaborating with industry leaders to shape the future of system verification and contribute to technological advancements. Ensuring the successful implementation and integration of verification IPs, thereby enhancing the overall quality of our products. What You’ll Need: B.E/B.Tech in Electrical Engineering/Electronics & Communications Engineering with 10-15 years of relevant experience, OR M.E/M.Tech in VLSI Design/Microelectronics with 9-12 years of relevant experience. Hands-on experience in architecting and building SystemVerilog UVM-based verification components, testbenches, checkers, scoreboards, and verification IPs. You will be responsible for functional verification involving coherent and non-coherent IP designs. Protocol experience: Should have experience on UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol Who You Are: Excellent problem-solving, debugging, and analytical skills. Strong programming skills and familiarity with object-oriented programming concepts. Creative and innovative mindset. Excellent verbal and written communication skills. A collaborative team player with a passion for functional verification. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Delhi, National Capital Territory of Delhi, India Category: Engineering Hire Type: Employee Job ID 7249 Date posted 02/24/2025 Experience : 7yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bhubaneswar, Odisha, India Category: Engineering Hire Type: Employee Job ID 7067 Date posted 02/24/2025 Manager, AMS Design Analog/Mixed Signal Design PVT Sensor IP development is a critical offering for process , voltage , temperature and other monitoring Ips within SOC subsystem. Synopsys is market leader for these IP developments which are integral part of Silicon lifecycle monitoring. Job Overview Part of the rapidly expanding Sensor group, Manager, AMS Design drives and owns some of the leading Sensor IP design along with the team. This technical as well as management leadership position is responsible for IP group’s Analog/Mixed Signal Design abilities. This includes designing blocks like bandgap, temperature sensor, Analog to Digital converters, Oscillators, Power-on-reset , glitch detector and many other mixed signal Ips from scratch in latest technology nodes. The person needs to be a master of analog design with innovative mindset. Work will include architecture development, design, simulations and final ownership of silicon performance of the Ips in production. In addition to this understanding of digital flow and post silicon test/characterization is a desirable skill. Right candidate would have had good leadership experience and ability to manage a sizeable team towards its mission. Very strong people leadership with key drive. Also the leader will have a team responsible for the overall research and development of the IPs . Ensure productivity and efficiency of each team member ensuring career growth. Responsibilities and Duties Responsible for Analog design for MSIPs from architecture to production silicon Will set up and manage the team of Analog/Mixed Signal design experts Work out innovative design techniques to overcome challenges Team designs of bandgap, temperature sensors, Signa Delta ADCs , DAC, Voltage monitoring Ips, PLL Ensure right talent is identifies , managed , groomed and enable a stellar team performance Works together with global cross functional team for team’s success Qualifications BS or MS degree in Electrical Engineering/Computer Science/Computer Engineering. 10 - 15 years of experience in the fields of Analog/Mixed Signal design for leading edge technologies Innovation mindset with system modelling, architecture and best design practices Ability to lead a large team that will cover different R&D project for AMS IP development . Strong knowledge about custom SOC flow desirable. Understanding of Analog, digital flow and post silicon test/characterization is a desirable skill High in drive and bringing positive energy leading towards a mission Strong personal value system Preferred Skills High drive and people leadership skill Demonstrated experience with Analog/Mixed Signal Design and IP/Product ownership with Analog and Digital subsystems Thorough knowledge of AMS design flow with digital top SOC integration methodology Closely work with Analog Design and layout team by reviewing and guiding for best-in-class performance People management expertise, ability to bring good people and lead them from front Location: To be hired for Bhubaneswar ABOUT US Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for creative companies developing the electronic products and software applications we rely on every single day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you’re a system-on-chip (SoC) designer building advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver exceptional, secure products for the era of connected everything. The company is headquartered in Mountain View, California, and has approximately 113 offices located throughout North America, South America, Europe, Japan, Asia and India. Since 1986, Synopsys has been at the heart of accelerating electronics innovation with engineers around the world having used Synopsys technology to successfully design and create billions of chips and systems that are found in the electronics that people rely on every single day. Synopsys considers all applicants for employment without regard to race, color, religion, sex, gender preference, national origin, age, disability, or status as a Covered Veteran in accordance with federal law. In addition, Synopsys complies with applicable state and local laws prohibiting discrimination in employment in every jurisdiction in which it maintains facilities. Synopsys Inc. also provides reasonable accommodation to individuals with a disability in accordance with applicable laws. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 7932 Remote Eligible No Date Posted 21/01/2025 Alternate Job Titles: Analog Design Staff Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Analog Design Staff Engineer with a passion for innovation and a forward-looking approach to design. With over a decade of experience in the industry, you bring a wealth of knowledge in full custom analog/mixed-signal circuit design, circuit simulations, custom layout, and post-silicon characterization. Your expertise extends to advanced process challenges, including ESD and Reliability, and you are well-versed in the architecture, design, and verification of PVT sensors, Oscillators, Bandgap, PLLs, LDOs, ADCs, Amplifiers, PHYs, and other Mixed-signal blocks. You excel in leading teams, managing projects, and providing innovative solutions to meet project deadlines. Your exceptional communication, mentoring, and interpersonal skills enable you to collaborate effectively with both internal teams and external customers. You are proficient with circuit design and simulation tools from various EDA vendors and have hands-on experience with Custom Compiler or equivalent schematic and layout editor tools. Your technical expertise in the productization of advanced technologies sets you apart as a high-caliber individual in the field of analog design. What You’ll Be Doing: Developing new solutions in the field of on-die monitoring Liaising with the layout team to achieve the best possible engineering solutions Deploying new sensors into test chips and conducting post-silicon characterization Guiding junior engineers and tracking their work Conceptualizing, designing, and productizing state-of-the-art analog sensors Engaging in full custom analog/mixed-signal circuit design, simulations, and custom layout The Impact You Will Have: Driving innovation in on-die monitoring solutions Ensuring the highest quality engineering solutions through close collaboration with the layout team Advancing the deployment and characterization of new sensor technologies Mentoring and developing the next generation of engineers Contributing to the design and productization of cutting-edge analog sensors Enhancing the overall performance and reliability of our products What You’ll Need: B.Tech. or M.Tech. degree in Electrical Engineering with 10+ years of relevant industry experience or a Ph.D. with relevant experience Strong technical experience in custom Analog/AMS design techniques, implementation, and verification Knowledge of full custom layout techniques Experience with circuit design and simulation tools, IC design CAD packages from any EDA vendor Understanding of SPICE simulator concepts and simulation methods Who You Are: You possess a design-oriented and forward-looking thought process, capable of leading teams and managing projects independently. You are adept at providing innovative solutions and working towards meeting project deadlines. Your expertise in custom Analog/AMS design techniques, implementation, and verification is complemented by your excellent teamwork, communication, mentoring, and interpersonal skills. The Team You’ll Be A Part Of: You will be part of the PVT sensor group, a dynamic team focused on the design and implementation of state-of-the-art analog sensors. This team works collaboratively to develop new solutions in the field of on-die monitoring and deploy these solutions into test chips for post-silicon characterization. Your role will involve close collaboration with the layout team and guiding junior engineers to achieve the best possible engineering outcomes. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bhubaneswar, Odisha, India Category: Engineering Hire Type: Employee Job ID 9474 Date posted 02/24/2025 Lead ASIC Digital Design Verification / Full Chip & IP Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and detail-oriented verification engineer with a passion for ensuring the functionality and reliability of advanced semiconductor technologies. You possess a strong background in digital verification and have a keen understanding of analog and mixed-signal (AMS) verification flows. With 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development, you bring expertise in areas such as Digital Verification, AMS Verification with Verilog A, and RNM (Real Number Modeling). You thrive in a collaborative environment, working seamlessly with cross-functional teams to achieve top-level integration and verification goals. You are committed to continuous learning and eager to take on technical leadership roles, guiding teams to intercept TQV and other swim lanes for top-level integrations. Your knowledge of System Verilog, foundry PDKs, and SOC Design flow sets you apart, and you are ready to contribute to the success of Synopsys' Sensor IP business unit. What You’ll Be Doing: Leading the digital verification flow for PVT Sensor Digital Verification. Setting up and managing AMS Verification and front-end Integration for MSIPs. Developing and supporting next-generation analog, digital, and mixed-signal IPs. Ensuring all blocks are verified for behavioral and functionality from top-level integration. Collaborating with a team to intercept TQV and other swim lanes for top-level integrations. Implementing mixed-mode simulations with significant improvements in execution time. The Impact You Will Have: Enhancing the reliability and performance of semiconductor lifecycle management solutions. Accelerating the integration of intelligent in-chip sensors and analytics capabilities. Optimizing performance, power, area, schedule, and yield for cutting-edge technology products. Reducing risk and time-to-market for differentiated products. Contributing to the development of Synopsys' next-generation analog, digital, and mixed-signal IPs. Supporting the growth and success of Synopsys' Sensor IP business unit. What You’ll Need: BS or MS degree in Electrical Engineering, Computer Science, or Computer Engineering. 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development. Expertise in Digital Verification and/or AMS Verification with Verilog A and RNM. Proficiency in System Verilog and RNM (Real Number Modeling). Understanding of latest foundry PDKs and their usage in FE & BE flows. Who You Are: A detail-oriented and highly motivated verification engineer. A collaborative team player with excellent communication skills. A continuous learner eager to stay updated with industry trends and technologies. A leader capable of guiding and mentoring teams to achieve verification goals. A problem-solver with strong analytical and debugging skills. The Team You’ll Be A Part Of: You will be a key member of Synopsys' rapidly expanding Sensor IP business unit, working with a team of experts dedicated to developing and verifying next-generation analog, digital, and mixed-signal IPs. The team focuses on integrating intelligent in-chip sensors and analytics capabilities to enhance semiconductor lifecycle management solutions. Together, you will contribute to the success of Synopsys' innovative technology products, driving the future of the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bhubaneswar, Odisha, India Category: Engineering Hire Type: Employee Job ID 9576 Date posted 03/05/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated individual with a passion for technology and innovation. You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development. Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled. You thrive in a dynamic environment and excel in communication, teamwork, and leadership. You are eager to learn and contribute to the development of state-of-the-a rt PVT IP sensors that are integral to the silicon lifecycle monitoring process. You possess a mindset geared towards meticulous IP debug and documentation, ensuring the highest standards of product development and performance. What You’ll Be Doing: Serving as the single point of contact for post-silicon debug activities. Enabling Product Requirement Documents (PRDs). Working to enable IP as a product development platform. Handling hands-on post-silicon test setups. Collaborating on top-level physical design, board-level, and package-level designs. Developing post-silicon reports and conducting debug analysis. The Impact You Will Have: Driving the successful development and deployment of PVT IP sensors. Enhancing the reliability and performance of Synopsys' silicon lifecycle monitoring solutions. Ensuring high-quality product development through meticulous testing and debugging. Contributing to the continuous innovation in chip design and software security. Supporting Synopsys' leadership in the market for PVT IP developments. Empowering the creation of high-performan ce silicon chips used in various advanced technologies. What You’ll Need: Hands-on experience in post-silicon test setups. Sound knowledge of Digital/AMS chip design and post-silicon debug. BS or MS degree in Electrical Engineering with 3+ years of experience. Understanding of top-level physical design, board-level, and package-level designs. Expertise in RTL development and physical design. Who You Are: Strong communicator with excellent teamwork and interpersonal skills. Detail-oriente d with a mindset geared towards IP debug and documentation. Proactive learner with the ability to adapt to new IP functionalitie s. Effective leader with strong people management skills. Highly motivated and capable of mentoring both internal teams and external customers. The Team You’ll Be A Part Of: You will be part of the rapidly expanding PVT IP group at Synopsys, focusing on the development of cutting-edge PVT IP sensors. This team is dedicated to conceptualizin g, designing, and productizing state-of-the-a rt sensors that play a critical role in the silicon lifecycle monitoring process. Collaborate with a group of innovative and highly skilled professionals to drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bhubaneswar, Odisha, India Category: Engineering Hire Type: Employee Job ID 7953 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature and other monitoring IPs within SOC subsystems. Synopsys is a market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules. Contribute to the development and enhancement of layout design methodologies and best practices. Work closely with different function design leaders to understand/enhance processes and help to enhance methodology. Collaborate with internal infrastructure teams on compute grid, storage management, and job scheduling architecture, efficiency, maintenance, and forecasting. Understanding CAD infrastructure and methodology will help to set up project environments. Contribute to enhancing quality assurance methodology by adding more quality checks/gatings. Front End development process understanding and support internal tools development and automation to help improve productivity across ASIC design cycles. Work with design engineers on new tools/technology and new features evaluation and adoption. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Stay updated with the latest industry trends and advancements in A&MS layout design. Understanding of tools like VC Spyglass, Verdi, & views like SDF, Liberty, etc., and other frontend views will add value to this position. Writing RTL Code and TCL is a good addition. The Impact You Will Have: Enhance layout design methodologies and best practices, contributing to the overall quality and efficiency of the design process. Improve project forecasting capabilities by leveraging advanced monitoring and scheduling techniques. Boost productivity across ASIC design cycles through the development and automation of internal tools. Ensure design integrity and manufacturability through meticulous physical verification and design rule checks. Stay at the forefront of industry advancements, bringing the latest trends and technologies into Synopsys' design practices. Collaborate effectively with cross-functional teams, driving innovation and continuous improvement in design methodologies. What You’ll Need: Bachelor’s or master’s degree in engineering or a related field. 2 to 3+ years of experience in A&MS frontend and backend views & collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills. Who You Are: You are a highly motivated individual with a strong technical background and a passion for innovation. You possess excellent problem-solving skills and thrive in a collaborative, team-oriented environment. Your ability to adapt to fast-paced, dynamic work settings and your proactive approach to challenges make you an invaluable asset to the team. You are dedicated to continuous learning and staying updated with industry advancements, ensuring that your contributions drive Synopsys' success in the competitive semiconductor landscape. The Team You'll Be A Part Of: You will be joining a dynamic and forward-thinking team focused on developing cutting-edge PVT Sensor IPs and enhancing SOC subsystems. Our team is dedicated to pushing the boundaries of technology and innovation, ensuring that Synopsys remains a market leader in the semiconductor industry. Collaboration, continuous improvement, and a commitment to excellence are the core values that drive our team's success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 6134 Remote Eligible No Date Posted 08/09/2024 We are looking for a highly motivated individual, with expertise in IC design and physical implementation for a group with growth opportunities. Responsibilities include complete digital implementation from RTL to GDS including Synthesis, Floor-Planning, Power Planning and Analysis, CTS, Placement and Routing, STA, Formal Verification, EMIR Signoff and physical verification. The individual will contribute both on the implementation side as well as flow development for a variety of advanced high performance interface IPs, Test chips & Subsystems at latest techno nodes. The successful candidate: has solid engineering understanding of the underlying concepts of IC design, implementation flows and sign-off methodologies for deep submicron design. has intimate knowledge of the full design cycle from RTL to GDSII, including development of timing constraints has good scripting & programming skills (Perl, Tcl, Python etc); knowledge of CAD automation methods. Can interface with the larger product team to understand design constraints, deliverable formats, customer requirements Independent, timely decision maker and able to cope with interrupts Knowledge of IP Subsystem implementation & FE flows are added advantages 8+ years of hands-on experience in ASIC physical implementation and EDA tools with recent contribution to project tape-outs. Must demonstrate knowledge of the Synopsys tools, flows and methodologies including Design Compiler, IC Compiler/2, Fusion Compiler, Primetime, Formality, Star-RCXT, Hercules/ICV and other industry tools. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 8635 Remote Eligible No Date Posted 24/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As an ideal candidate for the ASIC Digital Design Engineer, Senior role, you are a highly motivated and innovative individual with a deep understanding of ASIC development flow. You are someone who thrives in dynamic environments and embraces the challenges that come with constant technological changes. You are self-motivated, proactive, and able to balance good design quality with tight deadlines. Your excellent communication skills enable you to interact seamlessly with different design groups and customer support teams. You are known for your ability to resolve issues creatively and exercise independent judgment in selecting methods and techniques to obtain solutions. You are a team player who can produce excellent results both as an individual and as part of a team. What You’ll Be Doing: Supporting development and verification of ASIC digital designs for next-generation NRZ and PAM-based SerDes products. Setting up and running lint/cdc/rdc checks using VC-Spyglass and synthesis flow using Design Compiler/Fusion Compiler. Working with Verilog and VCS to ensure design accuracy. Defining synthesis design constraints and resolving STA issues. Setting up and running FPGA prototyping flows to map RTL designs to Xilinx FPGAs. The Impact You Will Have: Contributing to the development of cutting-edge SerDes products that lead the industry. Enhancing the performance, power, and size efficiency of our silicon IP offerings. Enabling rapid market entry for differentiated products with reduced risk. Driving innovation in high-speed digital design and data recovery circuits. Supporting the creation of high-performance silicon chips and software content. Collaborating with a world-class team to solve complex design challenges. What You’ll Need: BSEE or MSEE with a minimum of 2 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and synthesis flow. Experience in coding, verifying Verilog and System Verilog design. Experience of working with minimum supervision and owning and delivering for front-end activities in IP/SOC. Experience of leading technically for front-end activities. Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows. Scripting experience in Shell, Perl, Python, and TCL (preferred). Who You Are: Excellent communicator with the ability to interact with diverse teams. Self-motivated and proactive, with a strong attention to detail. A creative problem-solver who can think independently. Capable of working under tight deadlines while maintaining high-quality standards. A team player who can contribute effectively both individually and collaboratively. The Team You’ll Be A Part Of: Join our highly experienced mixed-signal design and verification team, where you will work alongside experts in digital and mixed-signal engineering. Our team is dedicated to developing innovative solutions for the next generation of high-speed SerDes products, providing continuous training and opportunities for growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10522 Remote Eligible No Date Posted 07/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design. You have a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise includes circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structure, and interconnect failure modes in advanced finfet technology nodes. You excel in developing Analog Full custom circuit macros, such as PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP, in both planar and fin-fet CMOS technology. You thrive in collaborative environments, working closely with silicon test and debug experts to advance quality through Sim2Sil correlation. You are also passionate about building and nurturing key analog design talent to grow business impact through successful project execution. What You’ll Be Doing: Leading Serdes analog design and development. Analyzing various mixed signal techniques for power reduction, performance enhancement, and area reduction. Developing Analog Full custom circuit macros for High Speed PHY IP in advanced technology nodes. Collaborating with silicon test and debug experts for Sim2Sil correlation. Building and nurturing a team of analog design talent. Working with experienced teams locally and globally. The Impact You Will Have: Driving innovation in mixed-signal analog design. Enhancing the performance and efficiency of high-speed physical interfaces. Contributing to the development of cutting-edge technology in High Speed PHY IP. Improving quality and reliability through collaboration and Sim2Sil correlation. Growing the business impact by building and leading a talented team. Advancing Synopsys' leadership in chip design and IP integration. What You’ll Need: BE 18+ years of relevant experience or MTech 15+ years of relevant experience in mixed signal analog, clock, and datapath circuit design. Strong knowledge of RF architecture and blocks such as transceivers, VCOs, LNA, and up/down converters. Experience in designing Charge-pump-based PLLs, Fractional-N PLLs, Digital PLLs, XTAL oscillators, and LO generation circuits. Proficiency in high-speed digital circuit design and timing/phase noise analysis. Ability to create behavioral models of PLL to drive architectural decisions. Who You Are: Strong fundamentals of CMOS, device physics, and sub-micron design methodologies. Experience with PLL designs and high-speed digital circuit design. Knowledge of control systems, band gaps, bias, op-amps, LDOs, and feedback techniques. Experience in LC VCO/DCO design and performance parameters of VCO. Familiarity with digitally assisted analog circuit techniques. The Team You’ll Be A Part Of: You will be joining an expanding analog/mixed-signal serdes team involved in the design and development of cutting-edge High Speed PHYSICAL Interface Development. You will work with experienced teams locally and with colleagues from various sites across the globe, fostering a collaborative and innovative environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9945 Remote Eligible No Date Posted 10/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly experienced and motivated professional with a solid background in SoC RTL Design. With over 12 years of experience, you have honed your skills in RTL Design, Lint, CDC, RDC, Synthesis, and Constraints Development. You possess a deep understanding of design concepts, ASIC flows, and stakeholder management. Your technical expertise allows you to debug and diagnose violations and errors, set up flows and methodologies for RTL Signoff tools, and develop timing constraints. You are an effective leader, capable of managing and growing a team, providing continuous feedback, and improving the quality of deliverables. Your excellent communication skills help you interact with customers, peers, and management to understand needs, report status, and resolve issues efficiently. What You’ll Be Doing: Manage and lead a team of 7-8 SoC/Subsystem RTL Design Engineers for various customer engagements. Work with Synopsys customers to understand their needs and define RTL Signoff and design scope and activities. Lead the team to perform various RTL Design and Signoff activities for SoC Subsystems such as SoC u-Architecture and Integration, RTL Design (Verilog/SystemVerilog), Lint, CDC, RDC, Synthesis, Constraints Development. Assist and mentor the team in day-to-day activities and grow the capabilities of the RTL Design team for future assignments. Review various results and reports to provide continuous feedback to the team and improve the quality of deliverables. Report status to management and provide suggestions to resolve any issues that may impact execution. Understand the complexity and requirements of RTL Quality Signoff and propose resource requirements to complete the activities. Work with peers to improve methodology and improve execution efficiency. Collaborate with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tools. Train the team in design concepts and root-cause analysis. The Impact You Will Have: Drive the successful delivery of SoC Subsystems by leading a skilled team of RTL Design Engineers. Enhance the quality and efficiency of RTL Design and Signoff processes through continuous feedback and methodology improvements. Ensure customer satisfaction by understanding their needs and delivering high-quality solutions. Contribute to the growth and development of the RTL Design team, expanding their capabilities for future projects. Support Synopsys’ reputation as a leader in chip design and verification through successful project execution. Foster collaboration and innovation within the team and across different Synopsys departments. What You’ll Need: B.E/B. Tech/M.E/M. Tech in electronics with a minimum of 12+ years’ experience in SoC RTL Design. Technical expertise in various aspects of RTL Design and Signoff: LINT, CDC, RDC. Technical expertise on setting up flows and methodologies for quick deployment of RTL Signoff tools. Technical expertise in debugging and diagnosing violations and errors. Technical expertise in developing timing constraints and running preliminary synthesis for timing constraints check and area estimation. Ability to lead and manage a team to perform RTL Signoff on complex SoC/Subsystem. Experience with planning and managing various activities related to RTL Signoff and Design. Strong understanding of design concepts, ASIC flows, and stakeholders. Good communication skills. Who You Are: A proactive leader with excellent managerial skills. A team player who can mentor and guide engineers. An effective communicator who can interact with customers and stakeholders. A problem-solver with a keen eye for detail. An innovator who continuously seeks to improve processes. The Team You’ll Be A Part Of: As part of the System Solutions Group (SSG), you will lead a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, and methodology to enable our customers to complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9294 Remote Eligible No Date Posted 02/02/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a meticulous and results-driven professional with a passion for technology and innovation. With a solid background in electrical signal characterization and validation, you possess the expertise to perform complex testing on high-speed analog integrated circuits. Your analytical skills and problem-solving abilities enable you to debug and optimize silicon performance efficiently. You thrive in a collaborative environment, working alongside talented engineers to achieve common goals. Your proactive approach and strong communication skills make you a valuable asset to any team. What You’ll Be Doing: Performing testing on silicon implementations of high-speed analog integrated circuits. Reviewing and debugging silicon under test, as well as supporting hardware. Running characterization tests and creating detailed test reports. ing theoretical knowledge to investigate and explain circuit behavior and limitations in a testing environment. Developing test specifications, setup preparations, and board designs. Documenting and evaluating prototype performance. The Impact You Will Have: Ensuring the reliability and performance of high-speed analog integrated circuits. Contributing to the development of cutting-edge technology in the semiconductor industry. Enhancing the efficiency and accuracy of testing and validation processes. Supporting the continuous improvement of product quality and performance. Collaborating with cross-functional teams to drive innovation and excellence. Providing valuable insights and recommendations for design and process improvements. What You’ll Need: 3-5 years of experience in electrical signal characterization and validation. A degree in Electronic Engineering or a related field. Basic knowledge of analog IC circuits. Strong analytical and debugging skills with a positive approach to hardware and automation software. Understanding of SERDES test concepts. Exposure to software programming (Matlab, Python). Basic knowledge of FPGA programming. Good understanding of high-speed interface protocols such as PCIe, Ethernet, SATA, USB. Knowledge of signal integrity is an advantage. Who You Are: A detail-oriented and proactive engineer. A strong communicator with the ability to collaborate effectively with team members. A problem-solver who can theoretical knowledge to practical scenarios. A continuous learner who stays updated with the latest industry trends and technologies. An adaptable professional who can handle multiple tasks and priorities efficiently. The Team You’ll Be A Part Of: You will be joining a dynamic and innovative team of engineers focused on the testing and validation of high-speed analog integrated circuits. Our team is dedicated to ensuring the highest standards of quality and performance in our products. We work collaboratively to solve complex challenges and drive technological advancements in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 8945 Remote Eligible No Date Posted 28/01/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled Analog and Mixed-Signal Circuit Design Engineer with a passion for developing cutting-edge technology. With a strong foundation in circuit design fundamentals and a deep understanding of CMOS, device physics, and nanometer technologies, you excel in creating high-performance analog circuits. Your experience spans from designing transmitters and receivers to clocking circuits and serializers/deserializers. You are proficient in micro-architecting circuits from specifications, creating simulation environments, and debugging circuits. Your familiarity with high-speed designs, PAM4 serdes architectures, and automation/scripting languages further enhances your capabilities. You thrive in collaborative environments, working with global teams to deliver innovative solutions that drive technological advancements. What You’ll Be Doing: Analyze various analog circuit techniques for dynamic and static power reduction, performance enhancement, and area reduction. Develop Analog Full custom circuit macros, including Transmitters, Receivers, Clocking circuits, equalizers, serializers, de-serializers, and Analog Front End needed for High-Speed PHY IP. Leverage your understanding of circuit design and layout, along with knowledge of bipolar, CMOS, passive structure, and interconnect failure modes. Collaborate with experienced teams locally and globally to deliver high-performance silicon chips. Create simulation environments to verify circuit specifications and debug circuits as needed. Optimize layouts and parasitics to enhance circuit performance and reliability. The Impact You Will Have: Contribute to the design and verification of advanced silicon chips, accelerating their development and manufacturing processes. Enable customers to optimize their chips for power, cost, and performance, significantly reducing project schedules. Drive innovations in high-speed physical interfaces, enhancing the performance and reliability of our products. Collaborate with global teams to leverage diverse expertise and deliver cutting-edge technology solutions. Influence the development of next-generation processes and models for manufacturing high-performance silicon chips. Ensure the successful implementation of analog and mixed-signal circuit designs in advanced CMOS technologies. What You’ll Need: BE with 5+ years of relevant experience or MTech with 4+ years of relevant experience in Electrical/Electronics/VLSI Engineering or a related field. Strong fundamentals in CMOS circuit design, device physics, and sub-micron design methodologies. Experience with analog transistor-level circuit design in nanometer technologies. Familiarity with Multi Gbps range high-speed designs, including PAM4 serdes architectures. Proficiency in creating simulation environments and debugging circuits. Who You Are: Detail-oriented with excellent problem-solving skills. Strong communicator, capable of collaborating with teams across different locations. Innovative thinker with a passion for technology and circuit design. Proactive and self-motivated, with the ability to work independently and as part of a team. Adaptable and open to learning new techniques and methodologies. The Team You’ll Be A Part Of: You will be part of a dedicated development team focused on High-Speed PHYSICAL Interface Development. This team comprises experienced professionals who collaborate locally and globally to deliver high-performance analog circuit designs. Together, you will push the boundaries of technology and contribute to the success of Synopsys' Silicon Design & Verification business. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 9500 Date posted 02/25/2025 Alternate Job Titles: Senior Research and Development Engineer Senior Systems Engineer Senior Embedded Systems Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and motivated Senior R&D Engineer with a passion for developing cutting-edge technology solutions. With a background in Computer Science or Electronics and over 6 years of relevant experience, you possess the technical prowess and problem-solvin g skills needed to excel in this role. Your expertise in C/C++ programming, coupled with a deep understanding of SoC architectures and serial bus protocols, makes you a valuable asset to our team. You thrive in collaborative environments, demonstrate high energy, and are always willing to go the extra mile to achieve project success. Your strong communication skills and ability to prioritize tasks independently allow you to effectively guide junior team members and interact with customers, ensuring the successful delivery of high-quality solutions. What You’ll Be Doing: Contributing to the modeling, integration, and testing of various peripherals within a SystemC-based platform modeling framework for diverse application domains such as Automotive and Wireless. Understanding IP modeling requirements and creating ESL model s pecifications. Effectively closing open technical issues to ensure project milestones are met. Guiding junior team members and consultants in projects involving SoC platform creation, validation, and software bring-up. Collaborating with cross-function al teams to ensure alignment and integration of virtual prototypes. Staying updated with the latest industry trends and advancements to continuously improve our development processes. The Impact You Will Have: Accelerating early software development and testing use cases for Automotive, Datacenter, AI, and Mobile products. Enhancing the accuracy and efficiency of virtual prototypes, leading to faster product development cycles. Providing critical insights and solutions to complex technical challenges, driving innovation within the team. Improving the overall quality and performance of our SoC modeling and simulation solutions. Supporting the seamless integration of various software applications and operating systems, such as Linux, Android, and AutoSar. Contributing to the success of high-profile projects that shape the future of technology and connectivity. What You’ll Need: BE / B.Tech / M.Tech in Computer Science or Electronics with 6+ years of relevant experience. Proficiency in C/C++ programming. Excellent problem-solvin g skills. Experience in application development in assembly or higher-level languages. Understanding of SoC architectures and serial bus protocols like CAN, LIN, SPI, I2C (preferred). Experience in SoC peripherals modeling using C /C++/SystemC/H DL (preferred). Experience in multi-core-bas ed platform developments (preferred). Who You Are: A high-energy individual with a willingness to go the extra mile. A team player with strong customer-facin g skills. Possess excellent written and verbal communication skills. Demonstrate a high level of initiative and accountability towards assigned tasks. Ability to prioritize and work independently on multiple tasks. The Team You’ll Be A Part Of: You will be part of an excellent development team in the System Level Design space. This team is involved in the creation of Virtual Prototypes (simulation models) for SoCs/MCUs/ECUs and the bring-up of L inux/Android/A utoSar OS/Embedded SW applications. Our focus is on catering to early Software Development & Testing use cases for Automotive, Datacenter, AI, and Mobile products. We collaborate closely to drive innovation and deliver high-quality solutions that meet the evolving needs of our customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10736 Date posted 04/24/2025 Experience: 14+ Years Education: BE / B. Tech / M. Tech or equivalent in Computer Science or Electronics Description Candidate will be part of word level Synthesis team (catering to multiple EDA products). Design, develop, troubleshoot the core algorithms. Will be working with local and global teams. Will be working on Synthesis QoR, Performance and logic interference problems It is a pure technical role. Will need to drive projects , solutions to complex problem with other team members Essential Skills: Ability to develop new software architecture and good leadership skills. Strong hands-on experience in C/C++ based software development. Strong background in Design Patterns, Data Structure, Algorithms, and programming concepts. Familiarity with multi-threaded and distributed code development. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Good knowledge of Verilog, SystemVerilog & VHDL HDL Well versed with Software Engineering and development processes Experience of production code development on Unix/Linux platforms. Exposure to developer tools such as gdb, Valgrind Exposure with source code control tool like Perforce. Good analysis and problem-solving skills. Desirable Skills: Work experience in Synthesis tools Work experience in EDA Experience in technically leading significant size projects Personal Attributes: Highly enthusiastic and energetic team player with the ability to go an extra mile. Good written and verbal communication skills. Strong desires to learn and explore new technologies. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9331 Remote Eligible No Date Posted 06/02/2025 Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open to continuous learning, passionate to work on cutting edge technologies and has excellent communication skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug and experience in working in a diverse environment where interaction with domain experts across global locations will be involved. Key Requirements Experience: Bachelor’s degree in Electronics with 7+ Years’ or Master’s degree in Electronics with 5+ Years' Experience in verification technologies (Simulation, UVM, SVA, LRM understanding) Strong HDL language support (Verilog, VHDL, System Verilog) Simulation, UVM, Design Verification Digital design fundamental and RTL coding understanding Good Debugging skills. Scripting – Perl, TCL, Make, Shell Scripting. Role - VCS Simulation Technology Product Engineer Solid fundamentals in Digital design, HDLs (Verilog/VHDL) and System Verilog Exposure to Synopsys EDA tools (SpyGlass, VC SpyGlass, Verdi) would be added advantage Excellent written and oral communication skills is a must as the role requires interfacing global teams, proposing solutions Must have working knowledge on UNIX, TCL and/or any other scripting language to be effective Team player, partners with multiple stakeholders, has attention to detail and innovative mindset Motivated, doer and self-organized team worker with good social communication skills Open to travel, ability to multi-task, be detail-oriented Drive VCS/related technology customer deployment working closely with field and R&D Drive competitive engagements, requirements gathering for delivery strong product roadmap Work directly with R&D, Product Validation & Customers to suggest improvements in implementation and validation Use in-depth product understanding to provide technical expertise, diagnose, troubleshoot issues At Synopsys, we’re at the heart of the innovations that positively impact the world. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you echo our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 6672 Remote Eligible No Date Posted 28/10/2024 Senior Digital Design Manager We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: We are seeking a highly motivated and experienced Digital Design Manager to lead a team of seasoned digital design engineers. You possess a deep understanding of the ASIC digital design flow, along with hands-on experience in HDL coding, RTL2GDSII flow, and scripting languages. You excel in managing project execution from defining specifications to silicon validation and characterization. Your leadership skills foster a collaborative environment, driving your team to meet stringent project requirements and deliver superior quality designs. With a minimum of 10 years in digital design and at least 3 years in a managerial role, you bring a wealth of knowledge and a proven track record of successful project completions. What You’ll Be Doing: Work closely with 3DIO Phy Architects to define specifications and micro-architecture, supporting early evaluations and feasibility studies to meet customer and system requirements. Lead the execution of digital design solutions for 3DIO Phy projects, ensuring robust and high-performance designs. Own the implementation of RTL in Verilog and sign-off using Spyglass CDC/RDC/Lint tools. Verify the RTL to test desired functionality, coverage, and corner cases using state-of-the-art verification methods. Oversee the full execution of RTL2GDSII, including timing constraints, DFT insertion, test coverage, formal verification, physical implementation, timing closure, physical verification, EMIR, and reliability sign-off. Support silicon validation and characterization through test chip implementation. Manage team members and operations, including career development and planning. The Impact You Will Have: Drive innovation in digital design solutions for 3DIO Phy projects, enhancing Synopsys' product offerings. Ensure high-quality and robust designs that meet customer requirements and improve system performance. Streamline the digital design process from specification to silicon validation, reducing time-to-market. Lead a team of talented engineers, fostering a collaborative and productive work environment. Contribute to the continuous improvement of design methodologies and best practices. Support Synopsys' position as a leader in the semiconductor industry through successful project deliveries. What You’ll Need: Excellent understanding of ASIC digital design flow with hands-on experience in HDL coding. Proficiency in writing synthesis constraints and basics of STA. Knowledge of Lint/CDC/RDC and RTL2GDSII flow. Working knowledge of scripting languages like Perl, Shell, Python, and Tcl. Experience in leading a small team of digital design engineers to execute projects. Knowledge of high-speed/DDR PHY Layer with lane redundancy implementation is highly desirable. Exposure to FIFO, test (ATE and characterization bench), silicon validation, and debugging. Familiarity with Synopsys toolset is highly desirable. Minimum 10 years of relevant digital design experience with at least 3 years as a people manager. B.E/B.Tech/M.Tech in ECE/EE. Who You Are: Strong leadership skills with a proven track record of managing and developing teams. Excellent problem-solving abilities and attention to detail. Effective communication skills, both written and verbal. Ability to work collaboratively in a fast-paced, dynamic environment. Innovative and proactive mindset with a passion for continuous improvement. The Team You’ll Be A Part Of: You will be part of a highly skilled and dynamic team focused on digital design for 3DIO Phy solutions. The team collaborates closely with architects, verification engineers, and other stakeholders to deliver high-quality and innovative design solutions. Together, you will drive the success of Synopsys' cutting-edge technology projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.