Role: Verification/ Hardware Design Engineer Locations: Hyderabad No. of positions: Multiple Experience : 4+ years Requirements Detailed Job functions: Understand the FPGA design functionality, create detailed verification cases and test procedures. Experience in designing Analog circuit, Digital circuits and Power circuits. Hands-on Schematic design, Simulation and design verification. Hands-on troubleshooting Hardware issues of Analog and Digital circuits and Software issues. Well versed with FPGA design flow. Should have hands on experience and ability to work individually and be a team player. Must Skills Hands-on experience in EDA and Simulation Tools – Xilinx Vivado, Altera Quartus, Mentor graphics, and Synopsys. Familiarity with communication and serial protocols – ARINC, RS 232/422/485, SPI, and I2C. RTL development using – VHDL, Verilog, and System Verilog. Experience of working in a Windows and Linux based environment. Strong in oral and written communication skills. Nice To Have Experience in working with defense and aerospace industries. Experience in working on DOORS. Experience in peer reviews. Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Job Summary This position is open for 2-10 years’ experience candidate in Qualcomm CSI (Custom/SemiCustom implementation) team Candidate will be part of CSI team working on RTL- GDS HM implementations using custom flow and methodology for custom design . Qualcomm is one of the fastest growing semiconductor organization in India making high-end Chips with the most advanced technologies. To support its growing needs, we have strong CSI team for the design, development of various highspeed and low power IP’s being used in SoC. Individual has to work on RTL-GDS implementation. This will involve innovating new solutions in close collaboration with the other design teams. Job Responsibilities Job responsibilities include design and development of custom macro using Schematic design at block level (Ex RegArray, memory subsystem) Frontend verification and model generations CLP/PAGLS/LEC verifications at block level. Functional verification using spice/gatesim. Timing Signoff using PT, Candidate should be able to collaborate with different teams. Skillset/Experience 2-10 year of experience: Strong knowledge in transistor circuit design& block level logic design of Memory subsystem & Data path. STA for the design to close Set-up, Hold, MPW, Transition, etc Design verification using ESPCV & LEC, Simulation using Finesim & HSPICE. Front-end RTL Design (Verilog RTL design, System Verilog, Synopsys Design Compiler, Cadence RTL Compiler, LEC, PLDRC, Static Timing Analysis and PTPX) Physical Design using industry-standard RTL2GDS flow including Synopsys ICC2, Cadence Encounter. Scripting in Perl/Python/Shell/Tcl for productivity is a plus IP development (custom macro transistor level design, physical integration, collateral generation, flow development) and PPA quantification. Interface with Process Technology Team to understand the complex DRC and DFM requirements of the advanced technology nodes Work with cross functional teams (Architecture, Test/Verification , Product, CAD, Layout, Physical Design) to gather/define/implement specs Transistor level implementation of the block using CMOS/Domino/Cell-Based/Data path styles Implement power/clock gating techniques, Implement power/clock gating techniques, Implement industry standard as well as custom DFT techniques Implement clock distribution using custom/CTS techniques for low skew/latency/power, Implement block layout using custom/compiler techniques using custom/semi-custom/stdcell libraries Implement block level floor planning using custom and/or tiling techniques Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3075292 Show more Show less

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Systems Engineering General Summary As a PCIe Architect Lead within the NoC Systems team, you will play a pivotal role in shaping the architecture of the next generation of PCIe (Peripheral Component Interconnect Express) Switches. This position requires a deep understanding of PCIe technology, strong architectural skills, and the ability to lead and collaborate with cross-functional teams. Key Responsibilities Architecture Development: Lead the design and development of the next-generation PCIe Switch architecture. Define and document the architectural specifications, ensuring they meet performance, reliability, and scalability requirements. Collaborate with hardware and software teams to ensure seamless integration of the PCIe Switch into the overall system. Technical Leadership Provide technical leadership and guidance to the NoC Systems team. Mentor and train junior engineers, fostering a culture of innovation and continuous improvement. Stay abreast of the latest industry trends and advancements in PCIe technology. Other Responsibilities SoC Interconnect for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. This position includes but no limited to:- NoC Systems lead and is part of BDC infrastructure (NoC/Interconnect) core team Responsible for system requirement collection, use-case understanding and preparing specification for interconnect working with adjacent IPs Actively work with QPA team, SoC team, verification team, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites Partner with SoC performance team ensuring Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions Remains abreast with next generation ARM/Amba specification, PCIe specification, QNoC changes and Low Power Technology changes to guide and influence the NoC Design, Verification, Power and Physical Design teams in improving their KPIs, processes leading to better Qualcomm products at efficient NRE Advises and leads small groups of less experienced engineers in evaluating various design features to identify potential flaws, compatibility issues, and/or compliance issues; reviews design evaluations conducted by less experienced engineers Troubleshoots multiple advanced issues with NoCs; uses a variety of debugging tools and methods Exercises exceptional creativity to innovate new ideas and develop innovative NoC systems and IP solutions without established objectives or known parameters Minimum Qualifications: 7 to 12 years of experience in SoC design/Systems, NoC design/Systems Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts Good knowledge of Digital Design and RTL development Hands-on experience with SoC Design, Verilog RTL coding Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification and silicon debug Working knowledge of Lint, CDC, PLDRC, CLP etc Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Should possess effective communication and leadership skills Minimum requirement is Bachelor of Engineering however preferred is Masters of Engineering in Computer Science or Computer Engineering. PhD in Computer Science, Engineering, Information Systems, or related field and 15+ years of Hardware Engineering or related work experience is welcome Minimum Qualifications Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3066994 Show more Show less

Role Description Role Proficiency: Independently execute mid sized customer projects in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor owning any one task of RTL Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams On time quality delivery approved by the project manager and client Automate the design tasks flows and write scripts to generate reports Come up with novel ideas to reduce design cycle time and cost accepted by UST Manager and client Measures Of Outcomes Quality –verified using relevant metrics by UST Manager / Client Manager Timely delivery - verified using relevant metrics by UST Manager / Client Manager Reduction in cycle time cost using innovative approaches Number of papers published Number of patents filed Number of mandatory trainings attended adhering to training goals Outputs Expected Quality of the deliverables: Ensure zero bugs are present in the design / circuit design. Clean delivery of the design/module in-terms of ease in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation of tasks and work performed Timely Delivery Ensure project timelines as laid out by the client or program manager are met Meet intermediate tasks delivery for other team members to progress Calling out for help and support in the case of delay in tasks delivery New Skills Development Participate in training – skilling someone and also getting skilled in newer technologies Take up new areas of project development learn on the job and deliver Team Work Participation in team work and supporting team members at the time of need Able to take up additional tasks in-case of any team member(s) not available Able to hand hold junior team members to explain the project tasks and support to deliver Work dedication to go beyond the call of duty to ensure deadlines and quality are met Innovation & Creativity Approach towards repeated work by automating tasks to save design cycle time Participation on technical discussion training forum white paper etc Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills and ability to interact with team members and clients equally Strong analytical reasoning and problem-solving skills with attention to details Ability to understand the standard specs and functional documents Ability to deliver the tasks on-time in a quality fashion per quality guidelines and GANTT Well versed with the available EDA tools and able to use them efficiently Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present at a level needed to execute the project Knowledge Examples Knowledge of project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Understanding of the design flow and methodologies used in the designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills Additional Comments The person should have hands on experience(>8 Yrs.) on full custom Memory design & architectures, Characterization, Layout design, net-listers, complete SRAM Design verification at compiler level (not only at instance level) covering both design and layouts. The person should ensure to populate and publish Execution plan, Design Quality plan, DFMEA, Publish project health along with reporting of any risk and mitigation strategy. “ Skills Memory design and compiler,SRAM design,Design quality plan Show more Show less

Job Summary: We HCL TECH are seeking a highly skilled Design Verification Engineer (DV) to join our growing team and play a vital role in ensuring the quality and functionality of our advanced ASICs and SoCs. This position requires a strong foundation in verification methodologies and the ability to handle complex verification tasks. You will be instrumental in developing robust verification plans and environments to guarantee the success of our next-generation integrated circuits. Responsibilities: Develop and implement comprehensive verification plans utilizing industry-leading methodologies (UVM, Formal Verification) Design and create high-quality verification environments (testbenches) to achieve exceptional code coverage Utilize advanced verification tools (simulators, formal verification tools) to thoroughly verify RTL functionality Debug and analyze verification failures with a keen eye to identify and resolve the root cause of design issues Collaborate effectively with RTL design engineers to ensure efficient bug resolution and verification plan adherence Lead and mentor junior DV engineers within the team, fostering a collaborative and knowledge-sharing environment Participate in code reviews and champion best practices for verification code quality Stay current with the latest advancements in verification tools and methodologies Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus) 4-10 years of solid experience in Design Verification for ASICs or SoCs In-depth knowledge of digital design principles (combinational logic, sequential logic, finite state machines) Proven ability to develop, debug, and optimize complex verification environments Expertise in Verilog or VHDL with a strong understanding of verification methodologies (UVM, Formal) Extensive experience with simulation tools (ModelSim, Cadence Incisive, Synopsys VCS) and scripting languages (Python, Perl) Experience with formal verification tools and techniques is a plus Excellent analytical and problem-solving skills with a meticulous attention to detail Strong communication, collaboration, and leadership skills to effectively contribute and guide the team Benefits: Competitive salary and benefits package commensurate with experience Opportunity to work on leading-edge technologies and projects with a high impact Collaborative and dynamic work environment that fosters continuous learning Potential for professional development and career advancement

Lead Analog Layout Engineer Experience8 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Candidate should have a strong knowledge on devices and process/fabrication technology. Should have work experience in 7nm, 10nm, 14nm, 16nm etc Good understating of Deep Submicron issues and layout techniques. Expertise on matching, parasitic reduction, ESD, DFM etc. Proficiency in use of below EDA tools for full custom layout and post-layout verification DRC/LVS/DFM etc. Cadence Virtuoso Layout editor (L/XL/GXL) Verification toolsAssura/PVS/Calibre/ Hercules Ability to handle a team Preferred Skills: Scripting Knowledge of perl/shell/skill are highly preferred Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

Who We Are Applied Materials is the global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips- the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world- like AI and IoT. If you want to work beyond the cutting-edge, continuously pushing the boundaries of"science and engineering to make possible"the next generations of technology, join us to Make Possible® a Better Future. What We Offer Location: Bangalore,IND At Applied, we prioritize the well-being of you and your family and encourage you to bring your best self to work. Your happiness, health, and resiliency are at the core of our benefits and wellness programs. Our robust total rewards package makes it easier to take care of your whole self and your whole family. Were committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits . Youll also benefit from a supportive work culture that encourages you to learn, develop and grow your career as you take on challenges and drive innovative solutions for our customers."We empower our team to push the boundaries of what is possible"”while learning every day in a supportive leading global company. Visit our Careers website to learn more about careers at Applied. Applied Materials is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. Our innovations make possible„¢ the technology shaping the future. To achieve this, we employ some of the best, brightest, and most talented people in the world who work together as part of a winning team. Key Responsibilities Expertise in PDK enablement and library validation/automation. Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies Design/System level experience with DTCO and PPA analysis Hands-on expertise in TCL, Python, make and shell scripting Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus) Knowledge of standard cell architecture and design tradeoffs with respect to PPA Proactively identify and act on new trends or developments in future technology nodes Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise Creative thinking and ability to look ahead and anticipating future technology innovations/issues Ability to collaborate with internal stakeholders, customers and vendors Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment Mandatory - PDK, DRC, LVS, Python, Physical Design Functional Knowledge Demonstrates depth and/or breadth of expertise in own specialized discipline or field Business Expertise Interprets internal/external business challenges and recommends best practices to improve products, processes or services Leadership May lead functional teams or projects with moderate resource requirements, risk, and/or complexity Problem Solving Leads others to solve complex problems; uses sophisticated analytical thought to exercise judgment and identify innovative solutions Impact Impacts the achievement of customer, operational, project or service objectives; work is guided by functional policies interpersonal Skills Communicates difficult concepts and negotiates with others to adopt a different point of view Additional Information Time Type: Full time Employee Type: Assignee / Regular Travel: Yes, 10% of the Time Relocation Eligible: Yes Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 4746 Date posted 02/24/2025 Synopsys’ Generative AI Center of Excellence defines the technology strategy to advance applications of Generative AI across the company. The Gen AI COE pioneers the core technologies – platforms, processes, data, and foundation models – to enable generative AI solutions, and partners with business groups and corporate functions to advance AI-focused roadmaps. We are looking for an experienced, passionate, and self-driven individual who possesses both a broad technical strategy and the ability to tackle architectural and modernization challenges. As an Ideal candidate will help build enterprise Machine Learning platform. They will work with a team of enthusiastic and dynamic ML engineers and Data scientists in building a platform to help Synopsys R&D teams to experiment, train models and build Gen AI & ML products. You will be responsible for: Building AI Platform for Synopsys to orchestrate enterprise-wide Data pipelines, ML training, and inferencing servers. Develop "AI App Store" eco system to enable R&D teams to host Gen AI applications in Cloud Develop capabilities to ship Cloud Native (Containerized) AI applications/AI systems to on-premises customers Orchestrate GPU Scheduling from within Kubernetes eco-system (e.g. Nvidia GPU Operator, MIG, and so on) Create reliable and cost-effective Hybrid cloud architecture using cutting edge technologies (E.g. Kubernetes Cluster Federation, Azure Arc and so on) Required Qualifications BS/MS/PhD in Computer Science/Software Engineering or an equivalent degree 12+ years of total experience building systems software, enterprise software applications, and microservices Expertise and/or experience in following programming languages : Go and Python Experience building highly scalable REST API Experience with event driven software architecture and message brokers (NATS / Kafka) Design complex distributed systems (High-level and low-level systems design) Knowing CAP theorem in depth and ing it in building real-world distributed systems. In-Depth Kubernetes knowledge: Be able to deploy Kubernetes on-prem,working experience with managed Kubernetes services (AKS/EKS/GKE) and Kubernetes APIs Strong systems knowledge in Linux Kernel, CGroups, namespaces, and Docker Experience with at least one cloud provider (AWS/GCP/Azure) Ability to solve complex problems using efficient algorithms Experience with using RDBMS (PostgreSQL preferred) for storing and queuing large sets of data Nice to have: Experience with service meshes (Istio) Experience with Kubernetes cluster federation Prior experience with AI/ML workflows and tools (PyTorch, ML Flow, AirFlow, …) Experience prototyping, experimenting, and testing with large datasets, and analytic data flows in production Strong fundamentals in Statistics, Machine Learning, and/or Deep Learning At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 5440 Remote Eligible No Date Posted 23/08/2024 Synopsys' Mission: We power the Development, Verification, and Security of the amazing hardware and software inside Smart Everything, enabling the biggest technological transformation the world has ever seen. We are seeking an experienced analog design manager to lead our high-performance SERDES IP design team. This senior role will oversee all aspects of analog IP development and execution for cutting-edge SerDes architectures targeting advanced process nodes. Responsibilities: Manage and mentor a team of 8-10 senior analog designers focused on high-speed SerDes IP development across multiple projects Define architecture specifications and circuit implementation requirements for next-generation SerDes PHY IPs Ensure adherence to project schedules, quality metrics, power/area targets through effective team oversight Collaborate with cross-functional teams (digital design, physical design, CAD) to integrate analog IP components Partner with process engineering teams to enable robust analog IP across advanced FinFET nodes Continuously drive design methodology improvements and adoption of latest EDA tools/flows Develop and manage operational plan, including staffing, budgets and resource allocation Hire, develop and retain top analog engineering talent through active mentorship Requirements: Bachelor's degree in electrical engineering; advanced degree preferred 8+ years of experience in analog/mixed-signal IC design with a strong background in SerDes architectures 2+ years of people management experience leading high-performance analog design teams Proven expertise in high-speed I/O design, architectures, circuits, and layout implementation Extensive knowledge of CDR, DFE, CTLE, EQ, decision feedback equalizer design techniques Hands-on experience with analog/mixed-signal design flows, tools (Cadence, Synopsys), modeling Understanding of FinFET transistor characteristics and design challenges at advanced nodes Strong project management skills with the ability to manage multiple priorities Excellent communication and people leadership abilities to motivate cross-functional teams At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9308 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled AI Engineer passionate about transforming IT workflows into intelligent, agentic processes. Your expertise in Python, AI-driven IT automation, and IT infrastructure allows you to design and implement scalable and reliable AI-driven workflows that enhance IT operations. You thrive in collaborative environments, working closely with MLOps teams to ensure seamless deployment and optimization of AI solutions. Your ability to analyze and decompose complex IT workflows enables you to identify automation opportunities and create efficient, autonomous systems. With a strong focus on reliability and scalability, you ensure that AI-driven automation aligns with enterprise IT best practices and operates efficiently across cloud and hybrid IT environments. Your experience with ITSM platforms such as ServiceNow, BMC, or Jira, along with your knowledge of Kubernetes, Docker, and CI/CD pipelines, makes you an ideal candidate to lead the transformation of IT workflows into intelligent, self-sustaining AI-driven processes. What You’ll Be Doing: Analyze and decompose IT workflows, identifying automation opportunities using agentic AI. Implement autonomous AI-driven workflows for incident management, self-healing systems, and intelligent service operations. Fine-tune AI models and develop prompt engineering strategies for optimized performance. Develop and maintain robust, scalable AI-powered IT workflows. Ensure AI-driven automation is fault-tolerant, efficient, and aligned with enterprise IT best practices. Work closely with IT teams to integrate AI workflows into existing operational frameworks. Partner with MLOps engineers to deploy, monitor, and optimize AI-driven workflows in production. Continuously improve deployed models through feedback loops and real-world performance tuning. Use Python to develop automation scripts, AI workflow integrations, and API-driven IT solutions. Work with Kubernetes, Terraform, and CI/CD pipelines to ensure automated deployment and lifecycle management. The Impact You Will Have: Transform IT workflows into intelligent, agentic AI-driven processes. Enhance IT service efficiency through AI-driven incident resolution, self-healing systems, and workflow automation. Optimize IT operations by predicting, preventing, and resolving IT issues proactively. Ensure scalable AI deployment using Python, Kubernetes, and CI/CD for production-ready AI workflows. Reduce costs and improve reliability by minimizing downtime and optimizing resource usage with AI-powered automation. Enable self-healing IT systems and predictive issue resolution. What You’ll Need: Strong expertise in Python for scripting, API development, and IT automation. Experience in agent-based AI frameworks and autonomous workflow orchestration. Familiarity with ITSM platforms such as ServiceNow, BMC, or Jira. Hands-on experience with Kubernetes, Docker, and cloud automation tools. Experience working closely with MLOps teams to deploy and scale AI-driven IT automation. Who You Are: A proactive problem solver with a keen eye for detail. An effective communicator who can collaborate with cross-functional teams. Adaptable and able to thrive in a fast-paced, dynamic environment. Innovative and driven by a passion for continuous improvement. A strategic thinker with the ability to translate complex technical concepts into practical solutions. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on transforming IT workflows through the implementation of agentic AI solutions. The team collaborates closely with MLOps and IT departments to ensure that AI-driven workflows are reliable, scalable, and seamlessly integrated into existing operational frameworks. Together, you will work towards enhancing IT service efficiency, optimizing operations, and enabling self-healing systems. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 8936 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A seasoned professional with over 6 years of hands-on experience in SAP ABAP, you bring a wealth of knowledge and expertise in SAP-MM, SAP-SD, and SAP-FI. Your technical proficiency spans Data Dictionary, Table Maintenance, Classical/Interactive/ALV Reports, Function Modules/RFCs/BAPIs, Module Pool, BDCs, SAP Script/Smart-Forms, SAP Web Services, and Custom SAP screens. You are adept at developing solutions in the SAP-SD module, with a solid understanding of SAP SD processes. You possess excellent problem-solving skills and are a motivated team player with strong interpersonal skills. Your organizational and communication skills enable you to work effectively in a global team or independently. You have a proven ability to write code based on verbal or high-level directions, analyze business requirements, lead design sessions, and document functional specifications. Your expertise in designing and implementing robust and scalable solutions ensures that you can accommodate changing business needs. Additionally, you are skilled at documenting process flows and recommending changes to optimize business processes. What You’ll Be Doing: Developing and maintaining SAP ABAP programs with a focus on SAP-MM, SAP-SD, and SAP-FI modules. Creating and managing Data Dictionary objects, Table Maintenance, and ALV Reports. Developing Function Modules, RFCs, BAPIs, Module Pool programs, BDCs, and SAP Script/Smart-Forms. Implementing SAP Web Services and Custom SAP screens. Collaborating with business analysts to analyze business requirements and design scalable solutions. Leading design sessions and documenting functional specifications for new developments. Deploying solutions and providing support for existing systems. Documenting process flows and recommending optimizations for business processes. The Impact You Will Have: Enhancing the efficiency and effectiveness of SAP systems used by Synopsys. Contributing to the development of scalable business applications that drive operational success. Ensuring that SAP solutions meet the evolving needs of the Sales and Operations teams. Supporting the continuous improvement of business processes through innovative solutions. Providing technical expertise and guidance to other team members. Contributing to the overall success and growth of Synopsys through high-quality SAP development. What You’ll Need: Minimum of 6+ years of hands-on experience in SAP ABAP. Strong technical knowledge in Data Dictionary, Table Maintenance, ALV Reports, Function Modules/RFCs/BAPIs, Module Pool, BDCs, SAP Script/Smart-Forms, SAP Web Services, and Custom SAP screens. Development experience in SAP-SD module preferred. Understanding of SAP SD processes is a plus. Excellent problem-solving and analytical skills. Who You Are: A motivated team player with excellent interpersonal skills. Strong organizational and communication skills. Ability to work effectively in a global team or independently. Proficient in writing code based on verbal or high-level directions. Skilled in analyzing business requirements and leading design sessions. The Team You’ll Be A Part Of: You will be part of a dynamic team responsible for designing scalable SAP business solutions required for the Sales and Operations teams. The team is focused on developing business applications that contribute to the overall success of Synopsys. Your role will involve close collaboration with team members to ensure the effective implementation and optimization of SAP systems. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9746 Remote Eligible No Date Posted 27/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled ASIC Digital Design Engineer with a strong foundation in both analog and digital CMOS circuit designs. You thrive in dynamic environments and are adept at working with Verilog/System Verilog languages and methodologies such as VMM and UVM. You have a knack for writing and modifying test cases, checkers, and scoreboards within a system Verilog-based test environment. Your expertise extends to AMS verification, particularly in high-speed SerDes designs supporting multi-protocol s. Familiarity with Synopsys analog mixed-signal design tools and modeling languages like Verilog-A/AMS is a plus. You are proficient in programming/sc ripting languages like TCL, Perl, and Python, and have experience working with Linux. Your excellent communication skills and ability to take ownership of projects ensure that you meet deadlines and exceed expectations. Self-organizat ion is second nature to you, allowing you to manage time effectively and contribute meaningfully to your team's success. What You’ll Be Doing: Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-function al teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocol s. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performan ce silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You’ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectroni cs Knowledge or hands-on expertise/anal ysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocol s is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/sc ripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriente d and committed to delivering high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team of engineers focused on pushing the boundaries of ASIC digital design and verification. Our team values collaboration, innovation, and continuous improvement, working together to create cutting-edge solutions that drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 5263 Remote Eligible No Date Posted 23/08/2024 At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you

Category Engineering Hire Type Employee Job ID 10172 Remote Eligible No Date Posted 18/03/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and passionate Analog Design Engineer with a deep understanding of high-speed analog and mixed-signal circuit design. You have a strong background in designing components for PCIe 6 and PCIe 7 PHY designs and a keen eye for detail. You thrive in a collaborative environment and enjoy working with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Your expertise in jitter analysis, signal integrity, and high-speed clocking is unparalleled. You are proactive, innovative, and always eager to mentor junior engineers, sharing your knowledge and experience to foster their growth. What You’ll Be Doing: Design and develop analog/mixed-signal blocks for PCIe 6 and PCIe 7 PHY designs. Ensure designs meet PCIe protocol standards, optimizing for performance, power, and area targets. Support the porting of PHY designs to different technology nodes, maintaining signal integrity and performance. Collaborate with cross-functional teams to integrate analog circuits into larger SerDes PHY systems. Implement verification strategies for high-speed analog/mixed-signal circuits using advanced simulation tools. Work closely with physical layout teams to minimize parasitics, device stress, and process variation impacts. Analyze simulation and measurement data for design validation and compliance with PCIe standards. Provide technical guidance to junior engineers in analog/mixed-signal design methods. Document design features, specifications, and test plans for future reference. Work with the characterization team to validate the electrical performance of circuits in silicon. The Impact You Will Have: Drive the development of cutting-edge PCIe 6 and PCIe 7 PHY designs, pushing the boundaries of high-speed analog and mixed-signal circuits. Ensure that Synopsys' designs meet the highest standards of performance, power efficiency, and area optimization. Enhance the reliability and integrity of our analog circuits as they are ported to new technology nodes. Foster innovation through collaboration with diverse teams, integrating leading-edge analog circuits into sophisticated SerDes PHY systems. Contribute to the verification and validation of high-speed circuits, ensuring compliance with stringent PCIe standards. Mentor and guide junior engineers, nurturing the next generation of top-tier analog designers. What You’ll Need: PhD with 3+ years, or MTech/MS with 8+ years of experience in analog/mixed-signal circuit design, with experience in high-speed interfaces such as PCIe or SerDes PHY designs. Strong experience in transistor-level design of high-speed analog building blocks, such as LDOs, Bandgap references, ADC/DAC, PLLs, DLLs. Experience in high-speed SerDes AFE (Analog Front-End) development, including CTLE and CDR design. Experience designing high-speed SerDes transmitters, with knowledge of equalization techniques (e.g., DFE, FIR filters, TX pre-emphasis). Understanding of jitter budgeting analysis, including sources of jitter and strategies for minimizing its impact. Strong knowledge of CMOS technologies, including finFET and GAA processes. Good understanding of the PCIe protocol, signal integrity requirements, and high-speed clocking. Ability to provide input on layout design to minimize the effects of parasitics and process variations. Who You Are: Detail-oriented with a passion for innovation and excellence. Proactive and able to work independently with limited supervision. Strong communicator capable of effectively collaborating with cross-functional teams. Mentor and leader, eager to

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9309 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As a Senior Staff AI Engineer focusing on AI Optimization & MLOps, you are a trailblazer in the AI landscape. You possess deep expertise in AI model development and optimization, with a keen interest in reinforcement learning and MLOps. Your ability to design, fine-tune, and deploy scalable, efficient, and continuously improving AI models sets you apart. You thrive in dynamic environments, staying at the forefront of AI technologies and methodologies, ensuring that AI solutions are not only cutting-edge but also production-ready. Your collaborative spirit and excellent communication skills enable you to work seamlessly with cross-functional teams, enhancing AI-powered IT automation solutions. With a strong background in AI frameworks and cloud-based AI services, you are committed to driving innovation and excellence in AI deployments. What You’ll Be Doing: Design, fine-tune, and optimize LLMs, retrieval-augmented generation (RAG), and reinforcement learning models for IT automation. Improve model accuracy, latency, and efficiency, ensuring optimal performance for IT service workflows. Experiment with cutting-edge AI techniques, including multi-agent architectures, prompt tuning, and continual learning. Implement MLOps best practices, ensuring scalable, automated, and reliable model deployment. Develop AI monitoring, logging, and observability pipelines to track model performance in production. Optimize GPU/TPU utilization and cloud-based AI model serving for efficiency and cost-effectiveness. Develop tools to measure model drift, inference latency, and operational efficiency. Implement automated retraining pipelines to ensure AI models remain effective over time. Work closely with cloud teams to optimize AI model execution across hybrid cloud environments. Stay ahead of emerging AI technologies, evaluating new frameworks, techniques, and research for real-world application. Collaborate to refine AI system architectures and capabilities, while also ensuring models are effectively embedded into IT automation workflows The Impact You Will Have: Enhance the efficiency and reliability of AI-powered IT automation solutions. Drive continuous improvement and innovation in AI model development and deployment. Ensure scalable and cost-effective AI model serving in cloud and hybrid environments. Improve real-time AI processing with minimal downtime and high performance. Optimize AI systems for performance, security, and cost in IT automation applications. Contribute to the advancement of Synopsys' AI capabilities and technologies. What You’ll Need: 8+ years of experience in AI/ML engineering, with a focus on model optimization and deployment. Strong expertise in AI frameworks (LangGraph, OpenAI, Hugging Face, TensorFlow/PyTorch). Experience implementing MLOps pipelines, CI/CD for AI models, and cloud-based AI deployment. Deep understanding of AI performance tuning, inference optimization, and cost-efficient deployment. Strong programming skills in Python, AI model APIs, and cloud-based AI services. Familiarity with IT automation and self-healing systems is a plus. Who You Are: Innovative and forward-thinking, constantly seeking to improve and optimize AI models. Collaborative and communicative, working effectively with cross-functional teams. Detail-oriented and meticulous, ensuring high standards in AI model performance and deployment. Adaptable and resilient, thriving in dynamic and fast-paced environments. Passionate about AI and its applications in IT automation and beyond. The Team You’ll Be A Part Of: You will join a dynamic team of AI engineers and IT professionals dedicated to advancing AI-powered IT automation. Our team focuses on optimizing model deployment, scaling AI workloads using Kubernetes, and enhancing AI observability and security. Together, we aim to make IT automation faster, more reliable, and cost-efficient, driving continuous technological innovation and excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 8056 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As a dedicated and experienced Site Reliability Engineer, you thrive in a dynamic and collaborative environment. You possess a deep understanding of IT infrastructure and the intricacies of ensuring its reliability, performance, and scalability. Your extensive experience with a wide range of infrastructure technologies, including Linux, Windows, and cloud computing, sets you apart. You are adept at troubleshooting complex issues, developing automated solutions, and continuously improving processes. Your passion for innovation drives you to challenge the status quo and optimize existing procedures. With excellent problem-solving skills and the ability to work through challenges, you are ready to make a significant impact on our engineering excellence. Your communication skills, both verbal and written, are exceptional, allowing you to collaborate effectively with cross-functional teams. You are proactive, resourceful, and have a strong service availability-oriented mindset. What You’ll Be Doing: Discovering, designing, and implementing changes to existing IT infrastructure to improve reliability, performance, and standardization. Collaborating with engineering and business units to translate customer, business, and technical requirements into SRE practices and enhancements. Ensuring efficient resource utilization and continuously improving processes through automation and internal tools. Troubleshooting production issues, providing root cause analysis, and designing solutions to prevent future occurrences. Monitoring services and creating intelligent alarming for quicker incident detection and resolution. Maintaining vulnerability management processes and policies using a risk-based priority methodology. Collaborating with various teams and platform owners on all vulnerability management and reporting. ing architectural and infrastructure disciplines to solve business problems strategically. Participating in off-hours maintenance activities and being part of the on-call rotation schedule. The Impact You Will Have: Enhancing the reliability and performance of Synopsys' IT infrastructure. Driving significant productivity, robustness, agility, and time-to-market advantages in the creation of Synopsys products and solutions. Leading corporate infrastructure transformation and IT operations leadership. Implementing automation and internal tools to improve service delivery, maturity, and scalability. Reducing production issues through effective troubleshooting and root cause analysis. Ensuring proactive monitoring and quicker incident detection and resolution. What You’ll Need: Extensive experience with infrastructure technologies such as Linux, Windows, cloud computing, virtualization, and containerization. Deep understanding of IT infrastructure services and their dependencies. Experience with administration, security hardening, and performance tuning of Linux and Windows OS. Experience with developing service level indicators and objectives, and building alerts. Proficiency in ITIL processes and frameworks. Hands-on experience with infra-automation tools like GitHub, Jenkins, Terraform, and Ansible. Experience with one or more programming languages such as Java, Python, Go, or NodeJS. Who You Are: Proactive and resourceful with a service availability-oriented mindset. Excellent problem-solving skills and ability to work through challenges. Strong communication skills, both verbal and written. Passionate about innovation and optimizing existing processes. A team player who can collaborate effectively with cross-functional teams. The Team You’ll Be A Part Of: The Engineering Excellence Group drives innovation velocity and enterprise infrastructure automation, which are critical elements of our growth and scaling strategy. This team is chartered to drive significant productivity, robustness, agility, and time-to-market advantage in the creation of Synopsys products and solutions. The group also leads corporate infrastructure transformation as we continue to drive IT operations leadership and invest in the next wave of disruptive technologies. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 4808 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned network engineering professional with a robust background in designing and implementing enterprise network architectures. You thrive in dynamic environments and excel in providing strategic direction and innovative solutions. With your extensive experience in network and security operations, you are adept at collaborating with executive management and cross-functional teams. You possess a proactive approach, identifying opportunities for improvement and automation while maintaining a keen eye on security and performance. Your technical expertise is complemented by your ability to communicate complex concepts clearly and effectively. What You’ll Be Doing: Create architectural approaches for Enterprise Network design and implementation. Provide architectural governance and oversight over MSP supplied solutions. Explore, investigate, recommend, benchmark, and implement technologies for SDN and service orchestration. Offer in-depth Network & Security Operations subject matter expertise and guidance to executive management and other stakeholders. Collaborate with cross-functional teams to resolve complex technical issues, ensuring minimal disruption to business operations. Liaise with various vendors and suppliers to optimize existing Network Services. Provide technological vision and strategy for Network transformation, leading architecture discussions to address risk, security, capacity, and performance concerns. Maintain vulnerability management processes and policies using a risk-based priority methodology. Identify and implement opportunities for process automation and improvement. Aid with change management processes, including impact analysis, risk assessment, change plan, test plan, monitoring, and user communications. The Impact You Will Have: Drive significant productivity, robustness, agility, and time-to-market advantage in the creation of Synopsys products and solutions. Lead corporate infrastructure transformation, enhancing IT operations leadership. Improve and optimize Network Services, contributing to the overall efficiency and performance of the enterprise network. Enhance security measures and risk management, safeguarding the organization’s critical assets. Facilitate seamless collaboration across teams, ensuring timely resolution of technical issues. Contribute to the continuous improvement of network services and user experience. What You’ll Need: Demonstrated experience with risk assessments and vulnerability assessments, using tools like Qualys, Rapid7, Tenable, Wiz, etc. Expertise in Enterprise Network Architecture Designs and Security Implementations. Knowledge of Internet/DMZ/Internal Firewalls, Identity Access Management (IAM), Risk Management, Security Information Event Management (SIEM), and Web Proxy Services. Hands-on experience with network security areas such as NGFWs, IDS/IPS, SSE/SASE, SWG, ZTNA. Management and patching experience with DataCenter network technologies (e.g., Cisco ACI, Whitebox Switching with SONiC OS, BeyondEdge orchestrator, Cisco Nexus Platforms). Administration of campus infrastructure: Cisco Catalyst and Aruba OS Switching, Aruba Wireless Controllers, APs, Versa Networks SD-WAN appliances. Understanding of cloud architectures (AWS, Azure, GCP, IBM Cloud) and cloud connectivity solutions. Strong knowledge of routing protocols and failover scenarios, including BGP and OSPF. Network device configuration and infrastructure automation skills using tools such as Python and Ansible. Who You Are: Proactive and self-motivated, able to drive results with minimal supervision. Excellent communicator, capable of conveying complex technical concepts to diverse audiences. Strategic thinker with a focus on continuous improvement and innovation. Collaborative team player, adept at working with cross-functional teams. Detail-oriented and highly organized, with strong problem-solving skills. The Team You’ll Be A Part Of: The Engineering Excellence Group drives innovation velocity and enterprise infrastructure automation, which are critical elements of our growth and scaling strategy. This team is chartered to drive significant productivity, robustness, agility, and time-to-market advantage in the creation of Synopsys products and solutions. The group also leads corporate infrastructure transformation as we continue to drive IT operations leadership and invest in the next wave of disruptive technologies. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 6831 Date posted 01/31/2025 Senior Software Developer for atomic-scale simulations GUI Synopsys is seeking a software specialist with strong experience in user interface development for the QuantumATK atomic-scale simulation platform. The QuantumATK group is a team of world leading experts in atomic-scale simulations who are developing the QuantumATK software and the Nanolab GUI. Job: Your job will be to develop the QuantumATK platform and the NanoLab GUI. Your role will be to build state-of-the-art user interfaces that makes it straight-forward for engineers to perform atomic-scale simulations, like setting up plane wave calculations, training machine-learned force fields or simulating molecular dynamics. You must have a background in scientific computing and several years’ experience building complex and powerful user interfaces for scientific applications. Ideally this includes experience with full-stack web development, UI frameworks like React or Vue, and web backend development and server-client based applications. The platform team is spread between Hyderabad (India) and Denmark (Europe), and therefore it is very important for you to be a quick learner, self-driven, innovative and easy to work with. We are looking for outstanding individual that: Has at least a master’s in science, computer science or related fields and has proven experience developing user interfaces for scientific software applications. Has a strong scientific background with clear relevance to atomic scale modelling. Proven experience with development of complex and powerful user interfaces for scientific applications. Requirements: Excellent programming skills, and broad programming experience. Primarily Python and C++ but for this role it is an advantage to have experience with web technologies. 10+ years of industry experience in similar domain Great written and oral communication skills in English. The successful applicant Is an outstanding person with exceptional competences in programming Has a broad set of skills and is ready to them to whatever task assigned Is dedicated with focus on getting the job done without sacrificing quality Is a team player Enjoys communicating and helping other people Has a positive mindset and is motivated by challenging projects Is self-motivated and takes responsibility and initiative At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9914 Date posted 03/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for developing and validating Process Design Kits (PDKs) for cutting-edge custom design platforms. With a robust background in CAD engineering and a deep understanding of the design process, you thrive in collaborative environments and excel at problem-solving. Your expertise in scripting languages such as Python, Tcl, and UNIX, coupled with your strong communication skills, makes you an invaluable asset to any team. You are adaptable, capable of handling complex projects, and are always eager to network with senior internal and external personnel. Your ability to coach and mentor junior peers, along with your readiness to tackle demanding situations, sets you apart as a leader in your field. What You’ll Be Doing: Developing and validating Process Design Kits (PDKs) for Synopsys Custom Design platform. Supporting internal and external customers on previously developed PDKs. Interacting with customers to gather data and specifications, and managing project deliverables. Collaborating with cross-functional teams to test and implement custom tool adjacencies such as Physical Verification, Parasitic Extraction, and Design Enablement. Coaching other PDK developers to build quality, design-ready PDKs for Custom Compiler users. Engaging with various stakeholders to enable feature-rich iPDKs. The Impact You Will Have: Enhancing the efficiency and quality of PDKs, ensuring they meet the high standards required for advanced custom design. Contributing to the successful deployment and optimization of Synopsys Custom Design platforms. Supporting the seamless integration of advanced design tools, improving the overall user experience for customers. Driving innovation by ensuring PDKs are equipped with the latest features and technologies. Mentoring and developing the next generation of PDK developers, fostering a culture of excellence and continuous improvement. Strengthening Synopsys' position as a leader in the semiconductor industry through high-quality, reliable PDK solutions. What You’ll Need: BS with 5+ years of relevant experience or MS with 4+ years of experience. Basic overall understanding of the design process. Expert knowledge of scripting languages such as Python, Tcl, and UNIX. Strong problem-solving and debugging skills. Experience in executing projects from start to completion, handling complex projects, and identifying best practices. Who You Are: A collaborative team player with strong communication skills. A proactive and adaptable individual, capable of working under stress and managing demanding situations. A mentor and coach to junior peers, guiding them to achieve their best. An innovative thinker with a passion for continuous improvement and excellence. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on the development of Process Design Kits for Synopsys Custom Design platform. This team collaborates with cross-functional teams to ensure the seamless integration and optimization of custom design tools, driving innovation and excellence in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10453 Remote Eligible No Date Posted 06/04/2025 Alternate Job Titles: SPICE/FastSPICE Simulation Engineer Custom Compiler Frontend Engineer Senior Application Engineer - SPICE Simulation We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced engineer with a deep understanding of SPICE/FastSPICE simulation and custom compiler frontend applications. You excel at problem-solving and have a strong background in designing and verifying analog circuits, including clocking circuits and data converters. You are proficient in memory design and have a solid grasp of competitive EDA tools in digital, analog, and mixed-signal design and verification. Your exceptional communication and presentation skills enable you to interface effectively with customers and R&D teams. Your proactive approach and project management expertise make you a valuable asset in driving business growth and technical innovation. With your advanced degree and extensive experience, you are ready to tackle complex technical challenges and contribute to the success of Synopsys. What You’ll Be Doing: Providing technical support to customers for SPICE/FastSPICE simulation and custom compiler frontend applications. Collaborating with Sales, R&D, Product Application Engineers, and Marketing to drive business growth. Understanding customer requirements and exploring business opportunities. Creating simulation flows and debugging technical issues. Leading technical benchmarks and customer engagements. Writing customer requirement specifications and conducting product training sessions. The Impact You Will Have: Enhancing customer satisfaction and loyalty through exceptional technical support. Driving the adoption and successful implementation of SPICE/FastSPICE simulation and custom compiler solutions. Improving product usability and performance based on customer feedback and insights. Fostering strong relationships with customers and understanding their needs and challenges. Collaborating with R&D teams to influence product development and innovation. Contributing to Synopsys' reputation as a leader in technology and innovation. What You’ll Need: Design and verification experience in clocking circuits (PLLs), data converters (ADCs, DACs), and other analog circuits. Experience in memory design and verification of SRAM, SRAM compilers, DRAM, Flash, or other non-volatile memories. Knowledge of competitive EDA tool products in digital, analog, and mixed-signal design and verification. Proficiency in English for written and verbal communication. Excellent communication, presentation, problem-solving, and project management skills. BSEE or equivalent with 2-5 years of relevant experience, or MS/Ph.D. with 2 years of relevant experience. Layout knowledge is advantage Who You Are: Collaborative and team-oriented, with strong interpersonal skills. Proactive and self-motivated, with a strong sense of ownership and responsibility. Detail-oriented and meticulous, with a focus on delivering high-quality solutions. Adaptable and flexible, with the ability to thrive in a fast-paced and changing environment. Passionate about technology and innovation, with a continuous learning mindset. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on providing exceptional technical support and solutions to our customers. Our team collaborates closely with Sales, R&D, Product Application Engineers, and Marketing to ensure the successful adoption and implementation of SPICE/FastSPICE simulation and custom compiler solutions. We are dedicated to continuous improvement and innovation, always striving to enhance the customer experience and contribute to the success of Synopsys. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 7644 Remote Eligible No Date Posted 02/03/2025 Job Title: Analog/Mixed-Signal Layout Methodology Engineer Company: Synopsys Role Description: Synopsys, at the forefront of technological innovation, is seeking an Analog/Mixed-Signal Layout Methodology Engineer. As a member of our Mixed Signal IP Methodology Team, you will work with the most advanced chip design technologies and tools. You will collaborate with local and global teams to develop capabilities that improve the time-to-market of complex mixed-signal designs in the latest technology nodes. This role offers the opportunity to lead technical projects, coordinate with other team members, and develop our best-in-class utilities. Key Responsibilities: Propose and develop innovative methodologies to accelerate layout development without compromising quality. Collaborate with cross-teams in the enablement of advanced technology nodes. Measure project performance using appropriate systems, tools, and techniques. Establish and maintain relationships with cross-functional teams, internal and external customers. Create and maintain comprehensive methodology and workflow documentation. Key Qualifications: Familiarity with the physical design of analog and mixed-signal CMOS circuits. Proficiency in TCL and/or Python. Understanding of the full design cycle from RTL to GDSII, including chip level. Excellent communication skills. Strong organizational skills, attention to detail, and multi-tasking abilities. Experience with advanced FinFET nodes, TSMC 16 nanometer and below. Familiarity with Design tools such as Custom Compiler, Cadence Virtuoso, or equivalent. Knowledge of Verification tools like ICV, Calibre. Experience working with Jira/Atlassian or similar tools. Strong working knowledge of MS Office Suite of applications. Preferred Experience and Requirements: MSEE or BSEE with a minimum of 3 years of related experience. Previous analog layout physical design experience. Join us to contribute to the evolution of technology and leave your mark on the semiconductor industry. Contact us today to learn more about this exciting opportunity! At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 8804 Date posted 02/24/2025 Alternate Job Titles: Senior Cell Library Design Engineer Senior Logic Library Design Engineer Senior Standard Cell Designer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced Standard Cell Library Design Engineer with a passion for innovation and technology. You hold a Bachelor's or Master's degree from a reputable university and have over three years of experience in designing standard cell libraries. Your expertise extends to optimizing standard cell circuits to achieve superior performance, power, and area (PPA). You have designed complex circuits such as flip-flops, clock gating cells, level shifters, and power gating cells. Your deep understanding of CMOS device characteristics and design rules in submicron process nodes, especially in FINFET/GAA technologies, sets you apart. You are proficient in running high sigma variation analysis and have a knack for layout design and optimization. Your analytical and logical skills are exemplary, and you thrive in a collaborative environment, working effectively with geographically distributed R&D teams. If you are driven by innovation and eager to contribute to groundbreaking technology, we want to meet you. What You’ll Be Doing: Designing and optimizing standard cell libraries to achieve targeted PPA. Developing complex circuits including flip-flops, clock gating cells, level shifters, and power gating cells. Collaborating with layout designers to optimize layout parasitics. Engaging in layout extraction and understanding layout-dependent parameters. Conducting timing and power characterization of standard cells. Working closely with cross-functional teams for optimization across the design chain. The Impact You Will Have: Enhancing the performance, power, and area of standard cell libraries. Contributing to the development of high-impact, cutting-edge technology. Driving innovation in complex circuit design and optimization. Ensuring the successful integration of IP blocks into SoCs. Influencing the design and development of self-driving cars, AI, and IoT devices. Supporting Synopsys’ leadership in the silicon IP market. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or related field. 3+ years of experience in standard cell library design. Expertise in CMOS device characteristics and submicron process nodes. Proficiency in designing complex circuits and running high sigma variation analysis. Experience in layout design and optimization. Who You Are: Strong analytical and logical thinker. Detail-oriented with excellent problem-solving skills. Effective communicator and collaborator. Innovative and passionate about technology. Adaptable and able to work in a dynamic, fast-paced environment. The Team You’ll Be A Part Of: You will join the Logic Library Group, a dynamic team focused on developing high-performance standard cell libraries. The team collaborates closely with other R&D groups to optimize the entire design chain and deliver cutting-edge technology solutions. Together, you will work on innovative projects that drive the future of chip design and integration. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 6998 Remote Eligible No Date Posted 22/10/2024 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled ASIC Digital Design Engineer with a strong foundation in both analog and digital CMOS circuit designs. You thrive in dynamic environments and are adept at working with Verilog/System Verilog languages and methodologies such as VMM and UVM. You have a knack for writing and modifying test cases, checkers, and scoreboards within a system Verilog-based test environment. Your expertise extends to AMS verification, particularly in high-speed SerDes designs supporting multi-protocols. Familiarity with Synopsys analog mixed-signal design tools and modeling languages like Verilog-A/AMS is a plus. You are proficient in programming/scripting languages like TCL, Perl, and Python, and have experience working with Linux. Your excellent communication skills and ability to take ownership of projects ensure that you meet deadlines and exceed expectations. Self-organization is second nature to you, allowing you to manage time effectively and contribute meaningfully to your team's success. What You’ll Be Doing: Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-functional teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocols. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performance silicon chips. Contributing to the development of innovative technologies that drive the Era of Pervasive Intelligence. Improving the efficiency and effectiveness of our design and verification processes. Ensuring the seamless integration of analog and digital components in our products. Supporting the creation of cutting-edge solutions for self-driving cars, learning machines, and more. Driving continuous technological innovation within Synopsys and the broader industry. What You’ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectronics Knowledge or hands-on expertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supporting multi-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met Who You Are: Excellent communicator with strong interpersonal skills. Proactive and able to take ownership of projects. Self-organized and capable of managing time effectively. Collaborative team player who thrives in a dynamic environment. Detail-oriented and committed to delivering high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team of engineers focused on pushing the boundaries of ASIC digital design and verification. Our team values collaboration, innovation, and continuous improvement, working together to create cutting-edge solutions that drive the future of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 5823 Remote Eligible No Date Posted 24/02/2025 In this role, you will work on the design, development, and refinement of Multi-Gbps NRZ & PAM4 SERDES IP. You will be part of a fast-growing analog and mixed signal R&D team developing high speed analog integrated circuits in the latest FinFET process nodes. Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies. You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team Experience in design of Charge-pump PLLs, Fractional-N PLLs, DLL design techniques, LDO design techniques Hands-on experience on designing charge pumps, LC VCOs, Ring oscillators, phase interpolator, bandgap reference, etc. In depth familiarity with transistor level circuit design at SPICE netlist level and should be capable to develop SPICE verification testbench Design exposure in advanced process nodes (FinFETs) Hands on experience with industry standard tools (Cadence, Synopsys, Mentor) for schematic capture spice simulations. Familiarity with automation / Scripting language (TCL, Python, PERL). Experience optimizing CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of device mismatch and proximity effects. understanding of ESD issues and reliability issues Looking for 1-2 years of experience in Analog design with master's degree or 2-4 years of experience in in Analog design with bachelor's degree In depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits for the PLL within Highspeed SerDes At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 8545 Remote Eligible No Date Posted 02/02/2025 Senior Analog Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and passionate Senior Layout Design Engineer with a strong background in analog and mixed-signal (A&MS) integrated circuits. You thrive in a collaborative environment, working closely with cross-functional teams to bring cutting-edge technology to life. Your attention to detail and dedication to quality are evident in your work, and you are constantly seeking ways to improve layout design methodologies and best practices. With a keen understanding of semiconductor process technologies and their impact on layout design, you are adept at using industry-standard EDA tools to create and optimize layout designs. You have excellent problem-solving skills, and your ability to communicate effectively and work well within a team makes you an invaluable asset. What You’ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Ensure the highest quality and performance of our analog and mixed-signal integrated circuits. Drive innovation by developing cutting-edge layout designs that push the boundaries of technology. Enhance the manufacturability and reliability of our products through meticulous design and verification processes. Contribute to the overall success of our projects by providing valuable feedback during design reviews. Improve design methodologies and best practices, fostering a culture of continuous improvement. Support the growth and development of junior engineers by sharing your expertise and knowledge. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. 2+ years of experience in A&MS layout design for integrated circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Good communication and interpersonal skills. Who You Are: You are an analytical thinker with a strong attention to detail. You have a passion for technology and a drive to stay current with the latest industry trends. Your problem-solving skills are top-notch, and you approach challenges with a methodical and systematic mindset. You work well in a team environment, communicating effectively and collaborating with others to achieve common goals. Your dedication to quality and continuous improvement is evident in your work, and you are always looking for ways to enhance design methodologies and best practices. The Team You’ll Be A Part Of: You will be joining a dynamic and innovative team focused on developing and implementing layout designs for analog and mixed-signal integrated circuits. Our team values collaboration, creativity, and continuous improvement. We work closely with circuit designers, verification engineers, and other cross-functional teams to ensure the highest quality and performance of our products. Together, we are committed to pushing the boundaries of technology and driving the future of chip design. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.