1759 Synopsys Jobs - Page 5

Expertise in one or more of the following domains: Power Optimization: Experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). Timing Optimization: Proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. Functional Safety Analysis: Deep understanding of functional safety concepts and standards (e.g., ISO 26262), and experience with related analysis techniques like FMEDA and FTA. Experience with industry-standard Electronic Design Automation (EDA) tools from vendors such as Synopsys, Cadence, or Siemens EDA. Proficiency in hardware description languages (H...

Roles & Responsibilities: Design, develop, and maintain scalable data pipelines and ETL processes using Azure Data Factory and related services. Work with large, complex datasets and ensure data integrity, quality, and security. Implement and optimize data storage solutions (Azure SQL Database, Azure Data Lake, Synapse, etc.). Collaborate with business and technical teams to gather requirements and deliver efficient data solutions. Monitor and improve performance, reliability, and cost-efficiency of data workflows. Ensure adherence to best practices in data engineering, security, and compliance. Support data scientists and analysts by providing clean, reliable, and well-structured data. Requ...

Job Summary: We are seeking a Skill Development Mentor to guide and support individuals in acquiring new skills and enhancing existing ones. The ideal candidate will possess strong communication and mentoring abilities, with a passion for fostering learning and development within the education sector. This role is crucial for empowering individuals to achieve their professional goals. Key Responsibilities: Conduct skill assessments to identify individual learning needs and goals. Develop and deliver training programs and workshops on various skill development topics. Provide one-on-one mentoring and coaching to support skill acquisition and career advancement. Create and maintain training ma...

Job Summary: The Subject Matter Expert (SME) Mentor plays a critical role in guiding and supporting individuals or teams by providing deep expertise in a specific domain or field. The SME Mentor serves as a trusted advisor, helping mentees develop skills, solve complex problems, and achieve performance goals. Key Responsibilities: Provide expert mentorship and guidance in specified IT skills. Share industry best practices and insights. Offer support and advice to mentees. Stay updated on the latest IT trends and technologies. Facilitate knowledge transfer and skill development. Qualifications / Requirements: Proven experience in one or more IT skills. Strong communication and mentoring skill...

Perks & Benefits Salary Rs 2.5 Lacs - 3.5 Lacs p.a Key Skills Category Industry Education / Training Number of Positions 2 Other Benefits NA Qualifications Graduation BE,B TECH Post Graduation ME, MTech Doctorate NA Job Description VLSI / Antenna Simulation Developer: Job Description: Should be having hing level understanding for Design, develop and test various types of antennas for various applications. Conduct research and evaluate the performance of novel antenna design CST/ HFSS/ MATLAB software skills are preferred Develop and maintain technical documentation, including test plans and reports Should have knowledge related to fabrication and testing of the designed antenna. Good communi...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups, exceptions, and clock exclusivity. Proficient in industry-standard SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and Back-end teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure. As part of this team, youll contribute to developing next-generation networking chips. Responsibilities include: Being a member of design team who oversees fullchip SDCs and w...

Job Requirements Design Verification professional with a proven track record in leading DV projects for complex SoC/ASIC/FPGA designs. This role will be working closely with world class engineering teams to ensure design quality, performance, and verification closure on cutting-edge hardware products. Lead the DV team in planning, developing, and executing verification strategies for SoC/ASIC designs. Collaborate with architects, RTL designers, and validation engineers to define verification requirements and methodologies. Develop and maintain verification environments using UVM/SystemVerilog. Drive code reviews, functional coverage analysis, and regression tracking to achieve verification s...

Should have indepth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on latest technology nodes (14nm or lesser) Should have worked on block level and top-level designs Good to have worked on designs without a customer flow. Strong problem-solving skills and communication skills. Ability to mentor and work closely with junior engineers Will be responsible for building a highly capable team of PD engineers at Ignitarium.

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globa...

Title: Electronic Design Automation Engineer Location: Hyderabad (Hybrid) Employment Type: Full time Work Experience: 5-8 years (Senior Engineer) Job Description: Expertise in one or more of the following domains: Power Optimization: Experience with low-power design techniques and methodologies, including the use of the Unified Power Format (UPF). Timing Optimization: Proficiency in static timing analysis (STA) and experience with design constraints using the Synopsys Design Constraints (SDC) format. Functional Safety Analysis: Deep understanding of functional safety concepts and standards (e.g., ISO 26262), and experience with related analysis techniques like FMEDA and FTA. Experience with ...

Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets cutting-edge technology! As part of the heart of silicon development at Cisco, you'll engage in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices. Cisco Silicon One is the only unified silicon architecture that empowers customers to deploy top-tier silicon across diverse applications, from top-of-rack switches to expansive data centers. Be a part of shaping Cisco's revolutionary solutions by designing and testing advanced ASICs that integrate networking, compute, and storage into a single system. With tightly integ...

Job Requirements ob Title Design Verification Engineer Job Description Job Summary We are seeking a talented and detail-oriented Design Verification Engineer to join our core team. As a DV Engineer, you will play a crucial role in ensuring the functional correctness and quality of complex IP blocks and subsystems. This role requires a deep understanding of modern verification methodologies. You will be responsible for developing sophisticated, reusable verification environments from scratch using SystemVerilog and the Universal Verification Methodology (UVM). Key Responsibilities Analyze design specifications and collaborate with architects and RTL designers to develop comprehensive, coverag...

Job Description: Integrate and support EDA tools across design environments. Automate tool management using scripting (Python, Shell, Perl, Tcl). Troubleshoot EDA tool issues and provide technical guidance to engineering teams. Evaluate new tools and drive improvements in productivity. Qualification: Bachelors/Master’s in Electrical/Computer Engineering Strong EDA tools experience (Cadence, Synopsys, Mentor)

We are looking for an Analog Mixed Signal (AMS) Verification Engineer to join our growing semiconductor design team. The ideal candidate will have strong experience in verifying complex analog and mixed-signal IPs and SoCs using modern verification methodologies and tools. You will work closely with design, modeling, and digital verification teams to ensure high-quality and functionally correct designs. Key Responsibilities: Develop and execute AMS verification plans , strategies, and testbenches. Verify analog and mixed-signal IPs such as ADCs, DACs, PLLs, SerDes, and power management blocks. Collaborate with design and modeling teams to ensure behavioral models align with circuit-level des...

As a VLSI Engineer with 5-6 years of experience in the semiconductor industry, your role will involve working on complex SoC designs, collaborating with cross-functional teams, and delivering high-quality silicon solutions. Your key responsibilities will include: - Designing and developing RTL using Verilog / SystemVerilog for ASIC/FPGA. - Performing functional verification using UVM / SystemVerilog based testbench. - Working on synthesis, timing analysis, power analysis, and design for testability (DFT). - Collaborating with physical design, firmware, and validation teams to ensure design quality. - Understanding semiconductor process technologies and device physics. - Participating in desi...

Job Requirements Job Description Job Title: Senior Gate-Level Simulation (GLS) Verification Engineer Location: Bangalore, Karnataka, India Team: SoC Design Verification / Silicon Sign-off Position Summary We are seeking a highly skilled and meticulous Gate-Level Simulation (GLS) Verification Engineer to serve as the last line of defense before silicon tape-out . In this critical role, you will be responsible for verifying the post-synthesis, final netlist of our complex SoCs, ensuring that the design's functionality remains correct after synthesis, placement, and routing. You will hunt down the most subtle and challenging bugs related to timing, power, and reset that are invisible at the RTL...

As a member of the team at Google, you will play a crucial role in developing custom silicon solutions for Google's direct-to-consumer products, contributing to the innovation that impacts millions globally. Your expertise in electrical engineering or computer science will be instrumental in shaping the future of hardware experiences, focusing on performance, efficiency, and integration. **Key Responsibilities:** - Create design constraints based on architecture/microarchitecture documents, understanding various external IO protocols. - Validate design constraints across multiple corners/modes using Fishtail/Timevision. - Utilize Primetime for running and validating constraints post synthesi...

As an experienced physical design engineer with a B. Tech / M. Tech (ECE) background and 3 to 13 years of experience, you will be responsible for a variety of tasks including top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs). Your expertise in SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, as well as experience in working on 65nm or lower node designs with advanced low power techniques, will be crucial for success in this role. Key Responsibilities: - Provide technical guidance and mentoring to phy...

Principal IP/RTL Design Engineer for TPU / GPU Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Position Overview Seeking an IP/RTL Design Engineer with 5+ years of experience to design IP/RTL for TPUs, focusing on high-performance matrix multiplication, low-latency interconnects, and power-efficient AI acceleration. Key Responsibilities Design IP blocks for TPU cores, including systolic arrays, vector units, and memory subsystems. Develop Verilog/SystemVerilog RTL for performance, timing, and...

Principal / Staff IP/RTL Design Engineer (AI Accelerator) – Multiple positions - Hyderabad Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Well-funded product startup is looking for RTL Design Engineers to contribute to the development of novel high performance AI accelerators from scratch. In this role you will collaborate with cross-functional teams, including architect, software, verification, physical design, systems engineers, to define and implement next generation AI architectures. We ...

IP/RTL Design Architect for GPU Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. Position Overview Seeking an IP/RTL Design Engineer with 8+ years of experience to design IP/RTL for GPUs/TPUs, focusing on high-performance matrix multiplication, low-latency interconnects, and power-efficient AI acceleration. Key Responsibilities Design IP blocks for TPU cores, including systolic arrays, vector units, and memory subsystems. Develop Verilog/SystemVerilog RTL for performance, timing, and area optimization. Im...

Principal IP/RTL Design Engineer for Ethernet Switch Hyderabad / Bangalore Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/ Bangalore Our pay comprehensively beats "ALL" Semiconductor product players in the Indian market. IP/RTL Design Engineer for Ethernet Switch Position Overview We are seeking an experienced IP/RTL Design Engineer with over 10 years of experience to join our team in designing and developing intellectual property (IP) and RTL for Ethernet switches tailored for AI datacenter backend networks. The ideal candidate will have a strong background in digital design, ASIC/FPGA development, Ethernet p...