876 Synopsys Jobs - Page 5

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Category Engineering Hire Type Employee Job ID 12346 Remote Eligible No Date Posted 22/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Our Silicon Design & Verification business leads the industry in enabling customers to design and verify advanced silicon chips—faster and with more reliability. We develop the next-generation processes and models that optimize chips for power, cost, and performance, shaving months off project schedules for our global clientele. We believe in fostering an inclusive and diverse environment where every voice is valued and innovation thrives. You Are: You are a passionate and experienced Analog/Mixed-Signal (A&MS) Circuit Design Engineer with a track record of excellence in high-speed physical interface development. With a deep foundation in CMOS circuit design, device physics, and nanometer technologies, you thrive on solving complex challenges at the intersection of analog and digital domains. You are energized by working on industry-leading projects and are adept at architecting, designing, and validating advanced circuits such as transmitters, receivers, clocking circuits, equalizers, serializers, de-serializers, and analog front ends. Your expertise allows you to optimize for performance, area, and power, and you are comfortable with layout considerations and parasitic optimizations. You value diversity and inclusion, recognizing the strength that comes from varied perspectives and backgrounds. You are ready to contribute to a culture of innovation, respect, and excellence—helping Synopsys remain at the forefront of the smart everything revolution. What You’ll Be Doing: Designing and developing high-speed analog and mixed-signal full-custom circuit macros, including transmitters, receivers, clocking circuits, equalizers, serializers, de-serializers, and analog front ends for PHY IPs in advanced CMOS technologies (planar and finFET). Analyzing and implementing various analog circuit techniques to optimize dynamic/static power, enhance performance, and reduce silicon area. Collaborating with global teams to define micro-architectures from specifications and create robust simulation environments for design verification. Performing transistor-level circuit design, simulation, and troubleshooting in nanometer processes, with a focus on reliability and manufacturability. Working closely with layout engineers to optimize parasitics, ensure design closure, and address layout-dependent effects. Participating in design reviews, providing technical guidance, and mentoring junior engineers within a high-performing, diverse team. Adopting and developing automation and scripting to streamline design and verification flows, leveraging languages such as Verilog-A and others as needed. The Impact You Will Have: Advance the state-of-the-art in high-speed PHY IP development, contributing directly to next-generation technology in AI, IoT, 5G, and automotive industries. Enable Synopsys customers to achieve faster time-to-market with optimized, reliable, and high-performance silicon solutions. Drive innovation in low-power and high-speed circuit design, helping customers meet stringent power and area targets. Enhance Synopsys’ reputation as a global leader in silicon design and verification through technical excellence and customer success. Mentor and elevate the skills of team members, fostering a collaborative and growth-oriented culture. Contribute to a diverse and inclusive workplace, ensuring a wide range of perspectives and ideas inform our solutions. What You’ll Need: BE + 5 years or MTech + 4 years of relevant experience in Electrical/Electronics/VLSI Engineering or closely related field. Strong fundamentals in CMOS circuit design, device physics, and sub-micron/nanometer methodologies. Hands-on experience in analog transistor-level circuit design for high-speed applications (Multi-Gbps, PAM4 SERDES architectures). Proficiency in SPICE simulations, reliability analysis, and optimizing for layout parasitics. Ability to micro-architect circuits from specifications, set up verification environments, and debug complex analog/mixed-signal circuits. Basic proficiency with automation/scripting languages and familiarity with Verilog-A is a plus. Experience collaborating with cross-site, multicultural teams and strong documentation skills. Who You Are: Innovative thinker with a problem-solving mindset and a passion for continuous learning. Collaborative team player who values diversity, inclusion, and open communication. Detail-oriented, quality-focused, and committed to delivering results on time. Strong interpersonal and mentoring skills, able to guide and support less experienced team members. Adaptable and resilient, comfortable working in a fast-paced, dynamic environment. The Team You’ll Be A Part Of: You will join a dynamic, high-performing team dedicated to the design and development of high-speed physical interfaces for advanced semiconductor products. Our team is composed of talented engineers with deep expertise in analog and mixed-signal design, working collaboratively across multiple sites worldwide. We value innovation, knowledge-sharing, and a culture of mutual respect, enabling every team member to grow and contribute to industry-leading solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Minimum qualifications: Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or related field, or equivalent practical experience. 5 years of experience with ML/AI frameworks and libraries (e.g., TensorFlow, PyTorch, scikit-learn). Experience with hardware description languages (e.g., Verilog, SystemVerilog, VHDL). Experience with applying ML/AI techniques. Preferred qualifications: Experience with ML/AI applications in hardware design, verification and Low Power (e.g., formal verification with ML, coverage closure with ML). Experience with verification methodologies (UVM, OVM). Experience in data preprocessing and feature engineering, hardware architecture and microarchitecture. Experience with simulation tools (e.g., Synopsys VCS, Cadence Xcelium, Mentor Questa). Excellent programming skills in Python or C++. About The Job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Research, design, and implement ML/AI algorithms techniques for various verification tasks, including test case generation, coverage analysis, bug prediction, and performance optimization. Develop and maintain tools and scripts for data collection, pre-processing, model training, and evaluation. Analyze large datasets of simulation results, logs, and other verification data to identify patterns and trends. Build and train ML models for various verification applications, such as anomaly detection, pattern recognition, and prediction. Evaluate model performance and iterate to improve accuracy and efficiency. Participate in verification planning and develop test plans that incorporate ML/AI-driven techniques. Execute verification tests and analyze results to identify bugs and coverage gaps. Develop and maintain verification tools and scripts to automate verification tasks. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with 7–15 years of experience to join our growing team. 📍 Locations: Bangalore, Hyderabad & Visakhapatnam. 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement layouts that meet tight design constraints and deliver high quality. Hands-on experience with CADENCE/SYNOPSYS layout tools and flows. Familiarity with scripting languages (PERL/SKILL) is a plus. Strong communication skills and experience working with cross-functional teams. If this opportunity interests you—or if you know someone suitable—please send your updated resume to: 📧 maruthiprasad.e@eximietas.design. Referrals are highly appreciated. We look forward to connecting with talented engineers passionate about pushing the boundaries of analog layout design! Maruthhi Naidu Talent Associate - VLSI Manager Eximietas Design - Visakhapatnam maruthiprasad.e@eximietas.design +91 8088969910.

Eximietas Design Hiring Senior Design Verification (PCIE) Engineers / Leads / Managers. Experience: 5+ to 15 Years. Location: Visakhapatnam. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for both high-speed and low- speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high- speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM). # Conduct Gate-level simulations and power-aware verification using tools like Xprop and UPF. # Collaborate closely with cross-functional teams, including architects, designers, and pre/post-silicon verification teams, to ensure alignment and seamless integration of verification efforts. # Analyze and implement System Verilog assertions and functional coverage (code, toggle, functional) to ensure thorough verification of design functionality. # Provide mentorship and technical guidance to junior verification engineers, helping to elevate team performance. # Lead and manage a dynamic team of verification engineers, fostering a collaborative and innovative work environment. # Ensure that all verification signoff criteria are met, with clear and comprehensive documentation. # Demonstrate strong dedication, work ethic, and commitment to meeting project goals and deadlines. # Uphold quality standards and implement best test practices, contributing to continuous improvements in verification methodologies. # Work with verification tools from Synopsys and Cadence, including VCS and Xsim. # I ntegrate third-party VIPs (Verification IP) from Synopsys and Cadence to enhance verification coverage. Qualifications: Minimum 5+ years of hands-on experience in SoC Design Verification. # Expertise in verification of high-speed SoCs and various protocols, including I2C/I3C, SPI, UART, GPIO, QSPI, PCIe, Ethernet, CXL, MIPI, DDR, and HBM. # Proficiency in System Verilog for verification, including assertions and coverage. # Experience with gate-level simulations and power-aware verification using Xprop and UPF. # Strong hands-on experience with VCS and Xsim from Synopsys and Cadence. # Mentorship experience, providing guidance to junior engineers and managing verification teams. # Demonstrated ability to work with cross-functional teams, ensuring effective collaboration and verification signoff. # Strong understanding of verification methodologies and ability to contribute to their continuous improvement. Preferred Qualifications: # Experience in third-party VIP integration (Synopsys/Cadence). # Prior experience in leading large verification teams and projects. # Familiarity with pre/post-silicon verification processes. Interested Engineers, please share your updated resume: maruthiprasad.e@eximietas.design

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with 7–15 years of experience to join our growing team. 📍 Locations: Bangalore, Hyderabad & Visakhapatnam. 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/TSMC 7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement layouts that meet tight design constraints and deliver high quality. Hands-on experience with CADENCE/SYNOPSYS layout tools and flows. Familiarity with scripting languages (PERL/SKILL) is a plus. Strong communication skills and experience working with cross-functional teams. If this opportunity interests you—or if you know someone suitable—please send your updated resume to: 📧 maruthiprasad.e@eximietas.design. Referrals are highly appreciated. We look forward to connecting with talented engineers passionate about pushing the boundaries of analog layout design! Maruthhi Naidu Talent Associate - VLSI Manager Eximietas Design - Visakhapatnam maruthiprasad.e@eximietas.design +91 8088969910.

Hi All, We are seeking a talented and experienced Micro-architect RTL Engineer to join our dynamic team. The ideal candidate will have a strong background in multiple technologies, along with exposure to ARM or microprocessor design and networking. Experience: 10+ Years. Key Responsibilities : Design and implement RTL (Register Transfer Level) microarchitecture for high-performance processors. Develop and optimize microarchitectural components, ensuring efficient execution and low-power consumption. Collaborate with cross-functional teams including hardware designers, verification engineers, and software developers to achieve project goals. Conduct performance analysis and optimization of microarchitectural designs. Participate in the development of verification plans and methodologies to ensure design quality. Stay updated with the latest industry trends and advancements in microarchitecture and RTL design. Key Skills and Qualifications : Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Extensive experience in RTL design using VHDL, Verilog, or System Verilog. Proven track record in microarchitecture design and development. Familiarity with ARM or microprocessor design, including architecture, instruction sets, and pipelines. Strong understanding of networking concepts and protocols. Proficiency in design and simulation tools such as Cadence, Synopsys, or Mentor Graphics. Experience with performance analysis and optimization techniques. Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills. Preferred Qualifications : Experience with low-power design techniques and methodologies. Familiarity with formal verification and validation methodologies. Knowledge of scripting languages such as Python or Perl for automation purposes. What We Offer : A collaborative and innovative work environment. Opportunities for professional growth and development. Competitive salary and benefits package. Work on cutting-edge technology projects that make a real impact. Location: Bangalore & Visakhapatnam Interested Engineers please share your updated resume : maruthiprasad.e@eximietas.design

Bengaluru, Karnataka, India Category: Engineering Hire Type: Employee Job ID 12356 Date posted 07/24/2025 Who we are: Synopsys (NASDAQ: SNPS) is the biggest ASIC EDA software company and the 2nd largest semiconductor IP provider in the world. Founded in 1986, $5B+ Synopsys employs 20,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India. We enable companies to create the leading-edge micro-chips found in the latest smartphones, data center servers; and automobile smart systems. Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We only want the best of the best to join our team. Be ready to produce results; bring innovation, creativity, and passion to work every day. What you will do: As a tech savvy and passionate Technical Writer in the Solutions Group at Synopsys, you will be part of a group responsible for developing and writing user documentation for various Digital and Mixed Signal IPs. You will have an opportunity to work across the various IP product lines of USB, PCIe, Ethernet, DDR, HDMI, MIPI etc., You will be responsible for planning, organizing, writing, and editing the technical specifications, engineering schematics, application notes, and user guides. You will be interfacing with our Design Engineering team to collect the raw content of technical specification and to effectively transform this into user consumable collateral by following the doc-processes. You will work independently, interacting, and collaborating with multi-site teams and you will deliver high quality documentation by demonstrating strict adherence to the style guide and other doc-processes followed by the group. As a writer, you will collaborate with other teams and have a significant and immediate impact on all customer documentation produced and the documentation roadmap. Hard skills we are looking for: Degree or masters in any electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-7 years technical writing experience in software or hardware industry Excellent problem-solving skills; strong logical reasoning and solution-oriented Experience with authoring tools such as FrameMaker Excellent English writing and speaking skills Soft skills we are looking for: Has excellent communication and interpersonal skills Energetic and capable of learning new technologies as necessary Team player and able to work independently with minimal supervision You care (about others, about doing a good job, about details) You take ownership of projects and tasks assigned to you with little to no supervision and have pride in quality work done correctly the first time Advantageous skill areas that will give you the edge: Familiarity with Verilog and ASIC digital design flows TCL Structured FrameMaker. XSLT and XPATH Structured FrameMaker EDD and DTD DITA, DocBook, or IP-XACT XML schemas FrameScript, ExtendScript, or FDK DITA Open Toolkit At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Bengaluru, Karnataka, India Category: Engineering Hire Type: Employee Job ID 12355 Date posted 07/24/2025 Who we are: Synopsys (NASDAQ: SNPS) is the biggest ASIC EDA software company and the 2nd largest semiconductor IP provider in the world. Founded in 1986, $5B+ Synopsys employs 20,000+ headquartered in Mountain View, California, located globally in over 25 countries with 113+ offices throughout North America, Europe, Japan, Asia, and India. We enable companies to create the leading-edge micro-chips found in the latest smartphones, data center servers; and automobile smart systems. Synopsys is committed to fostering an environment that treats people with respect, honesty, and professionalism. We only want the best of the best to join our team. Be ready to produce results; bring innovation, creativity, and passion to work every day. What you will do: As a tech savvy and passionate Technical Writer in the Solutions Group at Synopsys, you will be part of a group responsible for developing and writing user documentation for various Digital and Mixed Signal IPs. You will have an opportunity to work across the various IP product lines of USB, PCIe, Ethernet, DDR, HDMI, MIPI etc., You will be responsible for planning, organizing, writing, and editing the technical specifications, engineering schematics, application notes, and user guides. You will be interfacing with our Design Engineering team to collect the raw content of technical specification and to effectively transform this into user consumable collateral by following the doc-processes. You will work independently, interacting, and collaborating with multi-site teams and you will deliver high quality documentation by demonstrating strict adherence to the style guide and other doc-processes followed by the group. As a writer, you will collaborate with other teams and have a significant and immediate impact on all customer documentation produced and the documentation roadmap. Hard skills we are looking for: Degree or masters in any electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-7 years technical writing experience in software or hardware industry Excellent problem-solving skills; strong logical reasoning and solution-oriented Experience with authoring tools such as FrameMaker Excellent English writing and speaking skills Soft skills we are looking for: Has excellent communication and interpersonal skills Energetic and capable of learning new technologies as necessary Team player and able to work independently with minimal supervision You care (about others, about doing a good job, about details) You take ownership of projects and tasks assigned to you with little to no supervision and have pride in quality work done correctly the first time Advantageous skill areas that will give you the edge: Familiarity with Verilog and ASIC digital design flows TCL Structured FrameMaker. XSLT and XPATH Structured FrameMaker EDD and DTD DITA, DocBook, or IP-XACT XML schemas FrameScript, ExtendScript, or FDK DITA Open Toolkit At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

📍 Location : Pune / Hyderabad 🧠 Experience : 5–7 Years 💼 Type : Permanent 📄 Job Description We are seeking a skilled CyberSecurity Business Analyst – IAM & Secrets Management to join our dynamic cybersecurity team. This role is responsible for managing and enhancing the Identity & Access Management (IAM) controls with a focus on Secrets Management , access governance, and compliance reporting in a highly regulated environment. 🔐 Key Responsibilities 🔑 IAM & Secrets Management Define and enhance secrets management controls across machine-to-machine authentication systems. Support IAM operations by maintaining access governance for credentials, keys, and tokens. Provide subject matter expertise (SME) on secrets and credential management tools and best practices. 📊 Control Monitoring & MI Reporting Work with IAM Control Owners to define and track KPIs/KCIs/KRIs. Maintain dashboards and generate periodic reporting for Cybersecurity leadership and stakeholders. 🔄 Risk, Governance & Compliance Evaluate IAM controls against regulatory frameworks such as GDPR, SOX, PCI DSS, ISO 27001. Identify cybersecurity exposure risks and support remediation planning. Implement strong governance processes for continuous compliance and risk reduction. 🤝 Stakeholder Management Collaborate with business units, IT, cybersecurity, and operations teams across global regions. Provide support during audits and external reviews. Lead cross-functional teams to define IAM standards, policies, and procedures. 📈 Continuous Improvement & Documentation Recommend improvements for IAM and Secrets Management efficiency, security, and scalability. Prepare and maintain key project artifacts: project charters, plans, dashboards, reports, and closure documents. ✅ Required Skills & Experience 5–7 years in Cybersecurity, IAM, or Access Governance roles. Strong knowledge of IAM controls, credential governance, and secrets management frameworks. Hands-on experience in: Application Security tools: MicroFocus Fortify (SAST/DAST), Checkmarx, Black Duck/Sonatype IQ, Veracode, Synopsys Strong understanding of risk management and compliance metrics (KPIs, KRIs, KCIs). Familiarity with project management and governance frameworks. Excellent communication and presentation skills. Certifications such as CISSP, CISM, or other IAM-related credentials are preferred. 📌 Mandatory Skills Application Security – MicroFocus Fortify (SCA, SAST, DAST) Application Security – Open Source Tools (Black Duck, Sonatype IQ) Application Security – Veracode, Synopsys, Checkmarx IAM Governance, KPIs/KCIs, Risk Management Regulatory Framework Awareness (SOX, ISO 27001, PCI DSS, GDPR)

You are a talented and experienced Micro-architect RTL Engineer who will join a dynamic team. You have a strong background in multiple technologies and exposure to ARM or microprocessor design and networking. With over 10 years of experience, you will design and implement RTL microarchitecture for high-performance processors, optimizing components for efficient execution and low-power consumption. Your collaboration with cross-functional teams will help achieve project goals, including performance analysis and optimization of designs. You will also contribute to verification plans and methodologies, staying updated with industry trends. As a qualified candidate, you hold a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. Your extensive experience in RTL design using VHDL, Verilog, or System Verilog, along with a proven track record in microarchitecture design, makes you a valuable asset. Your familiarity with ARM or microprocessor design, networking concepts, and protocols, coupled with proficiency in design and simulation tools, helps you excel in this role. Your problem-solving skills, attention to detail, and communication abilities are essential for success. Preferred qualifications include experience with low-power design techniques, formal verification, and validation methodologies. Knowledge of scripting languages like Python or Perl is beneficial for automation purposes. In return, you will be part of a collaborative and innovative work environment with opportunities for professional growth and development. A competitive salary and benefits package await you as you work on cutting-edge technology projects that have a real impact. If you are interested in this opportunity, please share your updated resume at maruthiprasad.e@eximietas.design. The position is available in Bangalore & Visakhapatnam.,

As FPGA Architect, you will play a pivotal role in leading the design and development efforts across a range of projects in a dynamic and collaborative environment. Your primary responsibility will involve defining and creating complex FPGA designs for our Test products. Working closely with a diverse team including R&D Project Managers, Product Architects, Solution Teams, FPGA developers, Software Qualification, and Software Engineers, you will contribute to the innovation of new product offerings and enhancements to existing products. A vital aspect of this role will be your ability to work effectively with design teams based in the US and Europe, showcasing your strong teamwork skills and collaborative mindset. To excel in this role, you should possess the following qualifications: - A Bachelor's or Master's degree in Electrical/Electronic Engineering - Minimum of 10 years of experience in FPGA development with expertise in Altera and Xilinx technologies - Proficiency in RTL languages such as VHDL or Verilog - Familiarity with Xilinx FPGA Tools Design Flow including Vivado, Chipscope, and Quartus - Experience in using EDA Functional Simulation tools like Synopsys, Mentor, or Cadence - Proven ability to adapt quickly to new technologies, protocols, and product segments - Hands-on experience in developing self-checking Simulation environments, test benches, automation scripts, and test case creation - Collaborative work with system architects to define system architecture and FPGA integration with other components on PCA boards - Strong background in timing closure for intricate designs - Exceptional written communication skills for creating various technical documents such as Product Definitions, Detailed FPGA Designs, and Hardware & Software Interface documents - Self-motivated, well-organized, and proactive individual - Excellent team player with a high level of responsiveness and accountability - Strong verbal communication skills Preferred qualifications include: - Familiarity with Keysight instruments like Oscilloscope, Analyzer, AWG & BERT - Experience working with protocols such as PCI Express, USB, MIPI, Ethernet, and DDR - Exposure to international and multi-vendor collaboration environments - Full-time job type with flexible schedule This role offers the opportunity to work in person at the specified location, providing a conducive environment for professional growth and innovation.,

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Juniper, we believe the network is the single greatest vehicle for knowledge, understanding, and human advancement the world has ever known. To achieve real outcomes, we know that experience is the most important requirement for networking teams and the people they serve. Delivering an experience-first, AI-Native Network pivots on the creativity and commitment of our people. It requires a consistent and committed practice, something we call the Juniper Way. Location: Bangalore/Kolkata Experience: 3+ years Opportunity Snapshot: We are looking to hire sharp ASIC Design Engineer with excellent communication and leadership skills. You will be part of a fast paced team responsible for delivering high-speed ASICs for large, complex systems. You will have a significant opportunity to interact with system design teams across geographies. Open communications, empowerment, innovation, teamwork and customer success are the foundations of the team with "pay for performance" culture. Thus, you set your own limits for learning, achievements and rewards. Responsibilities: Define and architect high-performance blocks for the latest, most advanced networking ASICs Perform micro-architecture and logic design to deliver maximum throughput, while using minimum power Collaborate with the verification team in the development of the testplan and assist in debugging test failures Collaborate with the physical design team to develop timing constraints, analyze timing violations, and perform timing fixes Required Skills: 3+ years of ASIC design experience Strong Verilog RTL coding skills Knowledge of Synopsys Design Compiler, Verplex LEC, and Spyglass is desirable Experience designing ASICs for networking protocols (Ethernet, FCoE) is a plus Knowledge of high performance memory subsystems Knowledge of multi-domain clock synchronization and high-speed serial interfaces Strong problem solving and ASIC debugging skills Excellent written and verbal communications skills MSEE or BSEE is required About Juniper Networks Juniper Networks challenges the inherent complexity that comes with networking and security in the multicloud era. We do this with products, solutions and services that transform the way people connect, work and live. We simplify the process of transitioning to a secure and automated multicloud environment to enable secure, AI-driven networks that connect the world. Additional information can be found at Juniper Networks (www.juniper.net) or connect with Juniper on Twitter, LinkedIn and Facebook. WHERE WILL YOU DO YOUR BEST WORK? Wherever you are in the world, whether it's downtown Sunnyvale or London, Westford or Bengaluru, Juniper is a place that was founded on disruptive thinking - where colleague innovation is not only valued, but expected. We believe that the great task of delivering a new network for the next decade is delivered through the creativity and commitment of our people. The Juniper Way is the commitment to all our colleagues that the culture and company inspire their best work-their life's work. At Juniper we believe this is more than a job - it's an opportunity to help change the world. At Juniper Networks, we are committed to elevating talent by creating a trust-based environment where we can all thrive together. If you think you have what it takes, but do not necessarily check every single box, please consider applying. We’d love to speak with you. Additional Information for United States jobs: ELIGIBILITY TO WORK AND E-VERIFY In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification form upon hire. Juniper Networks participates in the E-Verify program. E-Verify is an Internet-based system operated by the Department of Homeland Security (DHS) in partnership with the Social Security Administration (SSA) that allows participating employers to electronically verify the employment eligibility of new hires and the validity of their Social Security Numbers. Information for applicants about E-Verify / E-Verify Información en español: This Company Participates in E-Verify / Este Empleador Participa en E-Verify Immigrant and Employee Rights Section (IER) - The Right to Work / El Derecho a Trabajar E-Verify® is a registered trademark of the U.S. Department of Homeland Security. Juniper is an Equal Opportunity workplace. We do not discriminate in employment decisions on the basis of race, color, religion, gender (including pregnancy), national origin, political affiliation, sexual orientation, gender identity or expression, marital status, disability, genetic information, age, veteran status, or any other applicable legally protected characteristic. All employment decisions are made on the basis of individual qualifications, merit, and business need.

About The Role We are seeking a highly skilled Full Stack Software Engineer to join our team and help us build the next-generation Engagement Portal for our customers. In this role, you will be involved in various aspects of web application development, including frontend user interfaces, backend APIs, database design, authentication systems, real-time collaboration tools, visualization platforms, simulation integration, and performance dashboards. You will work directly with customers at all stages, including onboarding, support, and requirements gathering. This is an exciting opportunity to work in a dynamic environment, involving interaction with our engineering teams, including hardware validation, architecture, design, and software as we build both front-end and back-end systems from the ground up! Our Mission Our aim is to build applications that not only allow our silicon designs to be validated but also provide our customers and partners with a robust platform to kick-start their evaluation of Silicon, allowing them to obtain the highest confidence from design and validation. We are committed to offering "Freedom to Innovate Compute". More About Us MIPS is well-known as a microprocessor pioneer, having led the way in RISC-based computing to enable faster and more power efficient semiconductors for a wide range of applications from consumer electronics to networking and communications. More than 30 years after the introduction of the original MIPS RISC architecture, MIPS processors have shipped into billions of consumer and enterprise products. Today, MIPS is once again leading a RISC revolution as we build on our deep roots to accelerate the RISC-V architecture for high-performance applications. We are focused on delivering our first RISC-V products, the MIPS eVocore processors, which provide a new level of scalability for high-performance heterogeneous computing. Because of our RISC heritage, deep engineering expertise, and proven technologies, MIPS can accelerate development and deployment of RISC-V based solutions. At MIPS, you will be a member of a fast-growing team of technologists that are creating the industry`s highest performance RISC-V processors. At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave! Responsibilities Frontend development and interactive design visualization interfaces Backend API development and other relevant frameworks on cloud and containerized environments Deploying pre-existing validation workflows like simulation result visualization or developing new ones as per customer needs Contribute to the wider silicon validation software ecosystem, helping to ensure support for the platform in various open-source design tools Use tools and real user feedback to analyze and optimize applications, including through the use of performance monitoring and user experience improvements Code-review complex frontend and backend contributions in any of these areas Interact with hardware validation and design teams to improve our next silicon validation platform – provide inputs and drive architectural decisions based on user experience needs Help maintain the documentation and reference implementations that our customers rely on Release platform APIs and work with customers to enable integration of their validation workflows for evaluation and development Ideal Candidate Qualifications Experience with full-stack web development Strong JavaScript, TypeScript, or Python programming experience, basic SQL database programming Knowledge of basic web application concepts (e.g., REST APIs, authentication, state management, responsive design) Experience developing user interfaces or backend services in modern frameworks and cloud platforms Proven experience with frontend frameworks (React, Vue.js, Angular, etc.) on different deployment architectures Experience debugging complex web applications Experience with Git, npm, yarn, CI,CD pipelines, and deployment automation scripting Experience with databases, caching, microservices, authentication systems, and application security Experience working with hardware validation and engineering teams Strong communication, collaboration, and listening skills Additional Skills (Nice To Have) Familiarity with silicon design workflows. Knowledge of different EDA tools (e.g., Synopsys, Cadence, Mentor Graphics) Experience working with data visualization and charting libraries (D3.js, Chart.js, Plotly) Some experience working with real-time applications (e.g., WebSockets, real-time collaboration, or streaming data) Any experience with simulation integration or hardware validation automation, FPGA-based validation environments would be very interesting for us

Category Engineering Hire Type Employee Job ID 12304 Remote Eligible No Date Posted 21/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 3 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You’ll Be Doing: Design and development of transistor-level analog and mixed-signal layout. Device level floorplan, placement, routing, and physical verification. Troubleshoot physical verification issues to achieve clean and desired results. Create and review layout documents to ensure they meet quality standards and are delivered on time. Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. The Impact You Will Have: You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. Minimum 3 years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: Detail-oriented and self-directed with excellent problem-solving skills. Strong communication skills for effective collaboration with cross-functional teams. Ability to manage multiple projects and meet deadlines effectively. Innovative thinker with a passion for technological advancement. Team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will be part of a highly skilled and dedicated team focused on pushing the boundaries of analog and mixed-signal design. Our team collaborates closely with cross-functional departments to drive innovation and deliver high-performance solutions. We value creativity, teamwork, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

As STA engineer , the role would expect the candidate to have deployment of new features and or methodologies related to STA and ECO domain . Scope of the work would cover (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence with tools in STA and ECO domain (PrimeTime, Tempus, Tweaker, PrimeClosure to name a few). There would be challenges for timing convergence at both block and Top level on cutting edge technology on high performance designs would have to be resolved for ensuring successful design tapeouts on time with high quality. Basic Hands-on on Scripting is a must to have for candidate. Specific skills & knowledge Bachelor or Master in Electronics Engineering and specialization in VLSI domain. 5-8 years of hands-on experience in SoC and IP level objectives on low geometry nodes (5/14/16/28/40nm). Experience in Synopsys Cadence tools, low geometry node issues, working with EDA team in reviewing & resolving blocking issues in project Proven experience in delivering timing closure methodology of mixed signal SoC with high speed PHYs, IOs, PMU IP etc. closing analog / digital interfaces timing & signal integrity issues Experience in customizing flows & methodology to meet low power & area objectives of SoC and leading team to execute on time Ability to use scripting languages / automation of Physical Implementation methodology creation and deployment Should have proven experience in demonstrating strong technical leadership to deliver on commitment, anticipation of challenges, assertive communication and excellent team player. Excellent communication skills with proven experience in international relationships

Category Engineering Hire Type Employee Job ID 12213 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Functional Verification Engineer Pre-Silicon Verification Engineer Digital Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and enthusiastic individual with a strong drive to learn and excel in the field of digital verification. You have a keen eye for detail and a deep understanding of digital design and hardware description languages (HDL). With your expertise in functional verification, you are eager to contribute to the pre-silicon verification activities for high-speed interface IPs. You possess excellent problem-solving skills and can work effectively in a collaborative environment. Your proactive approach and strong communication skills enable you to work closely with digital designers to achieve desired coverage and ensure the highest quality of IPs. What You’ll Be Doing: Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys' products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers. What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating functional verification environments. Who You Are: An excellent communicator who can collaborate effectively with cross-functional teams. A proactive problem solver with a keen eye for detail. An enthusiastic learner with a passion for technology and innovation. A team player who thrives in a collaborative environment. A highly organized individual who can manage multiple tasks and priorities effectively. The Team You’ll Be A Part Of: You will be part of a dedicated and innovative team focused on the functional verification of high-speed interface IPs. Our team collaborates closely with digital designers and engineers to ensure the highest quality of IPs. We are committed to continuous learning and development, fostering an environment where creativity and innovation thrive. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Alternate Job Titles: Applications Engineering, Sr Engineer Technical Support Engineer – Senior Level We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineering professional, eager to make a tangible impact in the semiconductor industry. With a strong foundation in electronics, computer engineering, or a related discipline, you thrive in dynamic, fast-paced environments where learning never stops. You enjoy solving complex technical challenges, collaborating with diverse teams, and engaging directly with customers to deliver innovative solutions. Your ability to communicate technical concepts to both technical and non-technical stakeholders sets you apart. You are proactive, resourceful, and committed to continuous self-improvement. Your adaptability and curiosity drive you to stay ahead of technology trends, and you take pride in mentoring peers as well as learning from them. You value inclusivity, respect different viewpoints, and believe that the best results come from teamwork. You are excited to work on projects that have real-world impact and are motivated by the opportunity to influence how cutting-edge technology shapes the future. If you’re looking to grow your career alongside some of the brightest minds in the industry and contribute to game-changing advancements, Synopsys is the place for you. What You’ll Be Doing: Collaborating with customers to understand their technical requirements and provide tailored solutions using Synopsys products. Delivering technical support and troubleshooting for complex issues throughout the product lifecycle, ensuring customer satisfaction. Conducting product demonstrations, training sessions, and workshops to empower users and promote product adoption. Working closely with R&D and product management teams to relay customer feedback and influence product roadmap decisions. Developing technical collateral including application notes, best practices, and white papers to facilitate customer success. Participating in pre-sales activities, including technical presentations and proof-of-concept evaluations. Staying abreast of industry trends and emerging technologies to provide strategic guidance to customers and internal teams. The Impact You Will Have: Accelerate customer success by ensuring seamless integration and optimal use of Synopsys solutions in their workflows. Bridge the gap between customer needs and product capabilities, driving continuous improvement and innovation. Enhance customer satisfaction through timely and effective technical support, fostering long-term partnerships. Influence product development by providing actionable feedback from real-world customer engagements. Expand Synopsys’ market reach by enabling customers to maximize the value of our technology. Contribute to a collaborative, knowledge-sharing culture that elevates the performance of the entire team. What You’ll Need: Bachelor’s or Master’s degree in Electronics, Computer Engineering, or a related technical field. 5+ years of experience in application engineering, technical support, or a relevant engineering role. Strong understanding of semiconductor design flows, EDA tools, and/or IP integration methodologies. Hands-on experience with scripting languages (e.g., Python, TCL, Perl) and familiarity with Linux/Unix environments. Proven ability to analyze and resolve complex technical issues in a timely manner. Excellent written and verbal communication skills for technical documentation and customer interaction. Who You Are: Proactive problem solver with a customer-first mindset. Strong collaborator who enjoys working in diverse, cross-functional teams. Adaptable and resilient in the face of shifting priorities and technical challenges. Excellent communicator with the ability to explain complex concepts clearly. Continuous learner, open to feedback, and eager to grow professionally. Detail-oriented and organized, with strong time management skills.

Category Engineering Hire Type Employee Job ID 12211 Remote Eligible No Date Posted 21/07/2025 Alternate Job Titles: Senior Digital Design Engineer ASIC Design Engineer High-Speed SerDes Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understanding of USB, PCIe, Ethernet, Display, and HDMI protocol standards, and you thrive in a collaborative environment. Your expertise in Verilog RTL design, microarchitecture, and timing constraints development makes you a valuable asset to any team. You are adept at using tools like Spyglass for CDC/RDC/Lint and have excellent debugging skills. Your ability to propose and implement design updates based on various requirements, coupled with your experience in test coverage and physical design timing closure, sets you apart as a leader in your field. With a passion for innovation and a keen eye for detail, you are ready to take on new challenges and contribute to the success of Synopsys. What You’ll Be Doing: Driving and working on digital design for high-speed serial interface PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Proposing micro-architecture of design/design updates based on customer requirements, analog requirements, system performance improvements, Link layer interface changes, or overall robustness of design. Implementing RTL in Verilog and running Spyglass CDC/RDC/Lint. Collaborating with verification teams to test desired functionality and corner cases. Developing timing constraints, DFT insertion, and test coverage, and closing timing with physical design teams. Well versed in Micro-Architecture and Block Ownership, Design from scratch. The Impact You Will Have: Enhancing the performance and reliability of high-speed serial interface PHY IPs. Contributing to the development of cutting-edge technologies that power modern electronics. Driving innovation in digital design and influencing the future of semiconductor technology. Collaborating with cross-functional teams to deliver robust and high-quality designs. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous improvement and excellence. Supporting customers by providing high-performance and reliable IP solutions that meet their needs. What You’ll Need: 5-8 years of relevant experience in digital design for ASICs. Strong knowledge of Verilog RTL design and microarchitecture. Experience with timing constraints development and synthesis flow. Proficiency in using Spyglass or similar tools for Lint/CDC/RDC. Proficiency in scripting and automation using TCL, PERL, or Python. Excellent debugging skills and attention to detail. Who You Are: A collaborative team player with strong communication skills. A problem solver with a proactive approach to challenges. A detail-oriented professional with a passion for innovation. A self-motivated individual who thrives in a fast-paced environment. An adaptable engineer who can handle multiple tasks and priorities. The Team You’ll Be A Part Of: You will be part of the High-Speed SerDes Digital Design Team, a group of talented engineers dedicated to developing high-performance serial link PHY IPs. The team focuses on innovation, quality, and collaboration to deliver industry-leading solutions. Together, you will work on challenging projects that push the boundaries of technology and make a significant impact on the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Alternate Job Titles: ASIC Verification, Sr. Engineer Sr. Engineer, Digital Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and innovative engineer with a strong background in high-speed protocols and a keen interest in growing your expertise through verification-related work. You thrive in a collaborative environment, working alongside experienced digital design and verification professionals. With a solid foundation in Verilog, VHDL, and/or SystemVerilog, you are eager to expand your knowledge and apply your skills to state-of-the-art products. Your excellent problem-solving abilities and strong communication skills enable you to identify and address design issues effectively. You are organized, detail-oriented, and capable of managing multiple tasks efficiently. With your passion for learning and exploring new technologies, you are committed to contributing to the success of our projects and the broader goals of Synopsys. What You’ll Be Doing: Identify verification environment requirements from various sources, including specifications, design functionality, and interfaces. Generate verification test plans, environment documentation, and usage documentation. Define, develop, and verify complex UVM verification environments. Evaluate and exercise various aspects of the development flow, including Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics. Identify design problems, propose corrective actions, and address inconsistencies in documented functionality. Collaborate with cross-functional teams to ensure the successful integration and verification of projects. The Impact You Will Have: Ensure the robustness and reliability of our digital designs through meticulous verification processes. Contribute to the development of cutting-edge technologies that power the Era of Smart Everything. Enhance the overall quality and performance of our silicon IP products. Help our customers bring differentiated products to market quickly and with reduced risk. Drive continuous improvements in our verification methodologies and practices. Support the growth and success of Synopsys by contributing to our reputation for innovation and excellence. What You’ll Need: Proven desire to learn and explore new state-of-the-art technologies. Demonstrated proficiency in Verilog, VHDL, and/or SystemVerilog. Experience with scripting languages such as BASH, TCSH, PERL, PYTHON, or TCL is a plus. Understanding of verification methodologies such as UVM is a plus. Strong organizational and communication skills. 3+ years of relevant experience in ASIC digital verification. Who You Are: A passionate and innovative engineer with a strong technical background. Detail-oriented and capable of managing multiple tasks efficiently. Excellent problem-solving abilities and a proactive approach to addressing challenges. Strong communication skills, both written and spoken. A collaborative team player who thrives in a dynamic and fast-paced environment. The Team You’ll Be A Part Of: You will join an experienced and dedicated digital design and verification team focused on developing state-of-the-art products. Our team is committed to excellence and continuous improvement, working collaboratively to achieve our goals. You will have the opportunity to learn from experts in various fields and contribute to the success of our projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

We Are: Drive technology innovations that shape the way we live and connect. Our technology drives the Era of Pervasive Intelligence, where smart tech and AI are seamlessly woven into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world. Apprenticeship Experience: At Synopsys, Apprentices dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide—and having fun in the process! You'll have the freedom to share your ideas, unleash your creativity, and explore your interests. This is your opportunity to bring your solutions to life and work with cutting-edge technology that shapes not only the future of innovation but also your own career path. Join us and start shaping your future today! Mission Statement: Our mission is to fuel today’s innovations and spark tomorrow’s creativity. Together, we embrace a growth mindset, empower one another, and collaborate to achieve our shared goals. Every day, we live by our values of Integrity, Excellence, Leadership, and Passion, fostering an inclusive culture where everyone can thrive—both at work and beyond. What You’ll Be Doing: Design, deploy, and maintain scalable IT infrastructure supporting build, release, and testing environments. Setup, maintain and optimize CI/CD pipelines using Jenkins, GitHub, or similar tools. Automate infrastructure provisioning, monitoring, and maintenance to improve efficiency. Collaborate with development teams to streamline build and release workflows. What You’ll Need: Should be a graduate engineer with bachelor's degree in computer science, Information Technology, or a related field (2025). Proficiency in IT infrastructure engineering, DevOps, or a related role. Knowledge in CI/CD tools (Jenkins, GitHub, etc.). Proficiency in scripting and automation (Python, Bash, PowerShell, Makefiles, or similar). Good understanding of Linux and Windows systems. Strong troubleshooting and problem-solving skills. Skills in C/C++, compilers, static or dynamic code checking, and distributed storage technology (Preferred). Familiarity with software development lifecycle (SDLC) and Agile methodologies (Preferred). Excellent communication and presentation skills. Collaborative and maintaining an open and friendly atmosphere to encourage productivity, creativity, and innovation. Key Program Facts: Program Length: 12 months. Location: Noida, India. Working Model- in-office. Full-Time/Part-Time: Full-time. Equal Opportunity Statement: Synopsys is committed to creating an inclusive workplace and is an equal opportunity employer. We welcome all qualified applicants to apply, regardless of age, color, family or medical leave, gender identity or expression, marital status, disability, race and ethnicity, religion, sexual orientation, or any other characteristic protected by local laws. If you need assistance or a reasonable accommodation during the application process, please reach out to us.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ MTS SILICON DESIGN ENGINEER The Role The verification team at AMD is looking for a Member of Technical Staff to lead and contribute on the verification of Network on Chip IPs and Subsystems. The individual will help architect, develop and use simulation and/or formal based verification environments, at block and subystem level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystems and SOC designs. THE PERSON: You have a passion for modern, complex digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Lead and Plan verification of complex digital design blocks by fully understanding the architecture and design specifications Interact with architects and design engineers to create a comprehensive verification testplan Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools Debug tests with design engineers to deliver functionally correct design blocks Identify and write coverage measures for stimulus quality improvements Perform coverage analysis to identify verification holes and achieve closure on coverage metrics PREFERRED EXPERIENCE: Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test block level/full chip SOCs and FPGAs. Strong understanding of state of the art of verification techniques, including assertion and coverage-driven verification. Strong understanding of different phases of ASIC and/or full custom chip development is required. Experience in block level NOC (Net work on Chip) verification is a plus. Verification Experience in protocols like AXI3/4, DDR4/5, HBM, PCIe, Processors, Graphics is a plus. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance FPGAs, SOCs and/or VLSI designs is a plus. Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus. Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management is a plus. Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC-Formal, Magellan) is a plus. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Hi Greetings from Eximietas Design! We are actively looking to hire Senior Analog Layout Design Engineers / Leads with (TSMC 5nm / TSMC 7nm preferred) 7–15 years of experience to join our growing team. 📍 Locations: Vizag/Bengaluru/Hyd 📅 Notice Period: 30 days or less preferred. Job Description: We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm/7nm preferred) to contribute to cutting-edge analog layout design. Key Skills & Requirements: Expertise in IR drop, Electromigration, self-heating, RC delay, and parasitic capacitance optimization. Solid understanding of how layout impacts circuit performance (speed, area, etc.). Ability to implement layouts that meet tight design constraints and deliver high quality. Hands-on experience with CADENCE/SYNOPSYS layout tools and flows. Familiarity with scripting languages (PERL/SKILL) is a plus. Strong communication skills and experience working with cross-functional teams. If this opportunity interests you—or if you know someone suitable—please send your updated resume to: 📧 maruthiprasad.e@eximietas.design. Referrals are highly appreciated. We look forward to connecting with talented engineers passionate about pushing the boundaries of analog layout design! Maruthhi Naidu Talent Associate - VLSI Manager Eximietas Design - Visakhapatnam maruthiprasad.e@eximietas.design +91 8088969910.