1346 Synopsys Jobs - Page 3

Overview: Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their ...

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Minimum Qualifications Previous experience working on complex high-performance RTL design, preferably on DSP or processor based sub-system. Expert in hardware (RTL) design in Verilog, System Verilog or VHDL. Knowledge of standard on chip bus interface protocols (AXI, APB, AHB) Experience with some of below. Model development (SystemC, or C++) RTL to gates synthesis (Synopsys DCG or Cadence Genus) Design rule and CDC checking (SVA assertions, Spyglass, 0-in) Work on high performance low power RTL design. Scripting languages (PERL, Python, TCL, C, etc.) Principal Duties A...

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their c...

Company Description Mirafra Technologies is a technology consulting company specializing in semiconductor Design Services, Embedded Software Development, and Digital Transformation. With a team of over 1000 engineers, we have offices across India, the US, Singapore, and Sweden. Our engineers have a track record of delivering successful projects and have long-standing relationships with our customers. Role Description Exp:- 5+Yrs. NP:- 0-30 Days T his is a full-time on-site role for a #STA Engineer located in India. The role involves day-to-day tasks related to Static Timing Analysis (STA) for semiconductor design projects. The engineer will be responsible for ensuring timing requirements are...

As an experienced ASIC/FPGA digital designer with 7-10 years of experience, you will be responsible for the following key responsibilities: - Utilize your expertise in Verilog/VHDL, Micro-architecture, and RTL Implementation to contribute to the development of cutting-edge technology. - Apply your knowledge in USB, PCIe, and Ethernet domains to design and implement efficient solutions. - Utilize tools such as Synopsys/Cadence Synthesis/STA tools and FPGA to optimize performance and functionality. - Proficiency in scripting skills will be an added advantage in enhancing the design process. Qualifications required for this role include: - BE in Electronics & Communication Engineering In additi...

As a Staff Software Developer specializing in Machine Learning for EDA Systems at Qualcomm India Private Limited, you will play a crucial role in designing and implementing cutting-edge machine learning techniques in the realm of Electronic Design Automation (EDA). Your primary responsibilities will revolve around leading software development initiatives, guiding a team of engineers and ML practitioners, and ensuring the seamless integration of ML into semiconductor design workflows. Below are the key details of the job: **Role Overview:** You will be responsible for designing and developing end-to-end ML-integrated EDA software platforms, leading a team of engineers, refining software devel...

Required skills: Job Description: Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge. Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge. Candidate is preferably expert in PT and Tempus tools. Education Requirements B. Tech / M. Tech (ECE) Shift General Work Week Monday to Friday Joining time Immediate to 90 Days

About The Role : To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimizat...

Company Overview : MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defence, Consumer Electronics, Automotive, Medical and Networking & Telecommunications. Job Description: Experience: 4 - 12 Years Location: Hyderabad ( Work From Office) Required skills: He/She should be able to do top-level floor planning, PG Planning, partitioning,placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs....

Job Requirements Job Title: Lead Engineer - Physical Design (PD) Job Type: Full-Time We are seeking a highly skilled and experienced Physical Design Lead in VLSI with a minimum of 9 years of experience to join our team. As the Lead Engineer in Physical Design, you will be responsible for overseeing the physical design process, ensuring the successful implementation of complex VLSI designs. esponsibilities: Lead the physical design (PD) team through complete ASIC/SoC implementation flow. Handle floorplanning, partitioning, placement, CTS (Clock Tree Synthesis), routing, and sign-off activities.Drive timing closure, power optimization, area optimization, and DRC/LVS clean designs.Collaborate w...

Company Description Pronesis partners with leading technology companies globally to offer world-class solutions. The company specializes in a variety of engineering services including ASIC/VLSI design, embedded product development, and product engineering. Whether it’s SoC verification, hardware design and testing, or product support, Pronesis ensures top-tier service in every domain. What You’ll Be Doing: Lead block/chip level Physical Design (PD) activities , including floor planning, abstract view generation, RC extraction, PNR, STA, EM/IR drop, DRCs, and schematic-to-layout verification. Collaborate with RTL/design teams to solve complex design challenges and optimize PPA . Debug tool/de...

Job responsibilities: Write and maintain User Manuals for model libraries (IP) and tools methodologies. Create documentation in DITA XML using Oxygen Author adhering to Synopsys Guidelines and build the doc package using standard templates. Co-ordinate with Subject Matter Experts (SMEs) and design teams to seek inputs and handle doc reviews for completion. Ensure timely release of documents in line with scheduled product releases Ensure accuracy of documents within short turnaround times Keep documents up to date with changing customer requirements and technological advancements Proactively track and co-ordinate with other technical writers for current/upcoming assignments Assist Product dev...

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do th...

Job Area :Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm GPU team is actively seeking candidates for several physical design engineering positions. Graphics HW team in Bangalore is part of a worldwide team responsible for developing and delivering GPU solutions which are setting the benchmark in mobile computing industry.Team is involved in Architecture, Design, Verification, implementation and Productization of GPU IP COREs that go into Qualcomm Snapdragon SOC Products used in Smartphone, Compute, Automotive, AR/VR and other low power devices. Qualcomm has strong portfolio of GPU COREs and engineers get an opportunity to work with world class engineeri...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system arc...

General Summary: Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. Qualcomm CDMA Technologies (QCT) is a global leader in Multimedia integrated circuits (ICs), software and systems for wireless consumer devices including Smartphones, Netbooks and E-readers. Our teams are developing advanced technologies to enhance mob...

Experience: 5+ years Key Responsibilities: · Own and drive floorplanning for complex SoC or IP blocks from RTL to GDSII. · Collaborate with RTL, DFT, and architecture teams to understand design requirements and translate them into optimal floorplans. · Perform macro placement , power grid planning , pin placement , and block-level partitioning . · Analyze and optimize for congestion , timing , area , and power . · Work closely with place & route , clock tree synthesis , and timing closure teams to ensure floorplan quality. Required Skills: Strong hands-on experience with EDA tools like Cadence Innovus, Synopsys ICC2, or Mentor Olympus. · Deep understanding of physical design flow , especiall...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer ...

General Summary: Qualcomm is the world's leading developer of next generation of always on Display technologies and is committed to building a world-class organization that will lead the industry. Be part of the team developing next generation Display subsystems and Display peripherals. The ASIC Systems Architect is responsible for system architecture definition activities supporting a sophisticated multimedia Low Power Display subsystem catering to various market segments like mobile, XR, compute, IOT, Wearables and automotive products. Candidates will be responsible for all aspects of the ASIC hardware architecture definition/validation including the following: Owning end to end system arc...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

Key Responsibilities: Perform custom layout design of high-performance and low-power memory blocks (SRAM, ROM, Register Files, CAM, etc.). Work on floorplanning, transistor-level layout, device matching, and parasitic optimization. Ensure DRC/LVS clean layouts with adherence to foundry design rules. Collaborate with circuit design teams to achieve optimal PPA (Performance, Power, Area). Conduct parasitic extraction, EM/IR analysis, and reliability checks for memory layouts. Deliver high-quality layouts meeting project deadlines and silicon success. Required Skills: Strong expertise in memory layout (SRAM, ROM, CAM, Register Files). Hands-on experience with Cadence Virtuoso, Mentor Calibre, S...

Responsibilities: Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Worked on 65nm or lower node designs with advanced low power techniques such as Voltage Islands, Power Gating, and substrate-bias. Provide technical guidance and mentoring to Physical Design Engineers. Interface with front-end ASIC teams to resolve issues. Low Power Design - Voltage Islands, Power Gating, Substrate-bias techniques. Timing closure on DDR2/DDR3/PCIE inte...