906 Synopsys Jobs - Page 18

• Bachelor's degree in Science, Engineering, or related field. • 7+ years ASIC design, verification, or related work experience. • At least 5 years of experience with the ISO 26262 / IEC 61508 standard including hands-on experience with Failure Modes and Effect Analysis (FMEA), Fault Tree Analysis (FTA) and Failure Modes Effect and Diagnostic Analysis (FMEDA) • Proven experience in development of automotive SoC including VLSI design and methodology practices. • Familiarity with Synopsys Functional Safety tools • General knowledge in ASIC design process, digital design concepts, design verification tools and techniques, SoC architecture, etc. • Prior automotive experience in ADAS and self-driving systems will be an advantage. Design verification experience (developing test plan, test bench, tests, assertions, functional and code coverage, and debugging tests and designs) • Knowledge of SoC, ARM processor, AMBA bus, DDR, or peripherals is desirable

Bengaluru, Karnataka, India Category: People Hire Type: Employee Job ID 10367 Date posted 06/23/2025 ; We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A strategic thinker and analytical expert with a passion for designing and managing compensation programs that attract, retain, and motivate top talent. You thrive in dynamic environments and excel at building strong cross-functional relationships. Your ability to interpret complex data, coupled with your advanced technical expertise enables you to deliver actionable insights and recommendations. You are a proactive problem solver who can manage multiple projects simultaneously, ensuring timely and effective execution of compensation initiatives. Your exceptional communication and collaboration skills allow you to influence change and build trust across teams. You are detail-oriented, highly organized, and adaptable, thriving in times of change and transformation. With a strategic mindset and a commitment to equity and fairness, you are ready to make a meaningful impact on Synopsys' compensation programs and overall success. What You’ll Be Doing: Providing compensation expertise and detailed analysis on all aspects of compensation programs. Supporting the design, change management, and communication efforts associated with our compensation programs and practices. Designing proactive, data-driven recommendations to support retention, recognition, promotions, transfers, job matches, and job levelling. Leading and managing multiple projects simultaneously with a high degree of initiative. Supporting compensation programs cross-functionally and collaboratively across the business. Building and maintaining strong relationships with key partners within HR and the business. The Impact You Will Have: Driving the strategic goals of the organization through effective compensation planning. Ensuring competitive and equitable salary structures that attract and retain top talent. Enhancing the effectiveness of compensation programs through data-driven insights. Fostering trust and credibility across various working teams in COEs, Total Rewards, the People Partner team, and our business. Supporting the redesign of compensation programs that align with organizational goals and contribute to the overall success and sustainability of Synopsys. Strengthening the organization’s ability to make informed decisions through robust compensation analysis and modelling. What You’ll Need: Experience of 8+yrs in broad-based compensation, including running company year-end compensation planning, merit/bonus cycles, submitting market data, developing salary ranges, and supporting the business in their planning and jobs. Advanced technical expertise in Excel, Power Query/BI, and other data analysis functions. Strong compensation analysis and modelling capabilities. Strong analytical skills, project management, and organizational skills. Proficiency with SuccessFactors (a plus). CCP or other relevant certifications (a plus). Who You Are: A creative problem solver with the ability to break down complex challenges into actionable solutions. Adaptable and resilient, thriving during times of change and ambiguity. A strong communicator and collaborator who builds trust and credibility across teams. Detail-oriented and highly organized, with a proactive approach to managing tasks and projects. A strategic thinker with a passion for equity and fairness in compensation practices. The Team You’ll Be a Part Of: You will join the Total Rewards team, this team is dedicated to designing and implementing compensation programs that align with Synopsys' business goals and values. You will collaborate closely with People Partners, business leaders, and other HR teams to ensure competitive and equitable pay structures that support employee retention and organizational success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

About This Opportunity We are starting a new Silicon R&D center in Bangalore. Join our team as we pioneer the IPs that power the digital ASICs of tomorrow's mobile standards. Ericsson System on a Chip (SoC) devices are custom-made for mobile networks and spans across the Ericsson Radio System - RAN Compute, Radio and Transport – to enable communication service providers to surpass the expectations of their end-customers. At our state-of-the-art design centers, we don't just follow industry trends—we set them. By leveraging cutting-edge tools and methodologies, we lead innovation in the telecommunications sector. As a valued team member, you'll play a pivotal role in shaping the future of global connectivity, contributing to the advancement of 5G and 6G technologies. As part of our global R&D organization, you'll collaborate with talented teams across Sweden, the US, and beyond. We are committed to fostering a collaborative and innovative work environment that encourages creativity and teamwork. What You Will Do Leadership Opportunity: Take charge of delivering high-impact ASIC IP solutions, ensuring alignment with broader project goals and requirements. Creative Freedom: Engage in an environment that champions innovation and critical thinking. You'll have the autonomy to explore advanced verification technologies alongside skilled experts. Global Influence: Contribute to projects that transform industries, advance digital economies, and enhance global communication, bridging gaps between people, systems, and information worldwide. Work-Life Balance: We prioritize the well-being of our team members, offering a balanced work-life environment to help you perform at your best without compromising your personal life. Professional Growth: Engage in continuous learning opportunities, tackle exciting challenges, and collaborate with brilliant minds in a supportive and forward-thinking atmosphere. An international work environment with opportunities for professional growth and development. A collaborative and inclusive culture that values diversity and innovation. A competitive compensation and benefits package. You will bring Key Responsibilities: Driving Execution Be responsible for IP (Intellectual Property) development section, including design and verification at the subsystem, block, and/or sub-block levels. Act as an interface towards stakeholders and vendors. Ensure good collaboration with other teams both on-site and cross-site Team Recruiting and Development Recruit and develop team designers and verifiers Manage individual and team performance Develop a motivating, customer oriented and exciting work environment Broader Responsibilities Be an active contributor to the leadership teams of that global functional department that you collaborate with as well as the local IP development department Act as the chair and participate in steering groups inside organization or towards external suppliers Drive internal efficiency, cost effectiveness via new or alignment of existing ways of working, across all other design sections continuous improvements and automation Set goals, follow-up and strategically evolving section towards vison Required Qualifications: Bachelor’s degree in electrical or computer engineering Proven leadership experience in all the following areas IP development team management (at least 3 years) building a motivated, innovative, empowered team coaching and mentoring written and verbal communications and presentations ability to build on cultural diversity and collaborate across teams, organizations and sites working with external suppliers agile ways of working and project management 8+ years’ experience as an individual contributor designer or verifier Additional Requirements: Experience with Cadence and Synopsys design and verification suites. Team-oriented, prioritizing team success within the team, across teams, and across sites over individual results. Specifically, experienced at communicating and meeting expectations within and across teams in an agile environment. High attention to detail and commitment to quality. Strong focus on meeting project deadlines and deliverables. Proficient in English, with strong communication skills. Preferred Skills: Understanding of radio access systems and their components. Working knowledge of systems for continuous integration (e.g., Jenkins), simulation and analysis environments (e.g., Simscope), issue-tracking (e.g., Jira). Experience designing one or more of the following hardware domains: AMBA-based designs especially AXI and CHI. ARM-based real-time microcontroller systems including their control and interface peripherals. Wireless infrastructure specific protocols and interfaces and protocols. Implementation of hardware-based digital signal processing systems (filters, adaptation, etc.) Why join Ericsson? At Ericsson, you´ll have an outstanding opportunity. The chance to use your skills and imagination to push the boundaries of what´s possible. To build solutions never seen before to some of the world’s toughest problems. You´ll be challenged, but you won’t be alone. You´ll be joining a team of diverse innovators, all driven to go beyond the status quo to craft what comes next. What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. Encouraging a diverse and inclusive organization is core to our values at Ericsson, that's why we champion it in everything we do. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity Employer. learn more. Primary country and city: India (IN) || Bangalore Req ID: 766880

Minimum qualifications: PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering or related technical field, or equivalent practical experience. Experience with accelerator architectures and data center workloads. Experience in programming languages (e.g., C++, Python, Verilog), Synopsys, Cadence tools. Preferred qualifications: 2 years of experience post PhD. Experience with performance modeling tools. Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies. Knowledge of high performance and low power design techniques. About the job In this role, you will shape the future of AI/ML hardware acceleration as a Silicon Architect/Design Engineer and drive cutting-edge TPU (Tensor Processing Unit) technology that fuels Google's most demanding AI/ML applications. You will collaborate with hardware and software architects and designers to architect, model, analyze, define and design next-generation TPUs. You will have dynamic, multi-faceted responsibilities in areas such as product definition, design, and implementation, collaborating with the Engineering teams to drive the optimal balance between performance, power, features, schedule, and cost. The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers. Responsibilities Revolutionize Machine Learning (ML) workload characterization and benchmarking, and propose capabilities and optimizations for next-generation TPUs. Develop architecture specifications that meet current and future computing requirements for AI/ML roadmap. Develop architectural and microarchitectural power/performance models, microarchitecture and RTL designs and evaluate quantitative and qualitative performance and power analysis. Partner with hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software codesign, creating high performance hardware/software interfaces. Develop and adopt advanced AI/ML capabilities, drive accelerated and efficient design verification strategies and implementations. Use AI techniques for faster and optimal Physical Design Convergence -Timing, floor planning, power grid and clock tree design etc. Investigate, validate, and optimize DFT, post-silicon test, and debug strategies, contributing to the advancement of silicon bring-up and qualification processes. Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an innovative and analytical thinker with a passion for technology and a drive to solve complex engineering challenges. You thrive in a collaborative environment, working alongside a high-caliber team of engineers to develop technical solutions that push the boundaries of AI-driven optimization. You possess a strong foundation in computer science or electronics, with a deep understanding of C/C++ and Linux. Your excellent communication skills enable you to effectively convey ideas and work seamlessly with product engineers to define and solve problems. You are committed to continuous improvement, always seeking ways to enhance performance and quality in your work. Your ability to debug issues, optimize algorithms, and develop new features makes you an invaluable asset to any engineering team. What You’ll Be Doing: Developing SignOff ECO optimization algorithms and heuristics. Debugging issues related to design loading and timing/power optimization. Striving for continuous improvements in QoR to achieve faster timing convergence with optimal power overhead. Collaborating with a team of engineers to develop technical solutions to complex problems. Communicating with product engineers to understand and define problem scope. Ensuring strict performance and quality requirements are met. The Impact You Will Have: Enhancing the performance and efficiency of PrimeClosure, the industry's first AI-driven signoff ECO solution. Contributing to the development of cutting-edge algorithms that optimize timing and power in chip design. Improving the overall quality and reliability of our products through rigorous debugging and testing. Driving innovation and continuous improvement in our engineering processes. Supporting customer success by resolving issues and implementing new features based on their feedback. Helping shape the future of AI-driven optimization in the semiconductor industry. What You’ll Need: 5+ years off relevant experience A degree in Computer Science or Electronics. Strong analytical and problem-solving skills. Proficiency in C/C++ and Linux. Excellent communication and teamwork abilities. A passion for technology and innovation. Who You Are: A collaborative team player who thrives in a dynamic and innovative environment. A proactive and self-motivated individual with a strong attention to detail. An excellent communicator who can articulate complex ideas clearly and effectively. A creative thinker who is always looking for new ways to solve problems and improve processes. A dedicated professional committed to delivering high-quality work. The Team You’ll Be A Part Of: You will be part of the PrimeClosure R&D team, responsible for developing and maintaining the industry's first AI-driven signoff ECO solution, PrimeClosure. This team is dedicated to pushing the boundaries of technology and innovation, working collaboratively to develop cutting-edge solutions that address complex engineering challenges. Together, you will strive for continuous improvements in performance and quality, ultimately shaping the future of AI-driven optimization in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Soc Power Architecture - Power Artist/PTPX Hyderabad, India Engineering 66223 Job Description WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role: We are looking for an experienced engineer to join the SOC Power Modeling team in the AMD Client Computing and Graphics group. This role involves collaboration with multiple engineering teams including SoC architecture definition, IP design, integration/physical design, verification, and platform architecture. Contributions have a direct impact on the power & performance of AMD’s Client products. The Person: The candidate should have SOC design process experience from front end to tapeout. The candidate will work closely with the SOC design teams on RTL and emulation-based power estimation, simulation and design data extraction. The candidate must be organized, self-motivated and able to work effectively on teams large and small across multiple sites. He or she must be able to prioritize assignments and drive them to completion. Good verbal and written communication skills are helpful for technical discussions with team members across the globe. Key Responsibilities: Work with front end RTL, DFT, Synthesis, and Physical design teams in the development of power intent (UPF) design at SoC level. Work with emulation team on power estimates during the pre-silicon design process using Power Artist/PTPX emulation environments and ensure power objectives and goals are met. Work with RTL and physical design teams to generate data on design impact from clock and power gating, device type mix and physical implementation options. Track IP power development through the design cycle ensuring it meets power budgets - leakage/dynamic at every milestone. Work with design verification in validating low power design features at SoC and IP level. Preferred Experience Experience with Synopsys EDA tools, particularly PtPx/Power Artist. Understanding of hardware emulation process, stimulus and EDA flows. Experience with Tcl and Python based scripting. Experience with UPF. Academic Credentials Master or Bachelor of Science degree in Electrical Engineering. 3+ years of experience. #LI-RR1 #LI-Hybrid AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Description. Arm’s CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE.. Responsibilities. Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation.. Required Skills And Experience. This role is for a Senior Principal DFT Engineer with 15+ years of experience in Design for Test. Experience coding Verilog RTL, TCL and/or Perl. Proficient in Unix/Linux environments. Core DFT skills considered for this position should include some of the following Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics. Bachelors or Master’s degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field. “Nice To Have” Skills and Experience. Familiarity with IEEE 1149, 1500, 1687, 1838. Synthesis & Static Timing Analysis. Familiarity with SoC style architectures including multi-clock domain and low power design practices.. Validated understanding of Siemens DFT tools. Familiarity with Arm IP like the following Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug. Experience with 2.5D and 3D test. Ability to work both collaboratively on a team and independently. Hard-working and excellent time management skills with an ability to multi-task. An upbeat demeanor to working on exciting projects on the cutting edge of technology. Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools. In Return. We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding!. Partner and customer focus. Teamwork and communication. Creativity and innovation. Team and personal development. Impact and influence. Deliver on your promises. Accommodations at Arm. At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.. Hybrid Working at Arm. Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.. Equal Opportunities at Arm. Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.. Show more Show less

About the Role: We are seeking a talented and experienced Analog Layout Engineer to join our team in Bangalore. The ideal candidate will have a strong background in analog layout design and will contribute to the development of cutting-edge semiconductor products. If you are passionate about VLSI design and eager to work in a collaborative, innovation-driven environment, this opportunity is for you! Location: Bangalore Experience: 3 to 10 Years Employment Type: Full-Time Notice Period: 90 Days Key Responsibilities: 1. Design and implementation of custom analog and mixed-signal layouts for circuits such as amplifiers, ADC/DACs, PLLs, and more. 2. Perform layout verification tasks, including DRC, LVS, and parasitic extraction using industry-standard tools. 3. Optimize layout designs for performance, area, and power while ensuring compliance with design rules and process constraints. 4. Collaborate closely with circuit design engineers to interpret specifications and requirements. 5. Participate in design reviews and contribute to the enhancement of layout methodologies. 6. Work on advanced nodes, ensuring high-quality layouts for high-performance, low-power designs. Required Skills and Qualifications: 1. Experience: 3 to 10 years in analog layout design, with expertise in full-custom IC design. 2. Proficiency in layout tools such as Cadence Virtuoso, Synopsys Custom Compiler, or equivalent. 3. Strong knowledge of semiconductor process technologies, including FinFETs and advanced nodes (e.g., 7nm, 5nm). 4. Hands-on experience with parasitic-aware design, matching, and signal integrity. 5. Familiarity with EDA tools for verification, such as Calibre or Assura. 6. Excellent analytical and problem-solving skills with attention to detail. 7. Strong communication and interpersonal skills to work effectively in a team environment. What We Offer: 1. Competitive compensation package and benefits. 2. Opportunity to work on innovative and challenging projects. 3. Dynamic and collaborative work environment. 4. Career growth and learning opportunities.

Experience : 10+ Years Location : Hyderabad Mode of Work : Remote Employment Type : Freelance / Contract Industry : Semiconductor / Fabless About The Role We are looking for an experienced CAD Engineer with over 10 years of experience in the semiconductor (fabless) domain. The ideal candidate will bring deep expertise in CAD flow development, EDA infrastructure management, PDK installations, and troubleshooting/debugging complex issues. This role involves hands-on implementation and support of EDA environments, making it a critical part of the engineering infrastructure team. Key Responsibilities Install, configure, and maintain EDA tools including Cadence, Synopsys, Mentor Graphics, and ClioSoft. Set up and manage EDA license servers, including license installation, usage monitoring, remixing, and optimisation. Install and integrate Process Design Kits (PDKS) from various foundries on local engineering machines. Ensure seamless EDA tool integration by maintaining proper directory structures and compatibility. Provide IT infrastructure support: Install and configure servers, storage, and networks used in engineering workflows. Deploy and manage OpenText™ Exceed™ TurboX (EXT) for remote access by engineering teams across global locations. Install and support CVA and EDX environments for circuit simulation and data exchange. Plan and manage high-performance computing environments, including Linux servers and VMware-based virtual machines. Develop and maintain shell and Perl scripts to automate environment setup and streamline tool integration with client databases. Offer day-to-day CAD/EDA support for design, layout, and verification engineers. Diagnose and resolve tool failures, license issues, and PDK conflicts through thorough troubleshooting. Perform root-cause analysis for system failures and escalate complex issues when needed. Maintain detailed documentation for troubleshooting processes, solutions, and tool configurations. Required Skills & Qualifications Bachelor’s degree in computer science, IT, or related field. 10+ years of hands-on experience as a CAD/EDA Engineer in the semiconductor (fabless) industry. Proven experience in CAD flow development, EDA tool setup, PDK installation, and infrastructure management. Strong knowledge of Linux server installation/configuration, storage systems, and networking. Expertise in EDA license server operations including installation, analysis, and optimization. Familiarity with CVA, EDX, and simulation setup in engineering environments. Excellent debugging and troubleshooting skills for EDA tools, infrastructure, and integration issues. Ability to work independently and collaborate with cross-functional engineering and IT teams. Tools & Technologies Cadence: Virtuoso (L, XL, GXL), ADE (L, XL, GXL), Spectre, SpectreRF, Ultrasim, AMS, APS, Incisive, CCT Router, SKILL Synopsys: CosmosSE, CosmosLE, Milkyway, Hercules, Star RCXT, Hspice Mentor Graphics: Calibre, IC Station, Design Architect, DVE, Design Manager, Ample Others: ClioSoft SOS, OpenText Exceed TurboX, Linux server management, Shell & Perl scripting Job Category: APAC Job Type: Freelance Job Location: Hyderabad

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ The Role We are seeking a highly experienced and innovative SOC Physical Design Director to lead the development of Server SOC designs and very experienced physical design team. This senior level role is critical for the design development of Server SOC designs products at AMD and is responsible for delivering Server SOCs meeting challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. The Person This role combines strong people leadership and teamwork skills driving cross functional teams across geographies. The person with strong technical expertise, Strong analytical and problem-solving skills working with both executive level technical and management leaders to influence and drive change. Key Responsibilities Lead and manage a team of engineers focused on SOC Physical Design implementation and Signoff Bring deep knowledge and experience in Physical design & Timing closure and signoff and apply them to large, challenging, leading-edge Server SOC designs to ensure high quality on time delivery. Bring significant experience in effective team management to help mentor, coach and grow the Server SOC Physical Design Team with an emphasis on positive influence on team morale and culture Technically manage different aspects of Physical Design including Full Chip Floor planning, Clock Tree Synthesis, Placement, Optimization, Routing, Parasitic Extraction, Static Timing Analysis, IR drop analysis, Physical Verification and Sign Off. Collaborate with cross functional teams between Architecture, Product planning, Packaging, IPs, CAD to drive SOC Implementation and PPA improvement. Experience and understanding of flow development and scripting. Strong Technical problem and debugging solving. Preferred Experience 20+ years’ experience in SOC Physical Design Implementation, Signoff and TapeOut Must have prior experience leading Physical Design teams of at least 50+ members Excellent analytical and problem-solving skills along with attention to details. Strong written and verbal communication, Time Management and Presentation Skills. Must be a self-starter, and able to drive independently and efficiently challenging and time critical tasks to on-time completion. Forward looking and dependable leader who proactively identifies and resolves issues and roadblocks before they become bottlenecks or showstopper. Experience in EDA tools for Physical Design and Signoff cycles - Synopsys FusionCompiler, Cadence Innovus, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk. Academic Credentials Bachelor’s or Master's degree in Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Required Qualifications: ? Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 4-20 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications:? Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English? Strong analytical and problem-solving skills.?

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description We are seeking a highly experienced and deeply hands-on Principal Validation Engineer to join our dynamic Silicon Validation team in Bengaluru. In this critical role, you will serve as a technical architect and mentor, driving the post-silicon validation of cutting-edge DC-DC converter products. Your profound expertise in power electronics, silicon validation methodologies, and PCB design will be instrumental in ensuring the quality, performance, and reliability of our next-generation power management ICs. You will not only lead complex validation efforts but also guide and technically ramp up junior and senior validation engineers, fostering a culture of technical excellence. Responsibilities Technical Leadership & Architecture: Serve as the primary technical expert for post-silicon validation of complex DC-DC converter products (e.g., LDO, Buck, Boost, Buck-boost, Drivers, Controllers, etc…). Architect comprehensive validation test plans and methodologies from silicon bring-up to characterization, focusing on performance, reliability, and robust operation across various load and environmental conditions (including load transient, ripple, parasitic effects). Drive the definition and implementation of advanced validation techniques, including automated test development and data analysis. Hands-on Validation & Debug: Perform hands-on initial silicon bring-up, debugging, and characterization on the bench using advanced lab equipment (oscilloscopes, multimeters, logic analyzers, power supplies, SMUs, spectrum analyzers, network analyzers, thermal chambers, etc.). Lead root cause analysis of complex silicon issues, collaborating closely with design, system, and test engineering teams to drive timely resolutions. Develop custom test setups, validation boards (PCB schematics and layout review), and fixtures to thoroughly test DC-DC converter performance. Mentorship & Guidance: Provide deep technical mentorship and guidance to junior and senior validation engineers on DC-DC converter principles, validation methodologies, test planning, debugging techniques, and best practices. Foster a strong technical learning environment within the team, promoting knowledge sharing and continuous improvement. Test Development & Automation: Define requirements for, and potentially contribute to, the development of automated test scripts and frameworks for efficient validation execution. Contribute to the selection, adoption, and optimization of validation tools and infrastructure to improve overall team efficiency. Cross-Functional Collaboration: Act as a key technical liaison between the Silicon Validation team and cross-functional teams including IC Design, System Design, Firmware, Product Engineering, and Application Engineering. Drive effective communication of validation findings, risks, and recommendations to various stakeholders. Quality & Compliance: Ensure all validation activities adhere to rigorous quality standards, functional safety requirements, and operational protocols (e.g., ESD, safety). Contribute to the continuous improvement of validation processes (e.g., SWIFT process adoption) and documentation standards. Required Skills & Experience 12+ years of extensive, hands-on experience in Electrical/Electronics Post-Silicon Validation, with a significant focus on DC-DC converters and power management ICs. Deep technical expertise in DC-DC converter topologies (e.g., Buck, Boost, Buck-Boost, LDOs, Gate Drivers), control schemes, and their critical performance parameters (efficiency, ripple, load transient, stability, EMI/EMC). Strong proficiency in PCB schematics, layout review, and design considerations for high-frequency, high-current power circuits. Experience with validation board design is a significant plus. Mastery of bench validation methodologies and debugging techniques. Highly skilled in using and interpreting data from lab equipment such as high-bandwidth oscilloscopes, arbitrary waveform generators, electronic loads, network analyzers, spectrum analyzers, power meters, etc. Proven ability to perform root cause analysis of complex silicon issues and drive solutions collaboratively with design teams. Experience with test planning and execution for silicon validation across various corners (PVT), operating modes, and stress conditions. Familiarity with industry-standard EDA tools for schematic/layout viewing, simulation analysis, and potentially test pattern generation (e.g., Cadence Virtuoso/Spectre, Siemens Calibre, Synopsys Verdi, etc.). Excellent communication, interpersonal, and mentorship skills. Ability to work effectively in a hybrid work environment with a strong presence in the Bengaluru lab. Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field. Why Join Our Team This is a unique opportunity to be a foundational technical leader in our growing Silicon Validation team in India. You will play a pivotal role in bringing cutting-edge DC-DC products to market, shaping our validation methodologies, and directly contributing to the technical growth of your team members. If you are passionate about power electronics, enjoy hands-on validation, and thrive in a mentorship role, we encourage you to apply. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Job Summary: Synopsys’ Generative AI Center of Excellence defines the technology strategy to advance applications of Generative AI across the company. The GenAI COE pioneers the core technologies – platforms, processes, data, and foundation models – to enable generative AI solutions, and partners with business groups and corporate functions to advance AI-focused roadmaps. We are seeking a highly skilled and experienced Staff AI Engineer to join our dynamic and innovative team. As a Sr Staff AI Engineer, you will play a critical role in designing, developing, and deploying advanced AI and machine learning solutions. You will collaborate with cross-functional teams to drive AI initiatives and contribute to the development of cutting-edge technologies that enhance our products and services. This role demands a deep understanding of generative AI algorithms, strong programming skills, and the ability to lead and mentor junior engineers. Key Responsibilities: AI/ML Solution Development: Design, develop, and deploy AI and machine learning models and algorithms to solve complex business problems. Technical Leadership: Provide technical leadership and mentorship to junior engineers and data scientists, guiding them in best practices and advanced techniques. Research & Innovation: Stay up to date with the latest advancements in AI and machine learning technologies and apply them to improve existing systems or develop new solutions. Collaboration: Work closely with product managers, software engineers, and other stakeholders to define project requirements, create technical specifications, and ensure successful implementation of AI solutions. Data Analysis & Preprocessing: Perform data analysis, data preprocessing, and feature engineering to prepare datasets for machine learning models. Model Training & Evaluation: Train, validate, and fine-tune machine learning models, ensuring they meet performance and accuracy requirements. Deployment & Monitoring: Deploy AI models into production environments, and monitor their performance, making adjustments as necessary to maintain optimal operation. Documentation: Document AI models, algorithms, and methodologies to ensure reproducibility and knowledge sharing within the team. Compliance & Ethics: Ensure AI solutions adhere to ethical guidelines, data privacy regulations, and industry standards. Qualifications: Education: Bachelor’s or Master’s degree in Computer Science, Data Science, Electrical Engineering, or a related field. PhD is a plus. Experience: Minimum of 8 years of experience in AI and machine learning, with a proven track record of deploying AI solutions in a production environment. Experience in designing and managing scalable platforms for AI/ML solutions. Technical Skills: Strong proficiency in programming languages such as Python, or C++. Extensive experience with machine learning frameworks and libraries (e.g., TensorFlow, PyTorch, scikit-learn). Strong understanding of statistical analysis, data mining, and data visualization techniques. Knowledge of cloud platforms (e.g., AWS, GCP, Azure) and containerization (e.g., Docker, Kubernetes). Familiarity with version control systems (e.g., Git) and software development methodologies (e.g., Agile, Scrum). Soft Skills: Excellent problem-solving and analytical skills. Strong communication and interpersonal skills. Ability to work independently and as part of a team. Proven leadership and mentorship abilities. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity : Synopsys considers all applicants for employment without regard to race, color, religion, sex, gender preference, national origin, age, disability, or status as a Covered Veteran in accordance with federal law.

Greetings From TCS !!! Role: Physical Design Location: Bangalore Experience Range: 5 + Years Must-Have: Should have in depth experience in Floor-planning, CTS, Power routing, place and route, timing closure, DRC and LVS Should have worked on the latest technology nodes (14nm or 2nm to 5nm) Must have experience in Static timing analysis Must have experience in Physical verification and appropriate fixes Should have worked on block level and top-level designs Strong problem-solving skills and communication skills Ability to mentor and work closely with junior engineers Tools: Synopsys and Cadence Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation. With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail. You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions. Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects. You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting. What You’ll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability. Collaborating with cross-functional teams to define and develop SOC architecture and specifications. Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements. Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives. Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies. Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation. Job Description and Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG). At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design. The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors. Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC. Understand the design/architecture and develop timing constraints for synthesis and timing. Run preliminary synthesis to ensure that the design can be synthesized as intended. Run formality to ensure equivalence of RTL and gates. Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer. Required B.E/B. Tech/M.E/M. Tech in electronics with 4-9 years’ experience in RTL Design and Verification. Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC. Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing. Good conceptual understanding of RTL rule checks. Hands-on experience on synthesis and timing constraints development. Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc.) will be preferred. The Team You’ll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions. Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements. We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Responsibilities: * Ensure compliance with industry standards and customer requirements. * Design DFT solutions using ATPG, MBIST, Scan Insertion, JTAG tools.

Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world. Job Description We are seeking a highly skilled & experienced engineer with SDC/RDC/CDC skills to join our Flows & Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope Of Responsibilities: As part of the Design Enablement team of the organization, you need to collaborate with design and verification teams to implement robust CDC/RDC solutions into organization standard flows You will work with EDA Vendors to proactively review latest tools and flows offerings in this domain & evaluate latest offerings and benchmark with organization used tools, flows, and methodologies You will be an actor of change for deploying new tools & methodologies across the organization Qualifications Specific skills & knowledge : Bachelor or Master or Ph.D. in Electronics Engineering and specialization in VLSI domain 10+ Years of Experience Expertise in RTL Level checks understanding Expertise in CDC verification tools like Mentor Graphics Questa CDC and Synopsys SpyGlass CDC Expertise in utilizing tools like Synopsys Prime Time, Cadence Tempus, and Mentor Graphics for timing analysis Expertise in utilizing RDC verification tools and methodologies to identify and resolve reset-related issues. Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can – do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. I'm interested Renesas is an embedded semiconductor solution provider driven by its Purpose ‘ To Make Our Lives Easier .’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘ To Make Our Lives Easier .’ At Renesas, You Can: Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Let’s Shape the Future together. Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement. Show more Show less

Role Description Role Proficiency: Independently execute mid sized customer projects in any field of VLSI Frontend Backend or Analog design with minimal supervision Outcomes Work as an individual contributor owning any one task of RTL Design/Module. Provide support and guidance to engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks/Signoff etc. Anticipate diagnose and resolve problems; coordinating as necessary with cross-functional teams On time quality delivery approved by the project manager and client Automate the design tasks flows and write scripts to generate reports Come up with novel ideas to reduce design cycle time and cost accepted by UST Manager and client Measures Of Outcomes Quality –verified using relevant metrics by UST Manager / Client Manager Timely delivery - verified using relevant metrics by UST Manager / Client Manager Reduction in cycle time cost using innovative approaches Number of papers published Number of patents filed Number of mandatory trainings attended adhering to training goals Outputs Expected Quality of the deliverables: Ensure zero bugs are present in the design / circuit design. Clean delivery of the design/module in-terms of ease in integration at the top level Meeting functional spec / design guidelines 100% without any deviation or limitation Documentation of tasks and work performed Timely Delivery Ensure project timelines as laid out by the client or program manager are met Meet intermediate tasks delivery for other team members to progress Calling out for help and support in the case of delay in tasks delivery New Skills Development Participate in training – skilling someone and also getting skilled in newer technologies Take up new areas of project development learn on the job and deliver Team Work Participation in team work and supporting team members at the time of need Able to take up additional tasks in-case of any team member(s) not available Able to hand hold junior team members to explain the project tasks and support to deliver Work dedication to go beyond the call of duty to ensure deadlines and quality are met Innovation & Creativity Approach towards repeated work by automating tasks to save design cycle time Participation on technical discussion training forum white paper etc Skill Examples Languages and Programming skills:a. System Verilog Verilog VHDL UVM C C++ Assembly Perl TCL/TK Makefile Spice EDA Tools: a. Cadence Synopsys Mentor tool sets (one or more)b. Simulators Lint CDC/RDC DC/RTL-C ICC/Innovus/Olympus ETS/TK/FS PT/Tempus Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture Functional Spec Test Plan Verificationb. Bus Protocol AHB/AXI/PCIe/USB/Ethernet/SPI/I2C Microprocessor architecturec. Strong Physical Design / Circuit Design / Analog Layout Knowledged. Synthesis DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Soft / Hard / Mixed Signal IP Design Processor Hardening FPGA Design Technology: CMOS FinFet FDSOI - 28nm / 22nm / 16ff / 10nm and below Strong communication skills and ability to interact with team members and clients equally Strong analytical reasoning and problem-solving skills with attention to details Ability to understand the standard specs and functional documents Ability to deliver the tasks on-time in a quality fashion per quality guidelines and GANTT Well versed with the available EDA tools and able to use them efficiently Required technical skills and prior design knowledge to execute the assigned tasks Ability to learn new skills in-case required technical skills are not present at a level needed to execute the project Knowledge Examples Knowledge of project(s) in any of the design by executing – RTL Design / Verification / DFT / Physical Design / STA / PV / Circuit Design / Analog Layout etc. Understanding of the design flow and methodologies used in the designing Understand the assigned tasks and have sufficient knowledge to execute the project tasks assigned by the client / manager as per known skills Additional Comments JD:- Asic RTL Design: Digital Design Knowledge RTL coding – System Verilog/Verilog/VHDL SoC integration experience is preferred CDC, Linting knowledge Synthesis, STA, DFT, Layout reviews experience Skills Rtl Coding,SOC integration,CDC Show more Show less

Category Engineering Hire Type Employee Job ID 10606 Remote Eligible No Date Posted 15/06/2025 Job Summary: Synopsys’ Generative AI Center of Excellence defines the technology strategy to advance applications of Generative AI across the company. The GenAI COE pioneers the core technologies – platforms, processes, data, and foundation models – to enable generative AI solutions, and partners with business groups and corporate functions to advance AI-focused roadmaps. We are seeking a highly skilled and experienced Staff AI Engineer to join our dynamic and innovative team. As a Sr Staff AI Engineer, you will play a critical role in designing, developing, and deploying advanced AI and machine learning solutions. You will collaborate with cross-functional teams to drive AI initiatives and contribute to the development of cutting-edge technologies that enhance our products and services. This role demands a deep understanding of generative AI algorithms, strong programming skills, and the ability to lead and mentor junior engineers. Key Responsibilities: AI/ML Solution Development: Design, develop, and deploy AI and machine learning models and algorithms to solve complex business problems. Technical Leadership: Provide technical leadership and mentorship to junior engineers and data scientists, guiding them in best practices and advanced techniques. Research & Innovation: Stay up to date with the latest advancements in AI and machine learning technologies and them to improve existing systems or develop new solutions. Collaboration: Work closely with product managers, software engineers, and other stakeholders to define project requirements, create technical specifications, and ensure successful implementation of AI solutions. Data Analysis & Preprocessing: Perform data analysis, data preprocessing, and feature engineering to prepare datasets for machine learning models. Model Training & Evaluation: Train, validate, and fine-tune machine learning models, ensuring they meet performance and accuracy requirements. Deployment & Monitoring: Deploy AI models into production environments, and monitor their performance, making adjustments as necessary to maintain optimal operation. Documentation: Document AI models, algorithms, and methodologies to ensure reproducibility and knowledge sharing within the team. Compliance & Ethics: Ensure AI solutions adhere to ethical guidelines, data privacy regulations, and industry standards. Qualifications: Education: Bachelor’s or Master’s degree in Computer Science, Data Science, Electrical Engineering, or a related field. PhD is a plus. Experience: Minimum of 8 years of experience in AI and machine learning, with a proven track record of deploying AI solutions in a production environment. Experience in designing and managing scalable platforms for AI/ML solutions. Technical Skills: Strong proficiency in programming languages such as Python, or C++. Extensive experience with machine learning frameworks and libraries (e.g., TensorFlow, PyTorch, scikit-learn). Strong understanding of statistical analysis, data mining, and data visualization techniques. Knowledge of cloud platforms (e.g., AWS, GCP, Azure) and containerization (e.g., Docker, Kubernetes). Familiarity with version control systems (e.g., Git) and software development methodologies (e.g., Agile, Scrum). Soft Skills: Excellent problem-solving and analytical skills. Strong communication and interpersonal skills. Ability to work independently and as part of a team. Proven leadership and mentorship abilities. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity : Synopsys considers all applicants for employment without regard to race, color, religion, sex, gender preference, national origin, age, disability, or status as a Covered Veteran in accordance with federal law. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Overview: WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Responsibilities: SE NIOR SILICON DESIGN ENGINEER THE ROLE : We are looking for an adaptive, self-motivative Implementation & DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. This team encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Develop/Maintain timing constraints in functional and DFT modes both at block and full chip level Work with Design and Physical Design teams to understand the violating paths and update constraints or provide guidance to Physical Design Engineers in solving DFT timing challenges Maintain or improve DFT clocking structures and IO budgets Create environment for validation of DFT structure consistency across design cycle and also check all possible ways to hit highest possible scan frequency targets Provide technical support to other teams PREFERRED EXPERIENCE: Good at Perl/TCL Scripting Familiarity with Synopsys SDC formats, Constraints analysis tools, constraints consistency checks tools Experience with analyzing and debugging post layout timing is a plus ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Qualifications: Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Job Title Senior ML Engineer at TrueFoundry (Fully remote) Company Details TrueFoundry is an enterprise-grade AI/ML platform that accelerates the development, deployment, and scaling of GenAI and ML applications with security, cost efficiency, and cross-cloud flexibility. Trusted by companies like NVIDIA, CVS, Merck, Synopsys, and many more, we’re helping enterprises unlock the full value of AI faster. Job Roles & Responsibilities - Develop scalable ML models and deploy them using Python. - Collaborate with Data Scientists to transform insights into actionable production-grade models. - Implement best DevOps practices to ensure rapid deployment of monitored model endpoints. - Optimize post-model pipelines using TrueFoundry's framework for efficiency. - Lead troubleshooting, debugging, and continuous improvement of ML systems. - Stay updated with the latest AI/ML technologies and integrate them where necessary. - Mentor junior engineers and contribute to team growth. - Work closely with cross-functional teams to align AI solutions with company goals. Cultural Expectations - Embrace fast-paced, iterative development and deployment of ML models - Communicate effectively within multidisciplinary teams - Display innovation and creativity in problem-solving - Align with a culture emphasizing DevOps best practices - Exhibit professionalism and reliability in delivering upon project commitments Hiring Process R1: Profile Shortlisting R2: Tech interview-DSA interview R3: Tech interview-fine-tuning interview R4: Tech interview-ML deployment interview (model deployment) R5: Culture fit Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and detail-oriented accounting professional with a passion for ensuring compliance and accuracy in financial reporting. You thrive in dynamic environments and are adept at managing multiple tasks simultaneously. Your strong understanding of secretarial compliance, financial statements preparation, and GST regulations makes you an invaluable asset to any team. You possess exceptional interpersonal and communication skills, allowing you to effectively collaborate with various departments and stakeholders. With a solid background in SAP and MS Office, you bring a high level of technical expertise and a commitment to maintaining the highest standards of corporate governance and financial integrity. What You’ll Be Doing: Organizing and facilitating Board meetings, shareholders meetings, and Committee meetings, including preparation of agendas, drafting notices, and minutes. Overseeing the company’s compliance with legal and regulatory requirements, updating and managing statutory books, and record-keeping. Handling ROC filings, FEMA compliances, M&A documentation, and corporate restructuring requirements. Advising the board on governance matters to ensure adherence to the highest standards of corporate governance. Preparing and accounting monthly accruals of consultant fees, including forecasts. Managing GL accounting as per Synopsys accounting policies/IGAAP and performing GL reconciliations using the Blackline tool. Processing and accounting for tax payments such as advance tax, self-assessment tax, GST, and TDS. Assisting in the preparation of financial statements (stand-alone and consolidated) as per Indian accounting standards. Handling GST registration, amendments, closures, and issuing of GST invoices and documents. Preparing and reviewing GST returns, ITC registers, and 2A reconciliations, and managing GST audits and litigations. The Impact You Will Have: Ensuring the company’s compliance with legal and regulatory standards, thereby protecting its reputation and minimizing risks. Providing accurate and timely financial reporting to support strategic decision-making processes. Enhancing the efficiency and effectiveness of financial operations through meticulous accounting practices. Contributing to the company’s financial health by managing tax liabilities and ensuring compliance with GST regulations. Supporting corporate governance by advising the board on key governance matters and maintaining statutory records. Facilitating smooth financial audits and ensuring transparent financial disclosures. What You’ll Need: 2+ years of work experience in service companies. Qualified Company Secretary with working knowledge of GST compliances. 2+ years of working experience with SAP (FI) is desirable. Strong understanding of the Companies Act, GST rules & regulations, and Indian accounting standards. Proficiency in MS Office, especially Excel, Word, and PowerPoint. Who You Are: Detail-oriented and able to handle multiple tasks simultaneously. Possess excellent presentation skills. Have strong interpersonal, written, and verbal communication skills. Ability to blend with team dynamics and work collaboratively. Maintain confidentiality of sensitive information. The Team You’ll Be A Part Of: You will join a dedicated and dynamic finance team that focuses on maintaining the highest standards of financial integrity and compliance. Our team collaborates closely with various departments to ensure accurate financial reporting and effective governance practices. We value teamwork, continuous learning, and the drive to innovate and improve our financial processes. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Senior Analog Design Engineer Senior SERDES Engineer Senior Mixed-Signal Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog Design Engineer with a passion for developing high-speed analog integrated circuits. You thrive in a collaborative environment and enjoy working with cross-functional teams to achieve design success. You possess a deep understanding of transistor-level circuit design and have hands-on experience with SERDES IP development. Your expertise in CMOS design fundamentals and familiarity with SERDES sub-circuits, such as TX, RX, adaptive equalizers, PLL, DLL, ADC, BGR, and regulators, makes you an ideal candidate for this role. You are aware of ESD issues and have a sound knowledge of custom digital design, design for reliability, and layout effects. You are proficient in using custom design tools and have experience with scripting for post-processing simulation results. Your excellent communication and documentation skills enable you to effectively convey complex technical information to various stakeholders. What You’ll Be Doing: Designing, developing, troubleshooting, and debugging multi-Gb/s SERDES IP. Working from SerDes standards to block specifications to identify potential circuit architectures and successful design strategies. Collaborating with a cross-functional design team of analog and digital designers from diverse backgrounds. Utilizing a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team. Ensuring designs meet performance, reliability, and manufacturability requirements. Documenting design processes and results for knowledge sharing and future reference. The Impact You Will Have: Contributing to the development of cutting-edge high-speed analog integrated circuits. Enhancing the performance and reliability of SERDES IP used in various high-tech applications. Driving innovation in analog and mixed-signal design methodologies. Collaborating with a talented team to deliver world-class design solutions. Supporting the growth and success of Synopsys' analog and mixed-signal R&D initiatives. Ensuring the seamless integration of analog and digital components in complex systems. What You’ll Need: In-depth familiarity with transistor-level circuit design and CMOS design fundamentals. Exposure to SERDES sub-circuits (e.g., TX, RX, adaptive equalizers, PLL, DLL, ADC, BGR, regulators). Awareness of ESD issues and circuit techniques for mitigation. Familiarity with custom digital design for high-speed logic paths. Knowledge of design for reliability (e.g., EM, IR, aging) and layout effects (e.g., matching, reliability, proximity effects). Proficiency with custom design tools such as Cadence, HSPICE, HSIM, and Ultrasim. Experience with scripting languages for post-processing simulation results (e.g., TCL, PERL, MATLAB). Understanding of system-level budgeting for jitter, amplitude, noise, etc. Awareness of signal integrity issues, including packaging effects, board parasitics, crosstalk, and noise. Who You Are: A collaborative team player who excels in a cross-functional environment. A problem solver with strong analytical skills and attention to detail. An effective communicator with excellent documentation skills. A self-motivated individual with a passion for continuous learning and innovation. Adaptable and able to thrive in a fast-paced, dynamic work environment. The Team You’ll Be A Part Of: You will be part of a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits. Our team consists of talented analog and digital designers from diverse backgrounds, working collaboratively to achieve design excellence. We leverage a best-in-class environment with a comprehensive suite of IC design tools, supported by an experienced software/CAD team, to drive innovation and deliver cutting-edge solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Job Description & Requirements At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Solution IP group in Boxborough, Massachusetts is ramping up high-performance computing (HPC) demand, therefore we are looking for an enthusiastic engineer to join our Analog & Mixed-Signal Circuit Design & Methodology team. You will be working with an immensely creative cross functional team of analog and mixed signal circuit designers from a wide variety of backgrounds on design and methodology. This position requires hands on experience and working knowledge of mixed signal circuit design best practices, an understanding of silicon IP release requirements, solid scripting skills to automate flows and the ability to drive and train engineers to become experts with new methodologies. Job Responsibilities: Review SerDes standards and architecture documents to develop analog sub-block specifications. Identify and refine circuit implementations to achieve optimal power, area and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitic, device stress, and process variation. Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits. Present simulation data for peer and customer review. Mentor and Review the progress of junior engineers. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Required Qualifications: Bachelor with 4 years' experience or MSEE (or PhD) with 2 years' experience in Electrical Engineering, Computer Engineering, or similar technical field In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits for the TX, RX and Clock paths within a SerDes Detailed design experience with several of the following SerDes sub-circuits: receive equalizers, data samplers, voltage/current-mode drivers, serializers, deserializers, voltage-controlled oscillator, phase interpolator, delay-locked loop, phase-locked loop, bandgap reference, ADC, DAC Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects. Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.). Experience with EDA tools for schematic entry, physical layout, and design verification. High proficiency with spice simulators including HSPICE, Finesim and XA Knowledgeable in Verilog-A and/or System-Verilog for analog behavioral modeling and simulation-control/data-capture. Plus Qualifications: Ability to provide automation for rapid and dynamic design needs is highly sought-after Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart Experienced in STAR or similar extractor to debug extraction issues Extensive programming skills in languages such as Python, Perl, TCL and C/C++ Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a meticulous and innovative Technical Writer with a passion for technology and a knack for making complex concepts accessible. With 2-4 years of experience in the software or hardware industry, you have a thorough understanding of technical writing processes and can translate technical jargon into clear, user-friendly documentation. You are adept at working autonomously and flexibly with global teams, and you excel in communicating with non-native English speakers. Your ability to prioritize tasks and foster teamwork is second to none, and you thrive in dynamic environments where you can take ownership of projects and drive them to completion. Your experience with semiconductor microprocessor industries or software tools for microprocessors (compilers/debuggers/SDKs) makes you an ideal fit for our team. Additionally, you bring working knowledge of DITA, Adobe FrameMaker, ReStructured Text (ReST)/Markdown, Sphinx/LaTeX infrastructure, JSON/HTML, and GitLab/GitHub, with a preference for those who understand Python code and have experience with defect tracking systems like Jira. What You’ll Be Doing: Gathering information using prototype software, technical specifications, feature demos, and by working with developers and applications engineers. Planning, writing, updating, and delivering user documentation products including release notes, user guides, reference manuals, application notes, and tutorials. Interacting with product teams and other technical writers to ensure comprehensive and accurate documentation. Evaluating the information needs of users and developing creative solutions to address these needs. Adapting materials written by non-native English speakers to ensure clarity and readability. Taking ownership of documentation projects and driving them to completion with minimal supervision. The Impact You Will Have: Enhancing the usability and adoption of Synopsys' ARC® portfolio by providing clear and comprehensive documentation. Supporting over 275 customers worldwide who ship more than 2.5 billion ARC-based chips annually. Contributing to the development of high-performance silicon chips and software content. Facilitating the integration of more capabilities into an SoC, meeting unique performance, power, and size requirements of target applications. Reducing the time-to-market and risk for differentiated products. Enabling engineers and scientists to effectively use and understand our tools and technologies. What You’ll Need: 2-4 years of technical writing experience in the software or hardware industry. Ability to understand and write complex technical concepts for a technical audience. Thorough understanding of technical writing processes. Experience in developer documentation and DevOps. Working knowledge of DITA, Adobe FrameMaker, ReStructured Text (ReST)/Markdown, Sphinx/LaTeX infrastructure, and GitLab/GitHub. Who You Are: You are a self-motivated individual with a strong attention to detail and the ability to work both independently and collaboratively. You possess excellent communication skills and can effectively interact with global teams and non-native English speakers. Your ability to prioritize tasks, adapt to changing requirements, and foster teamwork makes you an invaluable asset to our team. You are passionate about technology and continuously seek to enhance your skills and knowledge in the field. The Team You’ll Be A Part Of: You will join a dynamic team focused on the ARC® portfolio, which includes 32-/64-bit CPU and DSP cores, subsystems, and software development tools. Our team collaborates closely with leading industry vendors to support a broad spectrum of 3rd-party tools, operating systems, and middleware. We are dedicated to providing comprehensive and user-friendly documentation to our global customer base. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less