We are looking for professionals with hands-on expertise in: ✔ RTL design from scratch (Verilog) ✔ SoC integration and logic optimization ✔ Synthesis using Vivado, Synopsys DC, or Cadence Genesis ✔ STA, CDC, Linting, and constraints development ✔ Protocols: AXI, AHB, APB, TileLink, PCIe, DDR ✔ Collaboration with verification and physical design teams Mandatory Skills for RTL Design Engineer: Strong RTL design skills using Verilog Experience in SoC integration Proficiency in RTL synthesis tools such as Vivado, Synopsys DC, or Cadence Genesis Expertise in Static Timing Analysis (STA), Clock Domain Crossing (CDC), and Linting Ability to create and update constraint files Working knowledge of protocols like AXI, AHB, APB, TileLink, PCIe, DDR Collaborative experience with verification and physical design teams Bonus: Experience with Tapout flow is an added advantage. This Job is also avalabie in these Locations. Locations: Gurgaon | Bangalore | Pune Job Types: Full-time, Permanent Pay: ₹1,300,000.00 - ₹1,700,000.00 per year Benefits: Flexible schedule Work Location: In person

Description Invent the future with us. Recognized by Fast Company’s 2023 100 Best Workplaces for Innovators List, Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient, sustainable cloud computing. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. Join us at Ampere and work alongside a passionate and growing team — we’d love to have you apply. Come invent the future with us. About The Role Our Physical Design Implementation Engineer will work with multi-functional global teams to implement Partition/Block level Synthesis, Floorplan, Place and Route, Timing closure, IR/EM and DRC/LVS closure for our next generation highly complex 5nm/3nm/advanced-node Server class Processor products. PD work at Ampere is interesting, challenging, and will expand your professional breadth. We like to bring out the best in people, teach each other, and produce products that have value in the market. In this role, you will be at the forefront of our groundbreaking AI compute solution. Our products combine high-performance general-purpose CPUs with AI capabilities, offering a compelling combination of efficiency and market reach. This revolutionary product is poised to deliver superior performance while consuming significantly less power. What You’ll Achieve As a member of the PD Team, you will plan and implement a significant portion of the Chip Layout partnering with design and DFT engineering peers. You will create solutions to meet challenging frequency, power, area, clocking and design partition goals. You’ll get to work with custom and tool-driven CTS and physical design integration methodologies. About You B.Tech in Electronics Engineering or Computer Engineering with 3-5 years of semiconductor experience, or M.Tech with 2-4 years of experience. Good knowledge of EDA tools from Synopsys or Cadence or Mentor required. In particular experience with PTSI, Innovus, Calibre, StarRC, and Conformal LEC is essential. Good knowledge of VLSI process and device characteristics, to make optimal trade-off between performance and power. Good understanding of static timing analysis (STA), EM/IR and sign-off flows. Expertise in physical design of high frequency chips with emphasis on successful timing closure. Good understanding of physical design verification. Experience in implementation and design closure with advanced process nodes like 5nm, 3nm etc. Strong Hands-on Experience With Floor planning, place & route, power and clock distribution, pin placement and timing analysis. Timing convergence using high speed design techniques with signal integrity & EM/IR. Good scripting skills (perl, python, tcl). Self-driven individual and an excellent team player experienced in working with remote teams. Must have good communication skills and the ability and desire to work as a team. What We’ll Offer At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits Highlights Include Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process. Ampere is an inclusive and equal opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state or local law. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and dynamic professional with over 15 years of experience in IP design or management, particularly in foundational IP/Interface IP across multiple process technologies up to 3nm. Your background includes significant experience in IP program management, working with cross-functional teams, and engaging with external SOC customers. You excel in presenting status updates to senior management and possess knowledge in SOC design and architecture, product qualification, signal and power integrity, and package design. You hold a BS or MS degree in Electrical or Computer Engineering. What You’ll Be Doing: Leading and managing IP design and development projects from initiation through to delivery. Coordinating with cross-functional teams to ensure project milestones and deliverables are met on time. Engaging with external SOC customers to understand their requirements and ensure their needs are met. Presenting project status updates and reports to senior management and stakeholders. Ensuring adherence to quality standards and regulatory requirements throughout the project lifecycle. Driving continuous improvement initiatives within the program management processes. The Impact You Will Have: Ensuring the successful delivery of high-quality IP products that meet customer expectations. Contributing to the strategic goals of Synopsys by effectively managing complex projects. Enhancing cross-functional collaboration and communication within the organization. Driving innovation in IP design and development through effective program management. Building strong relationships with external SOC customers, enhancing customer satisfaction and loyalty. Improving the efficiency and effectiveness of program management processes and practices. What You’ll Need: 15+ years of experience in IP design or management in multiple process technologies up to 3nm. Experience in IP program management or working with cross-functional teams. Experience in working with external SOC customers and presenting to senior management. Knowledge of SOC design and architecture, product qualification, signal and power integrity, and package design. BS or MS degree in Electrical or Computer Engineering. Who You Are: You are a strategic thinker with excellent problem-solving skills and the ability to manage complex projects effectively. You possess strong communication and interpersonal skills, enabling you to collaborate with diverse teams and engage with external customers. You are detail-oriented and committed to delivering high-quality results. You thrive in a fast-paced, dynamic environment and are passionate about driving technological innovation. The Team You’ll Be A Part Of: You will be part of a highly skilled and collaborative team focused on IP design and development. The team is dedicated to delivering innovative solutions that meet the needs of our customers and drive the success of Synopsys. You will work closely with cross-functional teams, including engineering, quality assurance, and customer support, to ensure the successful delivery of our projects. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

JOB Description: WE are At Synopsys, we pioneer innovations that shape our connected world. Our technology powers the Era of Pervasive Intelligence, from self-driving cars to AI. As leaders in EDA tools, chip design, verification, and IP integration, we enable the creation of high-performance silicon chips and software. Join us to drive the future with continuous technological innovation. About You: You are a talented and dedicated Senior Layout Design Engineer specializing in analog and mixed-signal (A&MS) integrated circuits. You excel in collaborative environments, working seamlessly with cross-functional teams to drive technological innovation. Your meticulous attention to detail and unwavering commitment to quality are hallmarks of your work. You are constantly striving to enhance layout design methodologies and best practices, utilizing your profound knowledge of semiconductor process technologies and industry-standard EDA tools. Your exceptional problem-solving abilities, effective communication, and strong teamwork make you an indispensable asset. What You’ll Be Doing: Develop and implement layout designs for A&MS integrated circuits. Optimize layouts using industry-standard EDA tools. Perform physical verification and design rule checks. Participate in Layout reviews and provide feedback. Collaborate with circuit designers on specifications and constraints. Enhance layout design methodologies and best practices. Stay updated with industry trends in A&MS layout design. The Impact You Will Have: Ensure high quality and performance of A&MS integrated circuits. Drive innovation with cutting-edge layout designs. Improve manufacturability and reliability through meticulous design. Contribute valuable feedback during design reviews. Foster continuous improvement in design methodologies. Mentor junior engineers by sharing your expertise. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an innovative and analytical thinker with a passion for technology and a drive to solve complex engineering challenges. You thrive in a collaborative environment, working alongside a high-caliber team of engineers to develop technical solutions that push the boundaries of AI-driven optimization. You possess a strong foundation in computer science or electronics, with a deep understanding of C/C++ and Linux. Your excellent communication skills enable you to effectively convey ideas and work seamlessly with product engineers to define and solve problems. You are committed to continuous improvement, always seeking ways to enhance performance and quality in your work. Your ability to debug issues, optimize algorithms, and develop new features makes you an invaluable asset to any engineering team. What You’ll Be Doing: Developing SignOff ECO optimization algorithms and heuristics. Debugging issues related to design loading and timing/power optimization. Striving for continuous improvements in QoR to achieve faster timing convergence with optimal power overhead. Collaborating with a team of engineers to develop technical solutions to complex problems. Communicating with product engineers to understand and define problem scope. Ensuring strict performance and quality requirements are met. The Impact You Will Have: Enhancing the performance and efficiency of PrimeClosure, the industry's first AI-driven signoff ECO solution. Contributing to the development of cutting-edge algorithms that optimize timing and power in chip design. Improving the overall quality and reliability of our products through rigorous debugging and testing. Driving innovation and continuous improvement in our engineering processes. Supporting customer success by resolving issues and implementing new features based on their feedback. Helping shape the future of AI-driven optimization in the semiconductor industry. What You’ll Need: A degree in Computer Science or Electronics. 5+ years of experience in relevant field Strong analytical and problem-solving skills. Proficiency in C/C++ and Linux. Excellent communication and teamwork abilities. A passion for technology and innovation. Who You Are: A collaborative team player who thrives in a dynamic and innovative environment. A proactive and self-motivated individual with a strong attention to detail. An excellent communicator who can articulate complex ideas clearly and effectively. A creative thinker who is always looking for new ways to solve problems and improve processes. A dedicated professional committed to delivering high-quality work. The Team You’ll Be A Part Of: You will be part of the PrimeClosure R&D team, responsible for developing and maintaining the industry's first AI-driven signoff ECO solution, PrimeClosure. This team is dedicated to pushing the boundaries of technology and innovation, working collaboratively to develop cutting-edge solutions that address complex engineering challenges. Together, you will strive for continuous improvements in performance and quality, ultimately shaping the future of AI-driven optimization in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 15-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less

🔹 Experience : 7–12+ years Key Skills Required : · RTL-to-FPGA conversion (partitioning, synthesis, PnR) · Hands-on experience with HAPS platforms · Tools: Synopsys ProtoCompiler, Xilinx Vivado · Debugging FPGA benches (e.g., FTESTS) · Strong understanding of timing closure, CDC, FPGA constraints Show more Show less

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Responsibilities Keysight R&D centre in Gurgaon/Bangalore, India needs a Software QA R&D Engineer for EDA Software testing and quality assurance on Keysight EDA software. The Software QA Engineer will test Keysight software solutions using the Agile Software Development Model. The engineer will use a wide array of test techniques, tools, and methodologies to perform a quality check on EDA products enabling Keysight's RF/Microwave, HSD, Power Electronics solutions Key Responsibilities You will be part of the QA Verification engineering team responsible for designing, developing and ensuring quality standards on a team collaboration product. You should have experience with the latest "best practices" in both Manual QA and QA Automation. Knowledge of Electronic Design Automation (EDA) tools and End-to-End Design flows QA testing. Test Plan Development: Develop, execute, and maintain test plans for functionalities in our EDA tools. Software Testing & Verification: Develop, and validate design flows and integration with other EDA tools, Automation: Design and implement automated test cases using scripting languages like Python or Perl for physical verification workflows, including CI/CD pipelines. Bug Tracking & Documentation: Track and document issues using Jira and collaborate with developers to ensure timely resolution. Contribute to comprehensive documentation using Confluence for project collaboration and knowledge sharing. Version Control: Manage and integrate testing frameworks with Git for source control, ensuring robust testing processes and traceability for changes. CI/CD and Build Automation: Work with continuous integration tools like Jenkins to automate build and testing processes for frequent and efficient validation of tool updates. Defect Identification & Debugging: Identify, document, and track defects inflows, performing detailed debugging to work with development teams in resolving issues. Customer Support: Reproduce and resolve customer-reported issues related to EDA tools, ensuring robust solutions and enhancements to product quality. Cross-functional Collaboration: Collaborate with foundry partners to validate rule decks and keep up to date with new physical verification methodologies, supporting evolving design processes and constraints. Qualifications Bachelor's or master’s degree in Electronics and Telecommunication (ECE), or an Equivalent. 8+plus years of experience in EDA software QA validation with good knowledge in RF Microwave and Physical Verification areas with experience in creating end-to-end designs within the EDA domain. Experience working with Assura, PVS or Calibre e.g. Cadence, Siemens Mentor, Synopsys, Ansys etc. in IC/Board/ Module design flow. Proficient in developing DRC/ LVS/ ERC rules for IC/ Module/ PCB applications using one/ more: Cadence, Mentor, Synopsys, Ansys etc. tools. Physical Verification QA is a desired experience. PDK Quality Assurance engineers with Physical Verification experience may also apply Strong experience in scripting languages like Python for automation of testing workflows. Solid understanding of electronics concepts and software testing principles and methodologies Automated testing (Google test and pytest); Organized and able to track status. Good in scripting languages like Python for automation of testing workflows. Software Build (Also Jenkins build) and Test on Windows and Linux operating systems. Cmake, Python scripting & Source code management systems (git). Experience with automation tools like Jenkins, and familiarity with CI/CD pipelines for testing and build automation. Strong knowledge of Jira for issue tracking and Confluence for project collaboration. Expertise with version control systems like Git for maintaining and integrating test cases. Excellent analytical and problem-solving skills, with a keen attention to detail. Ability to work effectively in a fast-paced, dynamic environment with tight deadlines. Strong communication and interpersonal skills, with the ability to collaborate effectively with cross-functional teams. Proactive attitude towards learning and self-improvement, with a passion for software quality and customer satisfaction. Show more Show less

Lead ASIC Digital Design Verification / Full Chip & IP Verification We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and detail-oriented verification engineer with a passion for ensuring the functionality and reliability of advanced semiconductor technologies. You possess a strong background in digital verification and have a keen understanding of analog and mixed-signal (AMS) verification flows. With 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development, you bring expertise in areas such as Digital Verification, AMS Verification with Verilog A, and RNM (Real Number Modeling). You thrive in a collaborative environment, working seamlessly with cross-functional teams to achieve top-level integration and verification goals. You are committed to continuous learning and eager to take on technical leadership roles, guiding teams to intercept TQV and other swim lanes for top-level integrations. Your knowledge of System Verilog, foundry PDKs, and SOC Design flow sets you apart, and you are ready to contribute to the success of Synopsys' Sensor IP business unit. What You’ll Be Doing: Leading the digital verification flow for PVT Sensor Digital Verification. Setting up and managing AMS Verification and front-end Integration for MSIPs. Developing and supporting next-generation analog, digital, and mixed-signal IPs. Ensuring all blocks are verified for behavioral and functionality from top-level integration. Collaborating with a team to intercept TQV and other swim lanes for top-level integrations. Implementing mixed-mode simulations with significant improvements in execution time. The Impact You Will Have: Enhancing the reliability and performance of semiconductor lifecycle management solutions. Accelerating the integration of intelligent in-chip sensors and analytics capabilities. Optimizing performance, power, area, schedule, and yield for cutting-edge technology products. Reducing risk and time-to-market for differentiated products. Contributing to the development of Synopsys' next-generation analog, digital, and mixed-signal IPs. Supporting the growth and success of Synopsys' Sensor IP business unit. What You’ll Need: BS or MS degree in Electrical Engineering, Computer Science, or Computer Engineering. 4-8 years of experience in design and verification for leading-edge Digital SOC chip design and IP development. Expertise in Digital Verification and/or AMS Verification with Verilog A and RNM. Proficiency in System Verilog and RNM (Real Number Modeling). Understanding of latest foundry PDKs and their usage in FE & BE flows. Who You Are: A detail-oriented and highly motivated verification engineer. A collaborative team player with excellent communication skills. A continuous learner eager to stay updated with industry trends and technologies. A leader capable of guiding and mentoring teams to achieve verification goals. A problem-solver with strong analytical and debugging skills. The Team You’ll Be A Part Of: You will be a key member of Synopsys' rapidly expanding Sensor IP business unit, working with a team of experts dedicated to developing and verifying next-generation analog, digital, and mixed-signal IPs. The team focuses on integrating intelligent in-chip sensors and analytics capabilities to enhance semiconductor lifecycle management solutions. Together, you will contribute to the success of Synopsys' innovative technology products, driving the future of the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated professional with a strong background in analog and mixed-signal (A&MS) layout design. You thrive in a collaborative environment and possess a keen eye for detail and design integrity. Your technical expertise in using industry-standard EDA tools, coupled with your problem-solving abilities, makes you a valuable asset to any team. You have a deep understanding of semiconductor process technologies and their impact on layout design, and you are always eager to stay updated with the latest industry trends and advancements. With exceptional communication and interpersonal skills, you work effectively in team-oriented environments and contribute positively to the collective success. What You’ll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Enhance the reliability and performance of our PVT sensor IPs through meticulous layout design. Ensure manufacturability and integrity of designs, avoiding costly errors in production. Contribute to the development of cutting-edge technologies in the semiconductor industry. Support the continuous improvement of design methodologies and best practices. Facilitate the integration of our IPs into SOC subsystems, aiding in the creation of high-performance silicon chips. Drive the technological innovations that keep Synopsys at the forefront of the industry. What You’ll Need: Bachelor’s or master’s degree in electrical engineering or a related field. 3+ years of experience in A&MS layout design for integrated circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Who You Are: An excellent problem-solver with systematic skills. A team player who works effectively in a collaborative environment. Detail-oriented with a strong focus on design integrity and quality. A proactive learner who stays updated with industry trends. An effective communicator with strong interpersonal skills. The Team You’ll Be A Part Of: You will be part of the rapidly expanding PVT IP group, which focuses on developing custom layout designs for Process, Voltage, Temperature, Current, and Droop sensors. Our team is dedicated to creating high-quality IPs that are integral to the Silicon lifecycle monitoring, ensuring the success and reliability of complex SOC subsystems. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: ASIC Design Engineer Digital Design Engineer Senior ASIC Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. PVT Sensor IP development is a critical offering for process, voltage, temperature, and other monitoring IPs within SOC subsystem. Synopsys is a market leader for these IP developments which are integral parts of Silicon lifecycle monitoring. You Are: As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity and forward-looking project schedules. You will generate test benches and test cases, perform RTL and gate-level SDF-annotated simulations and debug, and may perform mixed-signal (digital + analog) simulations and debug. You will interact with our application engineers and provide guidance to customers. Additionally, you will participate in the generation of data books, application notes, and white papers. What You’ll Be Doing: Generate test benches and test cases. Perform RTL and gate-level SDF-annotated simulations and debug. May perform mixed-signal (digital + analog) simulations and debug. Interact with our application engineers and provide guidance to customers. Participate in the generation of data books, application notes, and white papers. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Understand tools like VC Spyglass, Verdi, & views like SDF, Liberty, etc., and other frontend views. Write RTL Code, with solid Verilog, PERL, and Python skills, and TCL is a good addition. Understand static timing analysis and synthesis, DFT/ATPG skills would be a plus. Knowledge of any high-speed communication protocol is not mandatory but an asset. Previous knowledge in customer support and/or silicon bring-up is a plus. The Impact You Will Have: Strengthen and develop forecasting capabilities based on improved monitoring capacity. Ensure high-quality and reliable silicon lifecycle monitoring solutions. Enhance quality assurance methodology by adding more quality checks/gatings. Support internal tools development and automation to improve productivity across ASIC design cycles. Work with design engineers on new tools/technology and new features evaluation and adoption. Contribute to the successful and smooth operation of the engineering teams. What You’ll Need: Bachelor’s or master’s degree in electrical engineering or a related field. 3 to 7+ years of experience in A&MS frontend and backend views & collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Who You Are: Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on developing cutting-edge PVT Sensor IPs integral to Silicon lifecycle monitoring. This team collaborates closely with other engineering teams to ensure the highest quality and performance of our products. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a detail-oriented and tech-savvy professional with a passion for translating complex technical information into clear, user-friendly documentation. With a strong background in technical writing, you excel in planning, organizing, writing, and editing technical specifications, engineering schematics, application notes, and user guides. You are adept at collaborating with multi-site teams, collecting raw content from design engineers, and transforming it into consumable collateral. Your excellent problem-solving skills and logical reasoning enable you to navigate complex information and produce high-quality documentation that adheres to style guides and processes. You thrive in a dynamic environment, continuously learning new technologies and taking ownership of your projects with minimal supervision. What You’ll Be Doing: Developing and writing user documentation for various Digital and Mixed Signal IPs. Planning, organizing, and editing technical specifications, engineering schematics, application notes, and user guides. Interfacing with the Design Engineering team to collect raw content and transform it into user-friendly documentation. Ensuring strict adherence to style guides and documentation processes. Collaborating with other teams to produce high-quality customer documentation. Contributing to the documentation roadmap and having a significant impact on all customer documentation produced. The Impact You Will Have: Enhancing the usability and accessibility of technical documentation for various IP product lines. Improving customer satisfaction by providing clear and concise user guides and application notes. Streamlining the documentation process and ensuring adherence to style guides. Facilitating better communication between design engineers and end-users through well-crafted documentation. Contributing to the overall success of Synopsys' products by providing essential support materials. Driving innovation in documentation practices and setting new standards for technical writing. What You’ll Need: Degree or master's in electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. 3-7 years of technical writing experience in the software or hardware industry. Excellent problem-solving skills and strong logical reasoning. Experience with authoring tools such as FrameMaker. Excellent English writing and speaking skills. Who You Are: You have excellent communication and interpersonal skills, with the ability to work both independently and as part of a team. You are energetic, quick to learn new technologies, and take pride in delivering high-quality work. You care deeply about doing a good job and pay attention to details. You take ownership of your projects and tasks, ensuring they are completed correctly the first time with minimal supervision. The Team You’ll Be A Part Of: You will be part of the Solutions Group at Synopsys, responsible for developing user documentation for various Digital and Mixed Signal IPs. This team is dedicated to producing high-quality, user-friendly documentation that supports the successful implementation and use of Synopsys' products. You will collaborate with design engineers and other teams across multiple sites, contributing to the overall documentation strategy and roadmap. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An enthusiastic and detail-oriented individual with a passion for electronics and hardware testing. You have a diploma or bachelor's degree in Electrical or Electronics Engineering and are eager to apply your knowledge in a dynamic lab environment. Your hands-on experience with lab instruments and your understanding of high-speed interfaces like Ethernet and PCIe make you a strong candidate for this role. You are meticulous in your work, ensuring that all lab activities are executed seamlessly. You enjoy troubleshooting and solving technical challenges, and you are comfortable working in a fast-paced, collaborative environment. What You’ll Be Doing: Configure, calibrate, and maintain test equipment such as oscilloscopes, logic analyzers, signal generators, and power supplies. Assist in assembling and setting up test benches for silicon validation, ensuring signal integrity and proper connectivity. Support high-speed interface testing, particularly for PCIe, Ethernet, and other serial communication protocols. Perform PCB rework, soldering, and desoldering of surface-mount (SMD) and through-hole components. Work closely with validation engineers to execute pre-silicon and post-silicon validation tests. Capture, analyze, and document test data using lab measurement tools. Troubleshoot hardware issues, connectivity problems, and signal integrity challenges related to PCIe and Ethernet interfaces. Maintain detailed logs of test results, test setups, and debugging activities. Assist in generating test reports and summaries for engineering teams. Ensure compliance with ESD protection guidelines and ISO standards for lab operations. Organize lab space and maintain an inventory of test equipment, components, and accessories. Ensure lab equipment is functional and regularly serviced for optimal performance. Follow standard operating procedures (SOPs) for equipment handling and storage. Manage procurement requests for test equipment and consumables, coordinating with vendors and internal teams. The Impact You Will Have: Ensure the seamless execution of validation activities, contributing to the high-quality standards of our products. Support the development and validation of cutting-edge silicon technologies, pushing the boundaries of innovation. Maintain a well-organized and efficient lab environment, enabling the engineering team to focus on core development tasks. Provide critical data and insights through meticulous documentation and reporting, aiding in informed decision-making. Enhance the reliability and performance of our hardware through thorough testing and troubleshooting. Contribute to the continuous improvement of lab operations and processes, ensuring compliance with industry standards. What You’ll Need: Bachelor's degree (B.Tech/B.E.) in Electrical, Electronics. 2 years of experience in a semiconductor validation or hardware testing lab. Hands-on experience with electronic lab equipment (oscilloscopes, multimeters, power analyzers, etc.). Basic understanding of PCB schematics, signal integrity, and electrical debugging. Familiarity with high-speed interfaces, including Ethernet and PCIe. Working knowledge of Python, MATLAB, and C for test automation is a plus. Strong problem-solving skills and attention to detail. Who You Are: You are a proactive and dedicated individual with a keen eye for detail. You thrive in a collaborative environment and are always willing to lend a helping hand to your teammates. Your strong communication skills enable you to document and report findings effectively. You are adaptable, capable of working under general supervision and handling multiple tasks efficiently. Your passion for technology and continuous learning drives you to stay updated with the latest industry trends and best practices. The Team You’ll Be A Part Of: You will be part of the Silicon Electrical Validation team, a group of dedicated professionals focused on ensuring the highest standards of quality and performance in our silicon products. The team collaborates closely with various departments, including design, engineering, and quality assurance, to validate and troubleshoot silicon hardware. Together, you will work on cutting-edge projects, contributing to the advancement of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Job Description & Requirements At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Solution IP group is ramping up high-performance computing (HPC) demand, therefore we are looking for an enthusiastic engineer to join our Methodology and Analog & Mixed-Signal Circuit Design team. You will be working with an immensely creative cross functional team of analog and mixed signal circuit designers from a wide variety of backgrounds on design and methodology. This position requires hands on experience and working knowledge of mixed signal circuit design best practices, an understanding of silicon IP release requirements, solid scripting skills to automate flows and the ability to drive and train engineers to become experts with new methodologies. Job Responsibilities: Develop and maintain circuit design methodology flows and documentation. Identify and refine circuit implementations to achieve optimal power, area and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. Oversee physical layout to minimize the effect of parasitic, device stress, and process variation. Collaborate with digital RTL engineers on the development of calibration, adaptation and control algorithms for analog circuits. Present simulation data for peer and customer review. Mentor and Review the progress of junior engineers. Document design features and test plans. Required Qualifications: Bachelor with 2 years' experience or MSEE (or PhD) in Electrical Engineering, Computer Engineering, or similar technical field In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals. Silicon-proven experience implementing circuits like bandgap references, voltage regulators. Detailed design experience with high custom logic design Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects. Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.). Experience with EDA tools for schematic entry, physical layout, and design verification. High proficiency with spice simulators including HSPICE, Finesim and XA Knowledgeable in Verilog-A and/or System-Verilog for analog behavioral modeling and simulation-control/data-capture. Plus Qualifications: Ability to provide automation for rapid and dynamic design needs is highly sought-after Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart Experienced in STAR or similar extractor to debug extraction issues Extensive programming skills in languages such as Python, Perl, TCL and C/C++ Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and innovative engineer eager to tackle the challenges presented by cutting-edge technologies. You thrive in a dynamic environment and are motivated by the opportunity to make a significant impact on the world through your work. With a solid foundation in electronics and digital logic, you possess a deep understanding of CMOS processes and are familiar with ASIC design flows. Your expertise in custom/semi-custom cell development and layout automation sets you apart, and you are adept at leveraging AI-based solutions to enhance design processes. Your proficiency in programming languages such as C, Python, Perl, and UNIX enables you to develop and implement efficient solutions. As a natural leader, you can guide projects to successful completion, making informed decisions based on timelines and technological challenges. Your innovative thinking and systematic approach to problem-solving are complemented by your excellent communication skills, allowing you to collaborate effectively with teams across the globe. If you are ready to embrace a "Yes if" mindset and drive innovation, Synopsys is the perfect place for you. What You’ll Be Doing: Designing and developing custom and semi-custom cells for ASICs. Automating layout processes to enhance efficiency and accuracy. Collaborating with cross-functional teams to ensure seamless integration of designs. Utilizing EDA tools for layout and schematic design. Implementing AI-based solutions to optimize design workflows. Leading projects, making strategic decisions, and ensuring timely delivery. The Impact You Will Have: Advancing the development of high-performance silicon chips. Driving innovation in layout automation and custom cell development. Enhancing design processes through AI-based solutions. Ensuring the seamless integration of complex designs into final products. Contributing to the success of groundbreaking technologies in various industries. Supporting Synopsys' mission to lead in chip design and IP integration. What You’ll Need: Good understanding of electronics basic concepts and applications. In-depth knowledge of logic gates, flip flops, latches, multiplexers, level shifters, and digital logics. Experience with CMOS design and layout concepts, especially in lower node technologies. Familiarity with ASIC design flow and layout automation. Proficiency in programming languages such as C, Python, Perl, and UNIX. Who You Are: Adept at innovative and out-of-the-box thinking. Systematic in your approach to problem-solving. Excellent written and verbal communication skills. Comfortable working with diverse teams globally. Capable of leading projects and making strategic decisions. The Team You’ll Be A Part Of: You will join a dynamic team focused on pushing the boundaries of chip design and layout automation. Our team thrives on collaboration and innovation, working together to develop cutting-edge solutions that drive the future of technology. You will have the opportunity to work alongside some of the brightest minds in the industry, contributing to projects that have a global impact. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a forward-thinking Cloud DevOps Engineer with a passion for modernizing infrastructure and enhancing the capabilities of CI/CD pipelines, containerization strategies, and hybrid cloud deployments. You thrive in environments where you can leverage your expertise in cloud infrastructure, distributed processing workloads, and AI-driven automation. Your collaborative spirit drives you to work closely with development, data, and GenAI teams to build resilient, scalable, and intelligent DevOps solutions. You are adept at integrating cutting-edge technologies and best practices to enhance both traditional and AI-driven workloads. Your proactive approach and problem-solving skills make you an invaluable asset to any team. What You’ll Be Doing: Designing, implementing, and optimizing CI/CD pipelines for cloud and hybrid environments. Integrating AI-driven pipeline automation for self-healing deployments and predictive troubleshooting. Leveraging GitOps (ArgoCD, Flux, Tekton) for declarative infrastructure management. Implementing progressive delivery strategies (Canary, Blue-Green, Feature Flags). Containerizing applications using Docker & Kubernetes (EKS, AKS, GKE, OpenShift, or on-prem clusters). Optimizing service orchestration and networking with service meshes (Istio, Linkerd, Consul). Implementing AI-enhanced observability for containerized services using AIOps-based monitoring. Automating provisioning with Terraform, CloudFormation, Pulumi, or CDK. Supporting and optimizing distributed computing workloads, including Apache Spark, Flink, or Ray. Using GenAI-driven copilots for DevOps automation, including scripting, deployment verification, and infra recommendations. The Impact You Will Have: Enhancing the efficiency and reliability of CI/CD pipelines and deployments. Driving the adoption of AI-driven automation to reduce downtime and improve system resilience. Enabling seamless application portability across on-prem and cloud environments. Implementing advanced observability solutions to proactively detect and resolve issues. Optimizing resource allocation and job scheduling for distributed processing workloads. Contributing to the development of intelligent DevOps solutions that support both traditional and AI-driven workloads. What You’ll Need: 5+ years of experience in DevOps, Cloud Engineering, or SRE. Hands-on expertise with CI/CD pipelines (Jenkins, GitHub Actions, GitLab CI, ArgoCD, Tekton, etc.). Strong experience with Kubernetes, container orchestration, and service meshes. Proficiency in Terraform, CloudFormation, Pulumi, or Infrastructure as Code (IaC) tools. Experience working in hybrid cloud environments (AWS, Azure, GCP, on-prem). Strong scripting skills in Python, Bash, or Go. Knowledge of distributed data processing frameworks (Spark, Flink, Ray, or similar). Who You Are: You are a collaborative and innovative professional with a strong technical background and a passion for continuous learning. You excel in problem-solving and thrive in dynamic environments where you can apply your expertise to drive significant improvements. Your excellent communication skills enable you to work effectively with diverse teams, and your commitment to excellence ensures that you consistently deliver high-quality results. The Team You’ll Be A Part Of: You will join a dynamic team focused on optimizing cloud infrastructure and enhancing workloads to contribute to overall operational efficiency. This team is dedicated to driving the modernization and optimization of Infrastructure CI/CD pipelines and hybrid cloud deployments, ensuring that Synopsys remains at the forefront of technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled engineer with a strong foundation in analog and mixed signal integrated circuit design. You bring both theoretical knowledge and practical experience to the table, enabling you to contribute effectively to our fast-growing R&D team. With a background in transistor-level circuit design, CMOS fundamentals, and high-speed logic paths, you excel in a dynamic environment. Your expertise in timing analysis, characterization, and modeling sets you apart. You thrive in cross-functional teams, collaborating with diverse professionals from various backgrounds to achieve common goals. Your proficiency with IC design tools, along with your familiarity with scripting languages like TCL, Perl, C, Python, and MATLAB, makes you a valuable asset to our team. You are detail-oriented, possess excellent communication skills, and are accustomed to working in a globally diverse environment. What You’ll Be Doing: Direct and guide the activities of a team of engineers characterizing timing, analyzing timing results, and generating timing models of high-speed SERDES IP. Develop and align timing flow and methodology to ensure efficiency and quality of the team’s deliverables. Conduct design reviews and evaluate final results of timing views and reports. Present results of timing assessments or critical issue investigations and make recommendations for actions necessary to achieve desired results. Ensure the team follows processes for maximum design quality. Consult on the timing characteristics of the SerDes IP product and propose solutions for STA timing closure. The Impact You Will Have: Enhance the performance and reliability of high-speed analog integrated circuits through meticulous timing analysis and characterization. Contribute to the development of cutting-edge SERDES IP, driving advancements in high-speed data communication. Improve the efficiency and quality of deliverables through optimized timing flow and methodology. Ensure maximum design quality by adhering to established processes and best practices. Provide critical insights and recommendations to address timing issues and achieve desired results. Collaborate with cross-functional teams to deliver innovative solutions that meet the evolving needs of the semiconductor industry. What You’ll Need: MSc in Electrical Engineering or related field with 2 years of experience in IC design. Familiarity with transistor-level circuit design and CMOS design fundamentals. In-depth knowledge of setup and hold timing analysis. Experience in timing characterization, modeling, simulation, and verification. Familiarity with custom digital design (i.e., high-speed logic paths). Experience with timing tools such as Primetime, NanoTime, or equivalent. Hands-on experience with the physical layout of high-speed circuits is a plus. Knowledge of SPICE simulators and simulation methods. Proficiency in scripting languages such as TCL, Perl, C, Python, MATLAB. Who You Are: Detail-oriented and capable of conducting thorough analyses. Strong communicator with excellent documentation skills. Collaborative team player comfortable in a cross-functional, globally diverse environment. Creative problem solver with the ability to think critically and propose effective solutions. Adaptable and able to work at all levels of an organization. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative analog and mixed signal R&D team. Our team is dedicated to developing high-speed analog integrated circuits using the latest FinFET CMOS processes. We pride ourselves on our collaborative environment, where engineers from various backgrounds come together to drive technological advancements. Supported by an experienced software/CAD team, our design environment is best-in-class, equipped with a full suite of IC design tools and custom in-house tools. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog Design Engineer with a passion for developing cutting-edge technologies. You thrive in a collaborative environment and have a deep understanding of analog design fundamentals and device physics. Your experience with high-speed IO designs and advanced technologies positions you as a key contributor to our innovative projects. You possess excellent analytical and problem-solving skills, and your ability to execute circuit design tasks with precision and efficiency is unmatched. Your familiarity with ESD, reliability concepts, and JEDEC requirements for memory interfaces further enhances your expertise. You are an effective communicator with strong interpersonal skills, enabling you to work seamlessly with cross-functional teams across the globe. What You’ll Be Doing: Developing next-generation high-speed memory interface PHY IPs (DDR/HBM/UCIe) Executing projects in advanced technologies with a focus on analytical and problem-solving skills Designing high-speed IOs for memory interface PHY IP in CMOS/FinFET/GAA Collaborating with cross-functional teams globally to achieve project goals Ensuring product quality and efficiency in all design tasks Staying updated with the latest industry standards and technological advancements The Impact You Will Have: Driving the development of innovative high-speed memory interface PHY IPs Contributing to the integration of advanced capabilities in SoCs Enhancing the performance, power efficiency, and size optimization of target applications Reducing risk and accelerating time-to-market for differentiated products Collaborating with global teams to deliver high-quality products Setting industry benchmarks for advanced analog design technologies What You’ll Need: BTech/MTech degree in a relevant field 3+ years of experience in analog design fundamentals and device physics Proficiency in high-speed IO designs in advanced technologies Experience with ESD and reliability concepts Knowledge of JEDEC requirements for memory interfaces and standards Familiarity with signal integrity and/or power integrity is a plus Who You Are: An analytical thinker with strong problem-solving skills A collaborative team player with excellent communication and interpersonal skills Detail-oriented and capable of executing tasks with high precision and efficiency Adaptable and eager to learn new technologies and industry standards Passionate about innovation and technological advancements The Team You’ll Be A Part Of: You will be part of a dynamic team of highly competent technical experts focused on developing next-generation memory interface PHY IPs. Our team thrives on collaboration, innovation, and the pursuit of excellence. Together, we drive the integration of advanced capabilities into SoCs, enabling our customers to meet unique performance, power, and size requirements quickly and with reduced risk. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Credit and Collections Specialist Accounts Receivable Analyst Financial Operations Specialist We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dedicated and detail-oriented professional with a strong background in credit and collections. You excel in fast-paced environments and have a proven ability to manage multiple tasks simultaneously while maintaining a high level of accuracy. Your exceptional communication skills allow you to negotiate effectively with customers and collaborate seamlessly with internal teams. You are proactive, with a knack for identifying potential risks and implementing solutions to mitigate them. Your analytical mindset and proficiency in tools like SAP and Microsoft Excel enable you to perform thorough financial analyses and contribute to the continuous improvement of processes. Above all, you are a team player who thrives on achieving goals and driving efficiencies within the finance function. What You’ll Be Doing: Perform daily customer collections activities to maximize timely collections and minimize uncollectible adjustments. Negotiate repayment plans with delinquent customers. Continuously reconcile customer and GL accounts. Provide standard and ad-hoc reporting to management, such as monthly A/R aging reports and related summaries, risk analysis, and assist with quarterly audit reports. Forecast cash collections and analyze historic payment trends. Perform credit analysis of new and existing customers daily. Approve and recommend credit limits appropriate to the risk profile through diligent risk assessment and monitoring. Highlight significant credit risk and collection issues to senior management. Review contractual payment terms and approve or make recommendations. Coordinate with internal partners including Sales, Finance, Tax, OM, and Legal. Automate systems and processes, update internal policies, procedures, and controls where necessary. The Impact You Will Have: Ensure timely collection of payments, positively impacting the company's cash flow. Mitigate financial risks by conducting thorough credit analyses and monitoring customer accounts. Enhance the accuracy and reliability of financial reporting through diligent reconciliation and analysis. Support strategic decision-making with comprehensive risk assessments and financial forecasts. Foster strong relationships with customers, improving overall satisfaction and retention. Drive process improvements, contributing to the efficiency and effectiveness of the finance function. What You’ll Need: Proficiency in SAP, particularly the FSCM Collections Module is a plus. Advanced Microsoft Excel skills. Proven track record of driving process efficiencies. Bachelor’s degree in finance or a related field (optional). M&A experience is a plus. Who You Are: Excellent verbal and written communication skills, with the ability to communicate effectively at all levels. Ability to work independently in a fast-paced, high-volume environment. A team player with excellent interpersonal skills who can collaborate effectively across multiple functions. Strong analytical and problem-solving skills. Ability to manage projects to completion, on time and under pressure. Strong negotiating skills and an aptitude for analyzing financial statements and evaluating customer credit profiles. The Team You’ll Be A Part Of: You will be part of a dynamic finance team, reporting to a local Finance Manager with day-to-day tasks coordinated by the Regional Collections Manager based in Dublin, Ireland. This team is dedicated to ensuring the financial health of the company through diligent collections, credit analysis, and collaboration with internal partners. Flexible working hours are preferred, with the potential to work European or local hours, or a combination to suit personal or business requirements. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An experienced and visionary ASIC Verification Engineer, Architect who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL, UCIe etc. You can define and execute Testbench architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What You’ll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys’ digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys’ capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What You’ll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an innovative and dedicated engineer with a passion for embedded memory compilers. With 2-5 years of experience in Embedded SRAM compilers, you possess a robust understanding of CMOS digital circuits, and any knowledge of FinFET technology is a plus. Your expertise in transistor-level circuit design allows you to navigate the complexities of read/write margins and timing races. You thrive in a collaborative environment, often engaging with senior internal and external personnel to achieve the best possible outcomes. You are a problem-solver who can work independently, taking ownership of tasks while effectively coordinating with the layout team to resolve design and layout issues. Your ability to apply comprehensive knowledge creatively makes you an invaluable asset to our team. What You’ll Be Doing: Designing, developing, and troubleshooting embedded memory compilers. Applying skills in memory compilers, focusing on transistor-level circuit design. Understanding various memory design aspects such as read/write margins and timing races to find effective solutions. Interacting with the layout team to address and resolve issues from both design and layout standpoints. Working independently on tasks, ensuring ownership and collaboration to achieve optimal results. Engaging frequently with senior personnel to leverage expertise and enhance project outcomes. The Impact You Will Have: Enhancing the performance and reliability of embedded memory compilers. Driving innovation in memory design, contributing to the development of high-performance silicon chips. Collaborating with cross-functional teams to optimize design and layout processes. Ensuring timely delivery of robust and efficient memory solutions. Contributing to the continuous improvement of design methodologies and practices. Supporting the advancement of Synopsys' technology leadership in the semiconductor industry. What You’ll Need: 2-5 years of experience in Embedded SRAM compilers. Strong understanding of CMOS digital circuits. Knowledge of FinFET technology (preferred). Proficiency in transistor-level circuit design. Ability to analyze and resolve design and layout issues effectively. Who You Are: Innovative and detail-oriented. Collaborative team player. Effective communicator with strong interpersonal skills. Problem-solver with a proactive approach. Self-motivated and able to work independently. The Team You’ll Be A Part Of: You will join a dynamic and dedicated team focused on the design and development of embedded memory compilers. Our team prides itself on fostering an environment of collaboration and innovation, working together to push the boundaries of technology and deliver cutting-edge solutions. As part of this team, you will have the opportunity to engage with experienced professionals and contribute to projects that shape the future of the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: ASIC Physical Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced Physical Design Engineer with a passion for implementing and performing signoff verifications of digital blocks using ASIC design flow (Gate2GDSII). You thrive in dynamic environments and have a knack for problem-solving and innovation. Your expertise in digital block implementation, from gate netlist to GDSII, is complemented by your hands-on experience with state-of-the-art ASIC flows. You understand the intricacies of design initialization, power planning, floor planning/macro placement, scan-chain reordering, CTS, route, and chip finishing steps. You have a solid foundation in physical implementation, signoff verifications (DRC, LVS, Antenna), and reliability verifications (EMIR, ESD). Your ownership of writing MCMM and UPF for block designs showcases your leadership and technical prowess. You are adept at providing handoff data to other signoff closure like STA, formality, layout, and reliability verification. With a minimum of 5 years of relevant experience in the physical design domain and a B.E/B.Tech/M.Tech in ECE/EE, you are ready to take on new challenges and contribute to groundbreaking projects. What You’ll Be Doing: Implementing digital blocks using state-of-the-art gate to GDSII ASIC flows. Performing physical implementation of blocks from gate netlist to GDSII. Conducting signoff verifications, including layout verifications (DRC, LVS, Antenna) and reliability verifications (EMIR, ESD). Writing MCMM and UPF for block designs. Providing handoff data for other signoff closure processes like STA, formality, layout, and reliability verification. Collaborating with cross-functional teams to ensure the successful integration and testing of physical designs. The Impact You Will Have: Enhancing the quality and reliability of our digital block implementations. Driving innovation in physical design methodologies and processes. Enabling the successful deployment of high-performance silicon chips. Contributing to the development of cutting-edge technology that powers next-generation applications. Supporting the continuous improvement of our ASIC design flow and tools. Ensuring the seamless integration of physical designs into larger systems and platforms. What You’ll Need: In-depth understanding of the ASIC physical design flow steps from gate netlist. Experience in testchip implementation and testing exposure is a plus. Exposure to Synopsys toolset (such as FC/ICC2, Primetime, Formality, ICV) is highly desirable. Experience with FinFET designs is desirable. Experience in working on IO integration with wire-bond or flip-chip design is a big plus. Who You Are: A problem solver with strong analytical skills. Detail-oriented with a focus on quality and reliability. Effective communicator and collaborator. Innovative thinker with a passion for technology. Self-motivated and able to work independently. The Team You’ll Be A Part Of: Join a dynamic team of experts focused on pushing the boundaries of physical design and implementation. Our team is dedicated to continuous innovation and excellence, working collaboratively to solve complex challenges and deliver cutting-edge solutions. You'll be part of a supportive and inclusive environment where your contributions are valued and your professional growth is nurtured. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Senior Research and Development Engineer Senior R&D Engineer Lead R&D Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a driven and innovative engineer with a passion for developing and maintaining robust infrastructure systems. With a background in Electrical Engineering or Computer Science, you have honed your skills in Python or Perl, and have a deep understanding of OOPS concepts and design patterns. You thrive in dynamic environments and possess the ability to manage system builds, configurations, patches, upgrades, and testing. Your experience as a DevOps engineer has equipped you with the knowledge to automate infrastructure tasks and develop best practices around monitoring performance and availability. As an effective communicator and collaborative team player, you can work seamlessly with teams across different geographies. You are a self-starter who learns quickly and demonstrates a keen attention to detail. Your high energy and willingness to go the extra mile make you an asset to any team. You are not just looking for a job but a place where you can make a significant impact and grow with the company. What You’ll Be Doing: Be responsible for the ongoing growth and stability of the infrastructure as we continue to add and develop new tools and services. Automate processes using continuous integration tools like Jenkins. Manage system builds, configurations, patches, upgrades, and testing. Design, develop, debug, and manage development and test environments. Develop best practices around monitoring performance and availability through new or existing tools. Write technical and user documentation such as FAQs and Handbooks. The Impact You Will Have: Ensure the stability and scalability of our infrastructure, supporting the growth of new tools and services. Enhance the efficiency and reliability of development and testing environments. Improve the automation of infrastructure tasks, reducing manual intervention and errors. Develop and implement best practices for performance monitoring, ensuring high availability of systems. Provide clear and comprehensive documentation, aiding in the smooth operation and understanding of systems. Collaborate with cross-functional teams to drive innovation and continuous improvement. What You’ll Need: Bachelor's or Master's in Electrical Engineering or Computer Science from a reputed university/institution. 3 - 6 years of proven experience in an operations or engineering role. Strong proficiency in Python or Perl. Good understanding of OOPS concepts and design patterns. Experience as a DevOps engineer working on automating infrastructure tasks. Proficient in Source Control Management, including Perforce and Git. Solid understanding of Linux and ideally Windows. Who You Are: High energy person with the willingness to go the extra mile. Demonstrate ability to be a self-starter and learn quickly. Excellent communication and presentation skills. Able to work with teams across geography. Collaborative and maintaining an open and friendly atmosphere to encourage productivity, creativity, and innovation. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing and maintaining the infrastructure that supports our cutting-edge technology. Our team values collaboration, creativity, and continuous improvement, and we work closely with cross-functional teams to drive the success of our projects. Together, we strive to ensure the stability, scalability, and performance of our systems, enabling Synopsys to lead in technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. COPILOT Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a meticulous and results-driven professional with a passion for technology and innovation. With a solid background in electrical signal characterization and validation, you possess the expertise to perform complex testing on high-speed analog integrated circuits. Your analytical skills and problem-solving abilities enable you to debug and optimize silicon performance efficiently. You thrive in a collaborative environment, working alongside talented engineers to achieve common goals. Your proactive approach and strong communication skills make you a valuable asset to any team. What You’ll Be Doing: Performing testing on silicon implementations of high-speed analog integrated circuits. Reviewing and debugging silicon under test, as well as supporting hardware. Running characterization tests and creating detailed test reports. Applying theoretical knowledge to investigate and explain circuit behavior and limitations in a testing environment. Developing test specifications, setup preparations, and board designs. Documenting and evaluating prototype performance. The Impact You Will Have: Ensuring the reliability and performance of high-speed analog integrated circuits. Contributing to the development of cutting-edge technology in the semiconductor industry. Enhancing the efficiency and accuracy of testing and validation processes. Supporting the continuous improvement of product quality and performance. Collaborating with cross-functional teams to drive innovation and excellence. Providing valuable insights and recommendations for design and process improvements. What You’ll Need: 3-5 years of experience in electrical signal characterization and validation. A degree in Electronic Engineering or a related field. Basic knowledge of analog IC circuits. Strong analytical and debugging skills with a positive approach to hardware and automation software. Understanding of SERDES test concepts. Exposure to software programming (Matlab, Python). Basic knowledge of FPGA programming. Good understanding of high-speed interface protocols such as PCIe, Ethernet, SATA, USB. Knowledge of signal integrity is an advantage. Who You Are: A detail-oriented and proactive engineer. A strong communicator with the ability to collaborate effectively with team members. A problem-solver who can apply theoretical knowledge to practical scenarios. A continuous learner who stays updated with the latest industry trends and technologies. An adaptable professional who can handle multiple tasks and priorities efficiently. The Team You’ll Be A Part Of: You will be joining a dynamic and innovative team of engineers focused on the testing and validation of high-speed analog integrated circuits. Our team is dedicated to ensuring the highest standards of quality and performance in our products. We work collaboratively to solve complex challenges and drive technological advancements in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Digital Verification Specialist Functional Verification Engineer Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous Digital Verification Engineer with a keen interest in functional verification of High Speed interface IPs. With a dynamic personality and a strong eagerness to learn, you are driven to excel in Pre-silicon verification activities. Your understanding of digital design and HDL implementation sets you apart, and you thrive in environments where you can build and update verification plans and test cases. You are well-versed in scripting and automation using TCL, PERL, or Python, and possess excellent debug and diagnostic skills. Collaboration with digital designers is second nature to you, ensuring you achieve the desired coverage and performance in your projects. Your innovative mindset and commitment to excellence make you an invaluable asset to any verification team. What You’ll Be Doing: Work on Functional Verification of High speed serial link PHY IPs for USBx, PCIex, Ethernet, Display & HDMI protocol standards Study IP/design blocks/Firmware Specifications and build/update verification plans as well as the test cases Build/update functional verification environments to execute the test plans Implement checkers, assertions, random test generators, high level transactional models, and bus functional models (BFMs) as per the verification plan needs Perform simulation, random and direct stimulus development, and coverage review Work closely with digital designers for debug and achieve the desired coverage The Impact You Will Have: Ensure the reliability and performance of High Speed interface IPs, critical to various advanced technologies Contribute to the development of cutting-edge verification methodologies Enhance the quality and efficiency of verification processes Collaborate effectively with cross-functional teams to achieve project goals Drive innovation in verification techniques, improving overall product quality Support the creation of high-performance silicon chips that empower modern technology What You’ll Need: B.Tech/M.Tech with 3+ years of relevant experience Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog Proficiency in scripting and automation using TCL, PERL, or Python Strong debug and diagnostic skills Experience in building and updating verification environments and test plans Who You Are: Detail-oriented with a strong analytical mindset Excellent communicator and team player Proactive problem-solver with a passion for innovation Adaptable and eager to learn new technologies Highly organized and capable of managing multiple tasks The Team You’ll Be A Part Of: You will be part of a dedicated team focused on the functional verification of high-speed interface IPs. Our team is committed to excellence and continuous improvement, working collaboratively to achieve the highest standards in verification processes. We value innovation, teamwork, and a results-driven approach, ensuring that our contributions significantly impact the success of our projects and the advancement of technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less