1771 Synopsys Jobs - Page 13

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description We are seeking a highly skilled and experienced System Architect, Hardware Engineer or Applications Engineer to join our dynamic team. The ideal candidate will work closely with System Level Architects to design and define block diagrams, schematics, and electrical requirements for our cutting-edge projects for memory packaging. This role requires a deep understanding of hardwar...

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the TD Advanced Modeling Group in Hyderabad you will work in a multi-functional team of engineers highly skilled in the modeling of materials, process, structure, and reactor, who are responsible for deploying modeling solutions towards advanced node development in TD and HVM. You will be responsible for developing predictive structure modeling simulations across multiple DRAM and NAND nodes...

Eximietas Design Hiring Senior Design Verification (PCIE) Engineers / Leads / Managers. Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US. Job Description: # Lead SoC Design Verification efforts for complex projects, ensuring successful execution of verification plans. # Develop and implement comprehensive verification strategies, including test plans, testbenches, and coverage analysis, for both high-speed and low- speed peripherals (e.g., I2C, SPI, UART, GPIO, QSPI) as well as high- speed protocols (e.g., PCIe, Ethernet, CXL, MIPI, DDR, HBM). # Conduct Gate-level simulations and power-aware verificatio...

Location Bangalore, Karnataka, 560048 Category Engineering Job Type Full time Job Id 1195654 No ASIC Engineer This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2 days per week from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed...

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is looking for a staff level physical design engineer. In this highly visible role, you will be contributing to ASIC for Storage/ AI products. Qualifications: Education and Experience : Master's degree in Electronics/Computer Engineering with over 10 years of experience in physical design. Physical Design Expertise : Extensive experience in Place & Route using Synopsys FC or Cadence Innovus tools is essential. Proficiency in STA using Primetime and/or Tempus. Demonstrated kno...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. This is a full-time on-site role for a Sr Principal Physical Design Engineer based in Bengaluru. The engineer will be responsible for overseeing and contributing to the physical design process of complex IPs, especially Memory IPs with higher frequencies on latest Tech. nodes. Day-to-day tasks include floorplanning, placement, clock tree synthesis, routing, and physical verification. The role also involves collaborating with cross-functional teams, mentoring junior engineers, and ensuring design meets performance, power, and area specifications. Qualifications Strong expertise in flo...

We are seeking an exceptional Senior Physical Design Engineer to take a key role in our semiconductor design team. As a Senior Physical Design Engineer, you will lead the development and implementation of cutting-edge physical design methodologies and flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensure the successful delivery of high-quality designs Key Responsibilities Perform Synthesis, floor planning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and area targets. Conduct detailed analysis of timing, power, and area, and drive de...

Job Overview : We are seeking an exceptional Physical Verification Engineer to take a key role in oursemiconductor design team. As a Block/Fullchip/Partition Physical Verification Engineer , you willResponsible for development and implementation of cutting-edge physical verification methodologiesand flows for complex ASIC designs. You will collaborate closely with cross-functional teams to ensurethe successful delivery of high-quality designs Responsibilities : Drive physical verification DRC, Antenna, LVS, ERC at cutting edge FinFET technology nodesfor various foundries. Physical verification of a complex SOC/ Cores/ Blocks DRC, LVS, ERC, ESD, DFM, Tape out. Work hands-on to solve critical ...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

This job might be for you if You enjoy solving problems. You love taking on difficult challenges and finding creative solutions. You dont know the answer but will dig until you find it. You communicate clearly. You write well. You are motivated and driven. You volunteer for new challenges without waiting to be asked. You will take ownership of the time you spend with us and make a difference. You can impress our customers with your enthusiasm to solve their issues (and solve them!) Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you w...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One ASIC RTL Engineer Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog In depth knowledge on RTL quality checks (Lint, CDC) Knowledge of synthesis and low power is a plus Good understanding of AMBA bus protocols (AXI, AHB, ATB, APB) Good understanding of timing concepts Knowledge of one or more of the interface protocols PCIe DDR Ethernet I2C, UART,...

Job Summary: We are seeking a highly experienced Senior Physical Design Engineer with over 10 years of experience in the RTL to GDS flow. This full-time role will be based in Bangalore Karnataka. The ideal candidate will possess strong scripting skills, have hands-on experience with 3nm, 5nm nodes, and have a proven track record in physical design. Key Responsibilities Physical design efforts from RTL to GDS, ensuring high-quality and timely delivery of projects Perform floorplanning, placement, clock tree synthesis (CTS), routing, and physical verification Develop and maintain scripts for automation of physical design tasks, improving efficiency and reliability Collaborate with RTL designer...

We are seeking an experienced IR & EM Technology Expert to join our ASIC design team. The successful candidate will have a strong background in CAD design and a deep understanding of IR (Integrated Radiation) and EM (Electromagnetic) technology. This is an excellent opportunity for a motivated individual to contribute to the development of cutting-edge ASIC designs, ensuring the highest level of performance, power efficiency, and reliability. Job Description In your new role you will: Design and develop IR and EM technology-based solutions for ASIC designs, focusing on signal integrity, power integrity, and thermal management. Collaborate with cross-functional teams, including architecture, ...

Strong background of ASIC Physical Design: Floor planning, P&R, Extraction, IR Drop Analysis, Static Timing and Signal Integrity. Hands-on experience on technology nodes like 7nm, 14nm, 10nm. Good knowledge of EDA tools from Synopsys , Cadence and Mentor Hands-on experience in floor planning, placement optimizations, CTS and routing. Hands-on experience in cadence or Synopsys tool (Encounter, ICC, PT/PTSI, TEMPUS, DC, RC, VOLTAS) Skills:- Responsive Design, Project coordination, Extraction, Competitor Analysis, EDA, floorplanning, 7nm, 14nm and 10nm

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled engineer with 6-10 years of experience, passionate about developing cutting-edge emulation solutions for industry-standard protocols such as PCIe, CXL, and UCIe. You possess a strong background in software development using C/C++ and synthesizable RTL deve...

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and detail-oriented engineer with a deep understanding of Static Timing Analysis (STA). You thrive in a collaborative environment, working closely with cross-functional teams to solve complex technical challenges. Your expertise in Synopsys PrimeTime and relat...

What You’ll Be Doing: Developing emulation solutions large scale designs. Engaging in software development using C/C++ and synthesizable RTL development with Verilog. Verifying solutions to ensure high performance and reliability. Interacting with customers during the deployment and debug phases to ensure smooth i mplementation. Collaborating with cross-function al teams to integrate emulation solutions. Maintaining and enhancing existing emulation solutions to meet evolving industry standards. The Impact You Will Have: Driving the development of advanced emulation solutions that meet industry standards. Enhancing the performance and reliability of semiconductor products through innovative s...

Role : ASIC RTL Engineer / Digital Design Location: Bangalore, Hyderabad, Pune Mandatory Skill RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture PCIe/DDR/Ethernet - Any One I2C,UART/SPI - Any One Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One Scripting languages like Make flow, Perl ,shell, python - Any One Good To Have processor architecture / ARM debug architecture debug issues for multiple subsystems create/review design documents for multiple subsystems Able to support physical design, verification, DFT and SW teams on design queries and reviews Details JD Expertise in SoC subsystem/IP design Expertise in IP design, Subsystem/Cluster and SoC leve...

JD Design Verification Understanding the business requirements and functional specifications of the IPs, subsystems and SOC Creating Verification Environment Architecture document Reviewing and Revising: working towards meeting agreed upon acceptance criteria Developing code in System Verilog, UVM (Universal Verification Methodology), C for Unit, Subsystem and SOC level verification Performing RTL simulations using Synopsys and Cadence simulators Debugging and resolving problems found by simulations .Performance test plan development and maintenance Development of transactors, monitors and models for performance verification. Implement performance verification flow including monitoring, sync...

Project Role : Application Lead Project Role Description : Lead the effort to design, build and configure applications, acting as the primary point of contact. Must have skills : Design for Testability (DFT) Good to have skills : NAMinimum 7.5 year(s) of experience is required Educational Qualification : 15 years full time education Summary :As an Application Lead, you will lead the effort to design, build, and configure applications, acting as the primary point of contact. Your day will involve overseeing the application development process, coordinating with team members, and ensuring project milestones are met. Roles & Responsibilities:Bachelors degree in computer science, Electronics Eng...

In your new role you will: Implement high-performance, low-power, and area-efficient digital designs. Write and implement block level and top-level constraints for Synthesis, Static Timing Analysis . Optimize designs for power, performance, and area, and meet PPA goals. Power analysis using PT-PX or equivalent flow. Logic Equivalence Check (LEC) and Low Power Checks (CLP) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirements. Knowledge on Power analysis and PT-PX flow Your Profile You are best equipped for this task if you have: Bachelors or Masters in Electrical/Electronics Engineering with 8+years of relevant experience. Delivery orie...

We are looking for a skilled Senior Manager - Physical Design with 10-15 years of experience to lead our team in Bangalore, Hyderabad, Noida, Coimbatore. The ideal candidate will have a strong background in physical design and excellent leadership skills. Roles and Responsibility Manage and lead a team of physical design engineers to achieve project goals. Develop and implement automation scripts for physical design methodologies. Collaborate with front-end engineers to resolve timing and power issues. Evaluate new tools and drive power reduction of designs. Perform floorplanning and time budgeting for successful project execution. Ensure timely completion of projects by managing resources e...

What You’ll Be Doing: Developing emulation solutions large scale designs. Engaging in software development using C/C++ and synthesizable RTL development with Verilog. Verifying solutions to ensure high performance and reliability. Interacting with customers during the deployment and debug phases to ensure smooth implementation. Collaborating with cross-functional teams to integrate emulation solutions. Maintaining and enhancing existing emulation solutions to meet evolving industry standards. The Impact You Will Have: Driving the development of advanced emulation solutions that meet industry standards. Enhancing the performance and reliability of semiconductor products through innovative sol...