886 Synopsys Jobs - Page 10

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.You Are: You are a passionate and experienced engineer eager to make a significant impact in the world of embedded memory development. With a strong academic background in Electrical & Electronics Engineering and at least 2 years of hands-on experience in VLSI design, you thrive in collaborative, innovative environments. You possess a deep understanding of SRAM and Register File architectures, and you are well-versed in the nuances of advanced custom circuit implementation, especially at the most advanced technology nodes such as FinFET and submicron processes. Your expertise in scripting and automation, combined with a solid grasp of both digital and analog fundamentals, empowers you to tackle complex challenges and deliver high-quality, efficient solutions. You are a creative problem-solver who welcomes technical challenges and approaches them with curiosity and determination. Your communication skills, adaptability, and ability to work seamlessly across teams make you a valued collaborator. You are committed to continuous learning and excited by the prospect of working at the intersection of technology and innovation. As an advocate for best practices and a mentor to junior engineers, you foster an environment of growth and inclusion. Your commitment to excellence, quality, and customer focus ensures that you deliver solutions that exceed expectations and contribute meaningfully to Synopsys' leadership in the semiconductor industry. What You'll Be Doing: Developing innovative multiport SRAM and register file architectures and implementing advanced circuit design techniques. Performing schematic entry, simulation of major blocks, layout planning, and supervising the layout process while interfacing with the CAD team for full verification and model generation. Designing and implementing low-power, area-efficient embedded memory circuits and architectures, including SRAM and register files. Learning and applying advanced skills in memory compilers, focusing on transistor-level circuit design and automation. Resolving a wide range of design and implementation challenges through creative, resourceful methods and collaborating closely with internal and external stakeholders. Networking with senior engineers across disciplines and locations to ensure optimal solutions and knowledge sharing. Driving projects from conception through to completion, ensuring timely delivery and high quality. The Impact You Will Have: Contribute to the development of cutting-edge embedded memory IP that powers the next generation of integrated circuits. Enhance the performance, efficiency, and scalability of Synopsys' memory solutions, directly impacting customers' product capabilities. Enable faster, more reliable, and lower-power system-on-chip (SoC) designs for a wide range of applications, from consumer electronics to automotive and AI. Support cross-functional teams by providing technical expertise and driving best practices in memory architecture and design. Foster innovation within the team, championing new ideas and approaches to complex design challenges. Uphold Synopsys' reputation for delivering high-quality, reliable, and innovative semiconductor IP to global customers. What You'll Need: BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from a recognized institute or university. Minimum of 2+ years of experience in VLSI design, with a strong focus on embedded memory (SRAM/Register File) architectures. Expertise in advanced custom circuit design and a deep understanding of full embedded memory design flow, including architecture, physical implementation, and compiler automation. Hands-on experience with FinFET and deep submicron technology nodes, including variation-aware design techniques. Mastery in scripting languages such as Perl and Python for design automation and optimization. Solid understanding of CMOS fundamentals, digital design, transfer functions, and RC circuit analysis. Familiarity with both digital and analog fundamentals, as well as CMOS fabrication processes. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator who thrives in cross-functional, multicultural teams. Proactive and self-driven, with a strong sense of ownership and accountability. Flexible, adaptable, and eager to learn new technologies and methodologies. Collaborative team player who values diversity and inclusion. Customer-focused, with a commitment to delivering high-quality solutions on time. The Team You'll Be A Part Of: You will join the Embedded Memory and Logic Team in Noida, a dynamic group within the Solutions Group at Synopsys. The team is dedicated to the development of standard and custom embedded SRAMs and ROMs, providing both functional and physical memory views through cutting-edge memory compilers. With end-to-end responsibility for bit cell analysis, architecture design, characterization, and verification, the team thrives on innovation, collaboration, and technical excellence. You'll work alongside talented engineers who are passionate about advancing semiconductor technology and delivering world-class IP solutions to global customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process

Job Description The candidate will be responsible for implementing the place and route of design blocks including floorplanning, placement, clock tree building, routing, timing optimizations, DRC, LVS fixing, IR drop analysis, Formal verification, power intent checks etc. The candidate will also be responsible for block-level physical design closure in terms of timing, power, DRC/LVS, etc. Requirements 3-8years of experience in ASIC Physical Design Have good knowledge of the entire physical design process from floorplan to GDSII generation Good Exposure to Physical Verification Process Have hands-on experience in the latest sub-micron technologies below 10 nm Hands–on experience in leading PnR tools Synopsys ICC/ICC2 Experience in low power designs and handling congestion or timing critical tiles will be preferred Should be a quick learner and have good attention to detail Experience in ECO implementation preferred Scripting skills in Perl/Tcl/Python etc Must have good communication & problem-solving skills. Should be able to handle PnR tasks with minimal supervision

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a deep understanding of Analog and Mixed Signal Circuit Layout. With a minimum of 9 years of experience, you bring a strong background in transistor-level analog and mixed-signal layout design. You possess extensive knowledge in CMOS and FINFET technologies, and your expertise in semiconductor device physics sets you apart. Your problem-solving skills are top-notch, and you are detail-oriented, self-directed, and passionate about learning new techniques. You are adept at communicating effectively with cross-functional teams to ensure successful project execution. You thrive in a dynamic environment and are excited about the opportunity to contribute to cutting-edge technology that drives the future. What You’ll Be Doing: Plan, estimate area/time, schedule, delegate, and execute tasks to meet project milestones in a multi-project environment. Collaborate with cross-functional teams to ensure successful project execution. Create and review layout documents to ensure they meet quality standards and are delivered on time. Support the team in troubleshoot physical verification issues to achieve clean and desired results Device level floorplan, placement, routing, and physical verification of all critical high-speed blocks Design and development of transistor-level Analog and mixed-signal layout as per project needs The Impact You Will Have: You will drive the Layout design of the project from Floorplan, design and development till the project release. You will drive the Layout design of the project from Floorplan till the project release and lead the project throughout the entire design and development phase. Strong Knowledge and experience in layout design of high-speed blocks in latest Tech Nodes (2nm, 3nm, 5nm) You will drive the design and development of high-quality analog and mixed-signal layouts. Your expertise will ensure the successful implementation of CMOS and FINFET technologies. Through effective troubleshooting, you will contribute to achieving clean physical verification results. Your attention to detail will ensure that layout documents meet quality standards and deadlines. By managing project schedules and milestones, you will help deliver projects on time. Your collaboration with cross-functional teams will enhance project success and innovation What You’ll Need: Bachelor's or Master's degree in Electrical Engineering or a related field. Minimum 9+ years of experience in Analog and Mixed Signal Circuit Layout. Proficiency in Analog Layout Flow from device placement to GDS release. Strong knowledge of CMOS and FINFET technologies and semiconductor device physics. Experience with EDA tools for custom mixed-signal layout flows. Understanding of CMOS fabrication technology and deep sub-micron effects on layout. Knowledge of electro-migration, reliability concepts, and ESD/LUP concepts as applied to layout. Passion for learning and exploring new techniques. Who You Are: A proactive leader with excellent communication and mentoring skills. Detail-oriented and committed to delivering high-quality results. Innovative and capable of driving technological advancements. Collaborative and able to work effectively with cross-functional teams. A problem-solver with strong analytical skills. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative layout design team focused on creating high-performance analog and mixed signal layouts. The team is dedicated to excellence and continuous improvement, working collaboratively to achieve the organization's goals.

Alternate Job Titles: Staff Implementation Engineer Senior Physical Design Engineer Technical Solutions Engineer We Are: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules. You Are: You are a highly skilled and passionate engineer with a talent for tackling complex problems and a strong desire to advance cutting-edge technology. With over five years of experience in Physical Implementation RTL-GDS, you bring deep expertise in autonomously diagnosing and resolving synthesis and place-and-route (PnR) challenges. You are proficient in scripting languages like Tcl, Unix, and Perl, and possess an in-depth knowledge of Synopsys implementation tools. Your strong communication abilities enable you to engage effectively with both customers and internal teams, ensuring precise and attentive fulfillment of their needs. Driven, self-starting, and highly collaborative, you excel in environments where you can advocate for customers and represent the product. Additionally, your ability to translate technical insights into actionable requirements for R&D teams plays a crucial role in driving innovation and strengthening Synopsys solution capabilities. What You’ll Be Doing: Providing technical support and expertise to global customers using Synopsys Implementation products. Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow. Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement. Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies. Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues. Rolling out new product methodologies by providing training and technical support to customers. The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction. Driving innovation by addressing design challenges and improving product performance based on customer feedback. Collaborating with R&D teams to advance future technologies and product features. Promoting Synopsys tools to grow market presence and adoption. Ensuring seamless EDA transitions to optimize customer outcomes. Strengthening Synopsys' reputation as a leader in silicon design and verification. What You’ll Need: Bachelor's or Master's degree in Electrical Engineering, Computer Science, or a related field. Expertise in Implementation Methodologies and Synopsys Tool Fusion Compiler. Knowledge of STA, Low Power Flows, Design Planning, and scripting languages like TCL/Python. Thorough understanding of RTL to GDS flows and methodologies. Excellent verbal and written communication skills. Experience in customer-facing roles is a plus. Deep domain knowledge in Synthesis, Place & Route, and timing analysis, with multiple chip tape-outs at 7nm or lower nodes. Who You Are: An effective communicator with strong interpersonal skills. A proactive self-starter who takes initiative and drives projects to completion. A collaborative team player who values teamwork and collective success. Detail-oriented and committed to delivering high-quality solutions. Adaptable and eager to learn new technologies and methodologies. The Team You’ll Be A Part Of: You will be part of a dedicated team of application engineers focused on providing top-notch technical support and solutions to our customers. The team's core purpose is to ensure customer success and satisfaction by leveraging Synopsys' cutting-edge technologies and products. You will collaborate closely with other engineers, sales teams, and product development teams to achieve our collective goals and drive innovation in the industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Category Engineering Hire Type Employee Job ID 12216 Remote Eligible No Date Posted 14/07/2025 Alternate Job Titles: Senior R&D Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and driven engineering professional with a strong foundation in VLSI concepts, CMOS circuit design, and EDA tools. With2-3 years of hands-on experience in the semiconductor industry, you thrive in dynamic environments where innovation, collaboration, and continuous learning are valued. Your curiosity drives you to explore emerging technologies such as AI/ML, and you have developed proficiency in scripting languages like TCL and Python to solve complex engineering challenges. You have a keen eye for detail and a solid grasp of timing, power, and noise analysis, enabling you to deliver robust and reliable design solutions. Your exposure to industry-standard tools such as VCS, Design Compiler, Primetime, and HSPICE/Primesim has honed your technical expertise, and you are comfortable navigating various stages of the design flow, from synthesis to signoff. As a team player, you communicate effectively,

Category Engineering Hire Type Employee Job ID 12219 Remote Eligible No Date Posted 14/07/2025 Alternate Job Titles: Staff Implementation Engineer Senior Physical Design Engineer Technical Solutions Engineer We Are: At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated ASIC Digital Design Engineer with a relentless passion for innovation and a commitment to excellence. Your deep expertise in digital design and verification is matched by your curiosity and willingness to tackle complex challenges. You have a solid foundation in microprocessor architectures and are adept at developing and maintaining hardware-software co-simulation environments. Your analytical mindset enables you to create comprehensive functional and code coverage models, and you handle regression testing with precision and care. Your technical toolkit is robust: you are fluent in HDL and verification languages such as SystemVerilog and Verilog, and you bring strong programming skills in C, C++, assembly, Python, and Perl. You are comfortable using RTL simulators and verification tools and are always eager to expand your technical horizons by learning new methodologies. Collaboration is second nature to you—you thrive in multi-cultural, multi-time zone teams and foster inclusive teamwork. Your excellent communication skills ensure that your ideas are heard and understood, and you enjoy sharing your knowledge while learning from others. You take pride in delivering high-quality, reliable work, and you are driven by the opportunity to make a meaningful impact on the future of technology. What You’ll Be Doing: Developing and automating advanced testbenches for ARC processor verification processes. Creating and maintaining functional coverage models and analyzing coverage reports for completeness and effectiveness. Performing comprehensive code coverage analysis to ensure thorough verification and identify potential gaps. Integrating both third-party and internal verification IPs into verification environments. Managing regression testing cycles, analyzing results, and ensuring robust test coverage across all features. Collaborating with multi-site and multi-cultural teams to drive next-generation ARC processor verification projects. Contributing to the improvement of verification methodologies and automation flows. The Impact You Will Have: Ensuring the reliability and high performance of next-generation ARC-V processors. Contributing to the delivery of cutting-edge silicon IP solutions that power industry-leading products. Enhancing the efficiency and effectiveness of verification techniques and processes. Reducing time-to-market for high-performance, low-risk products through rigorous verification. Championing collaboration and knowledge sharing across global engineering teams. Helping Synopsys maintain and strengthen its leadership position in the semiconductor industry. What You’ll Need: Bachelor’s degree in engineering or a related technical field (required). 4+ years of experience in digital design and verification, with a proven track record of success. Strong knowledge of digital design principles and methodologies. Proficiency in SystemVerilog, Verilog, C, C++, assembly, Python, and Perl. Hands-on experience with RTL simulators and verification tools. Experience with microprocessor architectures (RISC-V experience is a significant plus). Who You Are: An excellent communicator with strong verbal and written skills. A collaborative team player who thrives in a multi-cultural, multi-time zone environment. Analytically minded with exceptional problem-solving skills and attention to detail. Adaptable and eager to learn new technologies, tools, and methodologies. Self-driven, proactive, and passionate about delivering high-quality, reliable results. The Team You’ll Be A Part Of: You will be a key member of the Synopsys DesignWare ARC Processor hardware team, working alongside talented engineers on next-generation ARC processor verification. The team is dedicated to developing and maintaining advanced verification environments, ensuring the high performance and reliability of our silicon IP solutions. You will collaborate with colleagues across various locations and time zones, contributing to innovative projects that drive the semiconductor industry forward. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job Titles: Standard Cell Layout Staff Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate engineering professional eager to leverage your expertise in standard cell layout and CMOS technologies to create foundational building blocks for tomorrow’s electronics. You thrive in a fast-paced, collaborative environment and are committed to continuous learning and innovation. Your experience spans across fundamental electronics concepts, digital logic design, and advanced semiconductor processes, with a special interest in deep submicron technology nodes. You are adept at balancing technical excellence with project leadership, making critical decisions to ensure timely delivery and technological advancement. Your curiosity drives you to explore new methods, such as AI-based automation, to streamline design flows and elevate productivity. You are a strong communicator, able to articulate complex technical concepts clearly to global teams. You embrace diversity, adapt seamlessly to multicultural work environments, and value the perspectives of colleagues from around the world. Your systematic approach to problem solving, combined with your willingness to think outside the box, makes you a trusted contributor and a leader within your team. You have a solid foundation in programming, are comfortable working with EDA tools, and demonstrate a keen understanding of both hardware and software aspects of the design process. Above all, you are motivated by the impact your work has on groundbreaking products in automotive, AI, IoT, and more. What You’ll Be Doing: Designing and implementing advanced standard cell layouts, including custom and semi-custom cell development. Applying in-depth knowledge of CMOS processes and deep submicron technologies to optimize layout for performance, power, and area. Collaborating closely with cross-functional teams to ensure seamless integration of standard cells into ASIC design flows. Utilizing EDA tools for schematic capture, layout design, and verification, ensuring compliance with design rules and quality standards. Developing and automating layout processes using programming languages such as C, Python, Perl, and UNIX scripting. Leading projects, making critical decisions based on timelines and technology challenges, and mentoring junior engineers. Exploring and implementing AI-based automation techniques to enhance layout efficiency and problem-solving capabilities. The Impact You Will Have: Enable high-performance and power-efficient chip designs by delivering robust standard cell libraries. Drive innovation in deep submicron and advanced technology nodes, positioning Synopsys as a leader in semiconductor design. Streamline ASIC and SoC development cycles through effective layout automation and workflow optimization. Foster a culture of technical excellence, innovation, and continuous improvement within your team and the broader organization. Support global customers and internal teams with expert guidance on layout methodologies and best practices. Contribute to the successful integration of new technologies, such as AI-driven design automation, into mainstream design flows. What You’ll Need: Strong understanding of electronics fundamentals, including logic gates, flip-flops, latches, multiplexers, and level shifters. Expertise in CMOS design, layout concepts, and deep submicron process technologies. Proficiency in ASIC design flows, standard cell development, and layout automation. Hands-on experience with EDA tools for schematic and layout design (e.g., Cadence, Synopsys, Mentor Graphics). Advanced programming skills in C, Python, Perl, and UNIX; automation experience is highly valued. Familiarity with AI-based automation and problem-solving approaches is a plus. Who You Are: An innovative thinker with a systematic approach to solving complex problems. A strong communicator, adept at working with global teams and articulating technical ideas clearly. Adaptable and able to collaborate with colleagues from diverse backgrounds and regions. Proactive leader capable of making informed decisions and guiding projects through technical challenges. Open-minded, curious, and always seeking opportunities for growth and improvement. The Team You’ll Be A Part Of: You’ll join a dynamic, multidisciplinary team of experts dedicated to advancing standard cell design and layout methodologies. The team values collaboration, creativity, and technical rigor, working together to deliver best-in-class solutions for Synopsys’ global customers. You’ll have the opportunity to mentor, learn from, and inspire colleagues while contributing to high-impact projects that define the future of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Job description Company: ARF Design Pvt Ltd Location: Bhubaneswar and Ranchi Employment Type: Full-Time | Permanent Working Days: Monday to Saturday Interview Mode: Face-to-Face Job Description:– Analog Layout Engineer We are actively hiring Analog Layout Engineers with 3+ years of industry experience. Ideal candidates must have solid expertise in lower technology nodes, physical layout techniques, and verification processes. ARF provides an excellent platform to work on advanced nodes with fast-track interview and onboarding processes. Key Responsibilities: ● Design and development of analog layout IP blocks and full-chip integration ● Perform and resolve LVS/DRC violations independently ● Collaborate with circuit design teams to optimize layout quality and performance ● Ensure layouts meet design matching and parasitic constraints ● Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: ● 3+ yrs of relevant Analog Layout experience ● Proficiency in LVS/DRC checks and EDA tools ● Experience with lower technology nodes (3nm,5nm,7nm,10, 16nm / 28nm ETC) ● Good understanding of layout matching, parasitic extraction, and floor planning ● Strong verbal and written communication skills ● Ability to work independently and within cross-functional teams Job Description:– Circuit Design Engineer ARF Design is hiring Analog Mixed Signal Designers to work on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. Key Responsibilities: ● Derive circuit block level specifications from top level specifications ● Perform optimized transistor-level design of analog and custom digital blocks ● Run SPICE simulations to meet detailed specifications ● Guide layout design for best performance, matching, and power delivery ● Characterize design performance across PVT + mismatch corners and reliability checks (aging, EM, IR) ● Generate and deliver behavioral (Verilog), timing (LIB), and physical (LEF) models of circuits ● Conduct design reviews at various phases/maturity of the design Qualifications: ● BE/M-Tech in Electrical & Electronics ● Strong fundamentals in RLC circuits, CMOS devices and digital design concepts (e.g., counters, FSMs) ● Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators ● Collaborative mindset with a positive attitude Exp: 3+ Please share updated resume [Name_Post_Exp] to divyas@arf-desgn.com Job Types: Full-time, Permanent Work Location: In person

Category Engineering Hire Type Employee Job ID 12161 Remote Eligible No Date Posted 14/07/2025 Senior Standard Cell Layout Engineer Standard Cell Layout Designer Digital Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated professional with a robust technical background in standard cells layout design. Your passion for excellence and precision drives you to create layouts that set the standard for quality and manufacturability. You thrive in collaborative, cross-functional environments, seamlessly working with circuit designers, verification engineers, and other stakeholders to deliver optimized layout solutions. Your expertise in industry-leading EDA tools—such as Cadence Virtuoso or Synopsys Custom Compiler—enables you to tackle complex digital circuit layouts with efficiency and accuracy. Your systematic approach and strong problem-solving skills allow you to navigate technical challenges with ease, always seeking innovative ways to enhance design methodologies and best practices. You are deeply familiar with physical verification processes and design rule checks, ensuring that every layout you deliver meets stringent quality and manufacturability standards. Your curiosity and commitment to lifelong learning keep you updated on the latest advancements in standard cell layout design, making you an invaluable resource for your team. You communicate effectively, embrace feedback, and are eager to contribute to a culture of continuous improvement and

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineer eager to make a significant impact in the world of embedded memory development. With a strong academic background in Electrical & Electronics Engineering and at least 2 years of hands-on experience in VLSI design, you thrive in collaborative, innovative environments. You possess a deep understanding of SRAM and Register File architectures, and you are well-versed in the nuances of advanced custom circuit implementation, especially at the most advanced technology nodes such as FinFET and submicron processes. Your expertise in scripting and automation, combined with a solid grasp of both digital and analog fundamentals, empowers you to tackle complex challenges and deliver high-quality, efficient solutions. You are a creative problem-solver who welcomes technical challenges and approaches them with curiosity and determination. Your communication skills, adaptability, and ability to work seamlessly across teams make you a valued collaborator. You are committed to continuous learning and excited by the prospect of working at the intersection of technology and innovation. As an advocate for best practices and a mentor to junior engineers, you foster an environment of growth and inclusion. Your commitment to excellence, quality, and customer focus ensures that you deliver solutions that exceed expectations and contribute meaningfully to Synopsys’ leadership in the semiconductor industry. What You’ll Be Doing: Developing innovative multiport SRAM and register file architectures and implementing advanced circuit design techniques. Performing schematic entry, simulation of major blocks, layout planning, and supervising the layout process while interfacing with the CAD team for full verification and model generation. Designing and implementing low-power, area-efficient embedded memory circuits and architectures, including SRAM and register files. Learning and applying advanced skills in memory compilers, focusing on transistor-level circuit design and automation. Resolving a wide range of design and implementation challenges through creative, resourceful methods and collaborating closely with internal and external stakeholders. Networking with senior engineers across disciplines and locations to ensure optimal solutions and knowledge sharing. Driving projects from conception through to completion, ensuring timely delivery and high quality. The Impact You Will Have: Contribute to the development of cutting-edge embedded memory IP that powers the next generation of integrated circuits. Enhance the performance, efficiency, and scalability of Synopsys’ memory solutions, directly impacting customers’ product capabilities. Enable faster, more reliable, and lower-power system-on-chip (SoC) designs for a wide range of applications, from consumer electronics to automotive and AI. Support cross-functional teams by providing technical expertise and driving best practices in memory architecture and design. Foster innovation within the team, championing new ideas and approaches to complex design challenges. Uphold Synopsys’ reputation for delivering high-quality, reliable, and innovative semiconductor IP to global customers. What You’ll Need: BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from a recognized institute or university. Minimum of 2+ years of experience in VLSI design, with a strong focus on embedded memory (SRAM/Register File) architectures. Expertise in advanced custom circuit design and a deep understanding of full embedded memory design flow, including architecture, physical implementation, and compiler automation. Hands-on experience with FinFET and deep submicron technology nodes, including variation-aware design techniques. Mastery in scripting languages such as Perl and Python for design automation and optimization. Solid understanding of CMOS fundamentals, digital design, transfer functions, and RC circuit analysis. Familiarity with both digital and analog fundamentals, as well as CMOS fabrication processes. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator who thrives in cross-functional, multicultural teams. Proactive and self-driven, with a strong sense of ownership and accountability. Flexible, adaptable, and eager to learn new technologies and methodologies. Collaborative team player who values diversity and inclusion. Customer-focused, with a commitment to delivering high-quality solutions on time. The Team You’ll Be A Part Of: You will join the Embedded Memory and Logic Team in Noida, a dynamic group within the Solutions Group at Synopsys. The team is dedicated to the development of standard and custom embedded SRAMs and ROMs, providing both functional and physical memory views through cutting-edge memory compilers. With end-to-end responsibility for bit cell analysis, architecture design, characterization, and verification, the team thrives on innovation, collaboration, and technical excellence. You’ll work alongside talented engineers who are passionate about advancing semiconductor technology and delivering world-class IP solutions to global customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Category Interns/Temp Hire Type Intern Job ID 9722 Date Posted 14/07/2025 We Are: Drive technology innovations that shape the way we live and connect. Our technology drives the Era of Pervasive Intelligence, where smart tech and AI are seamlessly woven into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world. Apprenticeship Experience: At Synopsys, Apprentices dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide—and having fun in the process! You'll have the freedom to

Category Engineering Hire Type Employee Job ID 12160 Remote Eligible No Date Posted 14/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performan ce silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and innovative engineer dedicated to pushing the boundaries of semiconductor technology. You thrive in a collaborative environment where your expertise in embedded memory architectures and deep submicron technologies is highly valued. With a strong foundation in VLSI design, you are adept at developing advanced SRAM, Register File, and ROM solutions that balance high performance, low power, and area efficiency. Your keen analytical abilities enable you to resolve complex challenges creatively, and you are comfortable working both independently and as part of a cross-function al team. You excel at managing multiple priorities and are proactive in identifying and addressing issues that may impact project timelines. Your leadership skills empower you to coordinate and motivate teams, ensuring the successful completion of challenging projects in record time. With a customer-focus ed mindset, you communicate effectively with both internal and external stakeholders, leveraging your technical expertise to deliver innovative solutions. Your commitment to continuous learning keeps you at the forefront of industry trends, and your mastery of scripting and automation streamlines development processes. Above all, you are motivated by the opportunity to shape the future of silicon technology and make a tangible impact on the world. What You'll Be Doing: Developing multiport SRAM/Register file architectures and implementing cutting-edge circuit design techniques. Leading schematic entry, simulation of major blocks, layout planning, and collaborating with CAD teams for verification and model generation. Designing and optimizing low-power, area-efficient embedded memory circuits, including SRAM and register files. Learning and ing advanced skills in transistor-lev el memory compiler design and automation. Driving resolution of complex technical issues with creative problem-solvin g and cross-function al collaboration. Interacting with senior technical personnel, customers, and cross-site teams to deliver high-quality memory IP solutions. Coordinating and facilitating the daily activities of project teams, ensuring alignment with project goals and schedules. Prioritizing workloads and proactively communicating issues impacting productivity to stakeholders. The Impact You Will Have: Accelerate the development of industry-leadi ng embedded memory IP, enabling next-generatio n integrated circuits. Enhance the performance, power efficiency, and area optimization of Synopsys' memory compiler offerings. Drive successful project execution by providing technical leadership and fostering a culture of innovation. Strengthen Synopsys' position as a trusted partner for semiconductor companies worldwide. Contribute to the continuous improvement of design methodologies and automation flows. Mentor and guide junior engineers, cultivating technical excellence within the team. Promote customer satisfaction by delivering reliable, high-quality memory solutions on time. What You'll Need: BE /B.Tech/ME/M.T ech/MS in Electrical & Electronics Engineering from a premier institute/univ ersity. Minimum 4 years of hands-on experience in VLSI Design, with a focus on embedded memory architecture and circuit design. Deep understanding of SRAM/Register File architectures and advanced custom circuit implementation s. Experience working with advanced technology nodes, including FinFET and deep submicron processes. Proficiency in scripting languages such as Perl and Python for design automation. Expertise in full embedded memory design flow: from architecture, circuit design, and physical implementation to compiler automation, characterizati on, timing, and model generation. Solid knowledge of CMOS fundamentals, fabrication processes, and digital/analog circuit fundamentals. Understanding of RC circuits, Boolean function realization, transfer function analysis, and stability. Who You Are: An innovative thinker with strong analytical and problem-solvin g skills. Self-driven, able to manage multiple tasks with minimal supervision. Effective communicator, adept at networking and collaborating with diverse teams and stakeholders. Customer-focus ed, with a commitment to delivering high-quality solutions. Leadership qualities with the ability to guide, motivate, and mentor team members. Adaptable and eager to learn new technologies and methodologies. Detail-oriente d and proactive in addressing project challenges and risks. The Team You'll Be A Part Of: You'll join the Embedded Memory and Logic Team in Noida, a key part of Synopsys' Solutions Group. This dynamic team is responsible for the end-to-end development of standard and custom embedded SRAMs/ROMs, delivering both functional and physical memory views through innovative compiler IP for complex integrated circuits. The group values technical excellence, collaboration, and continuous learning, working closely with global teams to drive memory innovation and deliver world-class solutions to our customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. IPPD: Physical design engineer Physical Implementation activities for high performance Cores for 16/14/7/5nm or lower technologies, which includes all or some of the below. Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), Low Power verification, PDN, Timing Closure and / or power optimization Exposure to PD implementation of PPA critical cores. Exposure to timing convergence of high frequency data-path intensive Cores and advanced STA concepts. Able to handle Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes. Understanding of clocking architecture. Tcl/Python/Perl Scripting aware for small automation Strong problem-solving skills , good communication skills and good team player Collaborate with design, DFT and PNR teams and support issue resolutions wrt constraints validation, verification, STA, Physical design, etc. Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries). Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law. To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications. If you would like more information about this role, please contact Qualcomm Careers. 3069942

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SILICON DESIGN ENGINEER 2 The Role As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. The Person You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Key Responsibilities Run spice simulations and capture that data using script written using a programing language Perform task of debugging design timing related issues both in Spice simulations and STA reports Std cell characterization using Synopsys Silicon smart tool Run internal scripts for timing capture and update scripts when necessary Preferred Experience Basic STA knowledge CMOS Technology fundamentals Transistor level understanding of the circuit Digital hardware designing using Verilog H-Spice simulations, exposure to STA tools like Primetime Experience in scripting language like perl, python and tcl Ability to work individually and in a team Academic Credentials Bachelors or Masters degree in ECE with 3+ years of relevant experience Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ SENIOR SILICON DESIGN ENGINEER The Role Join AMD as we push the boundaries of what's possible in graphics and compute technology. We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP. This role involves transforming sophisticated RTL designs into robust and efficient physical layouts, critical to the performance of our next-generation graphics and compute solutions. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Key Responsibilities Physical Design Implementation: Translate complex CDNA and RDNA graphics IP RTL designs into optimized physical layouts. Utilize industry-leading EDA tools for synthesis, place-and-route (PnR), and physical verification processes to take the design thru mock-taepout Performance Optimization: Focus on power, performance, and area (PPA) optimization to meet the stringent requirements of high-performance graphics and compute products. Collaborate with architecture and front-end design teams to align RTL design with physical constraints and objectives. Verification and Timing Closure: Conduct static timing analysis (STA) to ensure robust timing closure and sign-off for graphics IP. Implement and verify design rule checks (DRC), layout versus schematic checks (LVS), and power grid analysis tailored to CDNA and RDNA requirements. Collaboration and Communication: Work closely with cross-functional teams, including architects, RTL designers, and verification engineers to ensure seamless integration and functionality of graphics IP cores. Provide feedback and suggest improvements to design methodologies and processes to push the technology envelope further. Documentation and Reporting: Maintain comprehensive design documentation, methodologies, and updates. Prepare detailed reports on design progress, performance metrics, and any technical challenges encountered. PREFERRED EXPERIENCE: Domain Expertise: Experience with working on complex design and optimizing for performance, power, and area. Technical Proficiency: Proven track record in RTL synthesis, place-and-route (PnR), and static timing analysis (STA) for complex IP cores. Proficiency with industry-leading EDA tools, such as Synopsys Design Compiler, Cadence Innovus, and timing analysis tools like PrimeTime. Experience with low-power design methodologies and techniques for high-performance graphics IP. Design and Verification: Successful completion of full-chip sign-off, including design rule checks (DRC) and layout versus schematic (LVS) checks. Strong skills in signal integrity analysis, including crosstalk and IR drop evaluations. Process Technology: Experience working with advanced semiconductor process nodes (e.g., 7nm, 5nm, or below). Knowledge of process-related challenges and optimization techniques for graphics applications. Scripting and Automation: Proficiency in scripting languages such as Perl, Python, or TCL to automate design flows and improve efficiency. Experience developing and maintaining scripts for design rule checks and optimization processes. Problem-Solving and Innovation: Demonstrated ability to solve complex design challenges using innovative approaches. A track record of contributing to the improvement of design techniques and methodologies in a graphics-focused engineering team. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Company: ARF Design Pvt Ltd Location: Bhubaneswar and Ranchi Employment Type: Full-Time | Permanent Working Days: Monday to Saturday Interview Mode: Face-to-Face Job Description:– Analog Layout Engineer We are actively hiring Analog Layout Engineers with 3+ years of industry experience. Ideal candidates must have solid expertise in lower technology nodes, physical layout techniques, and verification processes. ARF provides an excellent platform to work on advanced nodes with fast-track interview and onboarding processes. Key Responsibilities: ● Design and development of analog layout IP blocks and full-chip integration ● Perform and resolve LVS/DRC violations independently ● Collaborate with circuit design teams to optimize layout quality and performance ● Ensure layouts meet design matching and parasitic constraints ● Work with advanced nodes like 7nm, 16nm, and 28nm Required Skills: ● 3+ yrs of relevant Analog Layout experience ● Proficiency in LVS/DRC checks and EDA tools ● Experience with lower technology nodes (3nm,5nm,7nm,10, 16nm / 28nm ETC) ● Good understanding of layout matching, parasitic extraction, and floor planning ● Strong verbal and written communication skills ● Ability to work independently and within cross-functional teams Job Description:– Circuit Design Engineer ARF Design is hiring Analog Mixed Signal Designers to work on the design of building blocks used in high-speed IPs such as DDR/LPDDR/HBM/UCIe/MIPI/PCIe. Key Responsibilities: ● Derive circuit block level specifications from top level specifications ● Perform optimized transistor-level design of analog and custom digital blocks ● Run SPICE simulations to meet detailed specifications ● Guide layout design for best performance, matching, and power delivery ● Characterize design performance across PVT + mismatch corners and reliability checks (aging, EM, IR) ● Generate and deliver behavioral (Verilog), timing (LIB), and physical (LEF) models of circuits ● Conduct design reviews at various phases/maturity of the design Qualifications: ● BE/M-Tech in Electrical & Electronics ● Strong fundamentals in RLC circuits, CMOS devices and digital design concepts (e.g., counters, FSMs) ● Experience with custom design environments (e.g., Cadence Virtuoso, Synopsys Custom Design Family) and SPICE simulators ● Collaborative mindset with a positive attitude Exp: 3+ Please share updated resume [Name_Post_Exp] to divyas@arf-desgn.com

Role Description We are looking for an experienced and passionate Design and Verification Trainer to train and mentor aspiring engineers in RTL design , functional verification , and VLSI concepts . The ideal candidate should have hands-on experience with front-end design and verification methodologies and be comfortable delivering technical content in a structured, engaging, and clear manner. Required Skillsets Strong knowledge of hardware description languages like Verilog/System Verilog Proficiency in verification methodologies such as Universal Verification Methodology (UVM)/ SystemVerilog Assertions (SVA) is crucial Experience with simulation and debugging tools (e.g. Synopsys VCS/VERDI, Spyglass) Proficiency in Scripting Analytical and Problem Solving Skills Qualifications Master's degree in Electronics/VLSI Design (Preferable) Curriculum Development expertise Teaching and Instructional Design abilities Training experience Excellent communication and presentation skills Experience in VLSI design or semiconductor industry Design Thinking skills

Senior Silicon PD CAD Engineer Bangalore, Karnataka, India + 1 more location Date posted Jul 16, 2025 Job number 1844305 Work site Up to 50% work from home Travel 0-25 % Role type Individual Contributor Profession Hardware Engineering Discipline Silicon Engineering Employment type Full-Time Overview Microsoft’s Azure Hardware Systems and Infrastructure team are at the forefront of the technology revolution, driving the development and deployment of cutting-edge cloud infrastructure solutions. Within our Silicon Engineering team, you will have the opportunity to work with some of the brightest minds in the industry to help shape the future of Artificial Intelligence and Computing. Being the PD CAD Engineer, you will be at the forefront of solving complex problems and building systems that require a deep understanding of hardware and software principles; and collaborate with cross-functional teams to deliver solutions that meet the needs of our world class Silicon Engineering teams worldwide. You will be building smart and efficient CAD solutions for the infrastructure, design-flows, Quality checks & Analytics and pioneering, path-clearing & deploying the latest EDA technologies related to Physical design Implementation, various sign-offs requirements and SOC tape-out flows. We are committed to a diverse and inclusive workspace and strongly encourage applicants from all backgrounds and walks of life. Differences make us better! Come and be part of the making of the World’s Computer! #SCHIE #AHSI Qualifications Required Qualifications: 7+ years of EDA tools’ expertise in Cadence, Synopsys and/or other equivalent tools 4+ years of programming skills in (any of) the following languages: Python, TCL, Perl, SQL, UNIX bash/Makefile Knowledge of Physical Design CAD flows/tools Knowledge and good understanding of RTL2GDSII physical design and sign-off flows Exposure to Silicon design setup/environment, various design flows and methodologies used for silicon product development Preferred Qualifications: Having as many of these specific qualifications is a plus, but transferable skills/experiences may be equally valuable. Master’s degree in computer or electrical engineering with a specialization in VLSI Solid scripting experience in Python, TCL & shell Hands-on experience in two or more functional domains such as Synthesis, Power grid development, Design Planning, Place and Route, Static Timing Analysis, Physical verification, EMIR. Physical design experience on advanced nodes Hands-on experience with flow orchestration tools such as Altair FlowTracer, and compute batch schedulers such as Altair Accelerator. Experience in building & maintaining PD CAD flows Solid experience in driving & working closely with EDA partners to improve their offerings Responsibilities In this role you will: Develop and support the CAD flow for Top Level, Synthesis, Place and Route (PnR) and Signoff. Work with design teams to understand requirements and enable scalable solutions. Engage with EDA in providing cutting edge single-box solutions for multi-scenario Maximize design productivity with strong/efficient scripting skills and customization of tool flows Perform in-depth root-cause analysis, issue debug and qualification for Microsoft’s broad Silicon portfolio. Collaborate with EDA partners to determine/drive optimal and cutting-edge solutions for effective & efficient CAD solutions Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.  Industry leading healthcare  Educational resources  Discounts on products and services  Savings and investments  Maternity and paternity leave  Generous time away  Giving programs  Opportunities to network and connect Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10849 Date posted 07/16/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are passionate about solving complex problems at the intersection of software engineering and semiconductor technology. Your curiosity drives you to explore new solutions and approaches, especially in high-impact areas such as memory characterization and automation. With a strong foundation in computer science, electronics, or a related discipline, you thrive in environments where collaboration, innovation, and technical excellence are valued. You are detail-oriented, analytical, and always eager to learn and adapt as technology evolves. You take pride in building robust, maintainable code and are committed to delivering quality solutions that make a tangible difference. As a team player, you communicate clearly, seek feedback, and contribute to a culture of openness and continuous improvement. Whether working independently or in cross-functional teams, you bring a sense of accountability and ownership to your work. You are excited by the prospect of impacting the next generation of semiconductor products and motivated by the opportunity to drive productivity and efficiency through automation. If you are ready to challenge yourself, innovate, and help shape the future of memory IP development, Synopsys is the place for you. What You’ll Be Doing: Designing and developing robust software tools for automating memory characterization workflows, including simulation setup, data extraction, and report generation. Collaborating closely with memory design, CAD, and validation teams to understand requirements and implement solutions that enhance accuracy, scalability, and performance of characterization flows. Integrating EDA tools such as SPICE simulators, Liberty format analyzers, and waveform viewers into advanced automation flows. Optimizing simulation execution on large compute clusters and efficiently managing the vast data sets generated during memory characterization. Building modular, maintainable, and high-performance codebases using C++, Python, Shell/TCL scripts, and industry-standard software engineering tools. Contributing to the development of test infrastructure, debugging tools, and validation methodologies to ensure the correctness and consistency of characterization results. Participating in code reviews, providing innovative ideas, and driving improvements in productivity and tool efficiency across the team. The Impact You Will Have: Accelerate the delivery of high-performance memory compilers for advanced technology nodes (e.g.,5nm,3nm, and beyond), enabling cutting-edge products. Streamline and automate engineering flows, reducing manual effort and enhancing productivity for multidisciplinary teams. Enhance the quality and reliability of characterization data, directly contributing to Process Design Kits (PDKs), EDA tools, and customer deliverables. Drive innovations that improve cost-efficiency, scalability, and competitiveness of Synopsys’ global IP portfolio. Contribute to the continuous improvement of internal infrastructure, processes, and best practices, fostering a culture of technical excellence. Empower internal and external customers through robust, user-friendly tools that enable faster, more reliable delivery of semiconductor solutions. What You’ll Need: B.Tech/MTech in Computer Science, Electronics, or a related field. At least 2 years of experience in software development or EDA tool development, preferably within the semiconductor industry. Proficiency in C/C++, TCL, Python, SQL, and scripting languages such as Shell. Experience with debugging tools such as GDB, and memory debugging tools like Valgrind or Purify. Strong understanding of machine learning algorithms (supervised, unsupervised, reinforcement learning). Hands-on experience with Python ML libraries such as scikit-learn, TensorFlow, or PyTorch. Who You Are: Detail-oriented with excellent analytical and problem-solving abilities. Possess strong verbal and written communication skills, able to articulate complex technical concepts clearly. A collaborative team player who thrives in cross-functional and multicultural environments. Demonstrates accountability and ownership in delivering high-quality work. An innovative thinker passionate about technology, automation, and continuous learning. The Team You’ll Be A Part Of: You’ll be joining a dynamic and forward-thinking team dedicated to developing and maintaining advanced memory characterization tools for next-generation semiconductor technologies. The team is known for its strong collaboration across domains such as software, CAD, and design, and for fostering a culture of inclusivity and openness. Committed to continuous improvement, the team values innovation and feedback while delivering high-quality, impactful solutions that empower both internal teams and external customers. Together, you will be driving the future of memory IP development by solving complex challenges and pushing the boundaries of performance, scalability, and automation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and experienced engineer eager to make a significant impact in the world of embedded memory development. With a strong academic background in Electrical & Electronics Engineering and at least 2 years of hands-on experience in VLSI design, you thrive in collaborative, innovative environments. You possess a deep understanding of SRAM and Register File architectures, and you are well-versed in the nuances of advanced custom circuit implementation, especially at the most advanced technology nodes such as FinFET and submicron processes. Your expertise in scripting and automation, combined with a solid grasp of both digital and analog fundamentals, empowers you to tackle complex challenges and deliver high-quality, efficient solutions. You are a creative problem-solver who welcomes technical challenges and approaches them with curiosity and determination. Your communication skills, adaptability, and ability to work seamlessly across teams make you a valued collaborator. You are committed to continuous learning and excited by the prospect of working at the intersection of technology and innovation. As an advocate for best practices and a mentor to junior engineers, you foster an environment of growth and inclusion. Your commitment to excellence, quality, and customer focus ensures that you deliver solutions that exceed expectations and contribute meaningfully to Synopsys’ leadership in the semiconductor industry. What You’ll Be Doing: Developing innovative multiport SRAM and register file architectures and implementing advanced circuit design techniques. Performing schematic entry, simulation of major blocks, layout planning, and supervising the layout process while interfacing with the CAD team for full verification and model generation. Designing and implementing low-power, area-efficient embedded memory circuits and architectures, including SRAM and register files. Learning and applying advanced skills in memory compilers, focusing on transistor-level circuit design and automation. Resolving a wide range of design and implementation challenges through creative, resourceful methods and collaborating closely with internal and external stakeholders. Networking with senior engineers across disciplines and locations to ensure optimal solutions and knowledge sharing. Driving projects from conception through to completion, ensuring timely delivery and high quality. The Impact You Will Have: Contribute to the development of cutting-edge embedded memory IP that powers the next generation of integrated circuits. Enhance the performance, efficiency, and scalability of Synopsys’ memory solutions, directly impacting customers’ product capabilities. Enable faster, more reliable, and lower-power system-on-chip (SoC) designs for a wide range of applications, from consumer electronics to automotive and AI. Support cross-functional teams by providing technical expertise and driving best practices in memory architecture and design. Foster innovation within the team, championing new ideas and approaches to complex design challenges. Uphold Synopsys’ reputation for delivering high-quality, reliable, and innovative semiconductor IP to global customers. What You’ll Need: BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from a recognized institute or university. Minimum of 2+ years of experience in VLSI design, with a strong focus on embedded memory (SRAM/Register File) architectures. Expertise in advanced custom circuit design and a deep understanding of full embedded memory design flow, including architecture, physical implementation, and compiler automation. Hands-on experience with FinFET and deep submicron technology nodes, including variation-aware design techniques. Mastery in scripting languages such as Perl and Python for design automation and optimization. Solid understanding of CMOS fundamentals, digital design, transfer functions, and RC circuit analysis. Familiarity with both digital and analog fundamentals, as well as CMOS fabrication processes. Who You Are: Analytical thinker with strong problem-solving skills and attention to detail. Effective communicator who thrives in cross-functional, multicultural teams. Proactive and self-driven, with a strong sense of ownership and accountability. Flexible, adaptable, and eager to learn new technologies and methodologies. Collaborative team player who values diversity and inclusion. Customer-focused, with a commitment to delivering high-quality solutions on time. The Team You’ll Be A Part Of: You will join the Embedded Memory and Logic Team in Noida, a dynamic group within the Solutions Group at Synopsys. The team is dedicated to the development of standard and custom embedded SRAMs and ROMs, providing both functional and physical memory views through cutting-edge memory compilers. With end-to-end responsibility for bit cell analysis, architecture design, characterization, and verification, the team thrives on innovation, collaboration, and technical excellence. You’ll work alongside talented engineers who are passionate about advancing semiconductor technology and delivering world-class IP solutions to global customers. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Position: - Sales Engineer / Sr Sales Engineer- ESG Qualification: BE/ B Tech. in Electronics / Mechanical Experience: 2- 5 Years Location: Delhi /Hyderabad /Pune/ Kolkata The Sales Engineer is a customer facing role, responsible for the complete sales process - demand creation, mapping of accounts and closure. The candidate should be able to effectively communicate EDA / MCAD product capabilities and the benefits of the solutions through presentations and sales demonstrations. Conduct discovery and requirements gathering sessions to analyze and understand customer needs, workflows and technical requirements. Develop and/or collate sample documents, applications and other sales enablement materials for use during the sales and marketing sessions. Collaborate with Technical and services teams to specify, recommend and architect comprehensive customer solutions Required Skills : Relevant Sales experience in Defense / Institutional Sales /Private Commercial Sales/Academics Sales experience in Application or Engineering Software Knowledge on EDA tools Siemens EDA / Cadence / Synopsys Knowledge on MCAD tools Cero (ProE)/UGNX/Catia/Solid edge/Solid works/Inventor Knowledge on CAE Tools – Ansys/Nastran/Adams/Altair Knowledge of Procurement procedures such as Tender, Gem portal, E-tender, etc. Must be aware about the complete sales cycle Responsibilities: Identify customer needs and recommend suitable products/solutions Deliver product/concept presentations and conduct industry seminars Resolve client queries and manage sales concerns Capable of analyzing the merit of opportunities Skilled in identifying customer pain points Soft Skills: Team-oriented with strong analytical and presentation skills Creative, confident, and proactive Able to perform under pressure and meet targets Culturally adaptable with strong convincing skills Willing to travel extensively (70–75%) Role & responsibilities Preferred candidate profile

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Required Skills and Experience : Bachelor’s or Master’s Degree or equivalent experience in Electronics Engineering, Microelectronics, Software Engineering or a related field. The role of Senior DFT engineer require 5+ years of industry experience with shown ability in DFT of highly sophisticated SOCs : Core skills include Scan Codec insertion, Memory BIST and Repair implementation, Logic BIST, ATPG, BSCAN & JTAG (IEEE1149.1 & IEEE1687), Fault Simulation, ATPG Fault models(SAF, TDF, SDD, PDT etc), SDF annotated gate level verification, Scan and Memory Diagnosis. Must have experience with Siemens, Synopsys and/or Cadence Cad tools. Shall have experience in coding with Verilog, VHDL, C/C++, TCL, Perl and or Python. Responsibilities - Accountable for innovative DFT implementation(Scan, MBIST, LBIST & Boundary Scan) at the RTL and Gate level for a given SOC at Hard macro and chip top level. Generate and validate ATPG patterns using simulations. Shall Validate the DFT implementation using RTL and Gate level simulation. Work with Multi-functional Teams on STA, Synthesis, LEC, CLP, verification & Validation. Support the Silicon bring up activities to guarantee the highest stability of the test patterns/program. Chip in to the overall DFT methodology development. Nice to have Skills/Experience :- Shall have Knowledge of IEEE 1149.6, 1500 and 1838. Good experience on Hierarchical Scan implementations with core wrapping concepts Experience in handling multi-clock domains and low power design implementation. Knowledge/Experience on SSN, 2.5D or 3D IC DFT implementation. Communicate effusively with multi-functional functional teams in different geographies and time Zones. Time management and multi-tasking skills. Job Location: You will be joining part of growing team in Hyderabad About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_india@micron.com Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.

Category Engineering Hire Type Employee Job ID 12140 Remote Eligible No Date Posted 13/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated ASIC Digital Design Engineer with a relentless passion for innovation and a commitment to excellence. Your deep expertise in digital design and verification is matched by your curiosity and willingness to tackle complex challenges. You have a solid foundation in microprocessor architectures and are adept at developing and maintaining hardware-software co-simulation environments. Your analytical mindset enables you to create comprehensive functional and code coverage models, and you handle regression testing with precision and care. Your technical toolkit is robust: you are fluent in HDL and verification languages such as SystemVerilog and Verilog, and you bring strong programming skills in C, C++, assembly, Python, and Perl. You are comfortable using RTL simulators and verification tools and are always eager to expand your technical horizons by learning new methodologies. Collaboration is second nature to you—you thrive in multi-cultural, multi-time zone teams and foster inclusive teamwork. Your excellent communication skills ensure that your ideas are heard and understood, and you enjoy sharing your knowledge while learning from others. You take pride in delivering high-quality, reliable work, and you are driven by the opportunity to make a meaningful impact on the future of technology. What You’ll Be Doing: Developing and automating advanced testbenches for ARC processor verification processes. Creating and maintaining functional coverage models and analyzing coverage reports for completeness and effectiveness. Performing comprehensive code coverage analysis to ensure thorough verification and identify potential gaps. Integrating both third-party and internal verification IPs into verification environments. Managing regression testing cycles, analyzing results, and ensuring robust test coverage across all features. Collaborating with multi-site and multi-cultural teams to drive next-generation ARC processor verification projects. Contributing to the improvement of verification methodologies and automation flows. The Impact You Will Have: Ensuring the reliability and high performance of next-generation ARC-V processors. Contributing to the delivery of cutting-edge silicon IP solutions that power industry-leading products. Enhancing the efficiency and effectiveness of verification techniques and processes. Reducing time-to-market for high-performance, low-risk products through rigorous verification. Championing collaboration and knowledge sharing across global engineering teams. Helping Synopsys maintain and strengthen its leadership position in the semiconductor industry. What You’ll Need: Bachelor’s degree in engineering or a related technical field (required). 4+ years of experience in digital design and verification, with a proven track record of success. Strong knowledge of digital design principles and methodologies. Proficiency in SystemVerilog, Verilog, C, C++, assembly, Python, and Perl. Hands-on experience with RTL simulators and verification tools. Experience with microprocessor architectures (RISC-V experience is a significant plus). Who You Are: An excellent communicator with strong verbal and written skills. A collaborative team player who thrives in a multi-cultural, multi-time zone environment. Analytically minded with exceptional problem-solving skills and attention to detail. Adaptable and eager to learn new technologies, tools, and methodologies. Self-driven, proactive, and passionate about delivering high-quality, reliable results. The Team You’ll Be A Part Of: You will be a key member of the Synopsys DesignWare ARC Processor hardware team, working alongside talented engineers on next-generation ARC processor verification. The team is dedicated to developing and maintaining advanced verification environments, ensuring the high performance and reliability of our silicon IP solutions. You will collaborate with colleagues across various locations and time zones, contributing to innovative projects that drive the semiconductor industry forward. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Interns/Temp Hire Type Intern Job ID 7073 Remote Eligible No Date Posted 13/07/2025 We Are: Drive technology innovations that shape the way we live and connect. Our technology drives the Era of Pervasive Intelligence, where smart tech and AI are seamlessly woven into daily life. From self-driving cars and health-monitoring smartwatches to renewable energy systems that efficiently distribute clean power, Synopsys creates high-performance silicon chips that help build a healthier, safer, and more sustainable world. Internship Experience: At Synopsys, interns dive into real-world projects, gaining hands-on experience while collaborating with our passionate teams worldwide—and having fun in the process! You'll have the freedom to