We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and highly motivated ASIC Physical Design Engineer with a passion for technology and a knack for problem-solving. With over 5 years of relevant experience, you have honed your skills in state-of-the-art CAD tools and technologies, specifically ICC2/FC, ICV, and FinFet. You thrive in dynamic environments and are adept at handling crises with composure. Your excellent communication skills, both verbal and written, enable you to effectively collaborate with internal and external teams. You possess a strong desire to learn and explore new technologies, demonstrating excellent exploration and problem-solving skills. You are autonomous in your work, often guiding junior peers, and you bring innovative solutions to complex project challenges. Your ability to network with senior personnel and your awareness of project management issues make you a valuable asset to any team. What You’ll Be Doing: Implementing DDR and HBM PHYs for customer ASICs and SOCs in the DDR and HBM PHY Hardening service line. Performing synthesis, physical design, verification, design for test, and ATPG. Contributing as a senior member of a design team or as a project design engineer working with both internal and external design teams. Providing regular updates to the manager on project status. Representing the organization on business unit and/or company-wide projects. Guiding more junior peers with aspects of their job and frequently networking with senior internal and external personnel in your area of expertise. The Impact You Will Have: Enhancing the reliability and performance of DDR and HBM PHYs for customer ASICs and SOCs. Contributing to the success of complex projects through innovative problem-solving and technical expertise. Ensuring timely delivery of high-quality design solutions to our customers. Improving the efficiency and effectiveness of the design process through your autonomous judgment and technical knowledge. Strengthening Synopsys' position as a leader in chip design and verification through your contributions. Mentoring and guiding junior team members, fostering a collaborative and innovative team environment. What You’ll Need: A minimum of 5+ years of related experience in ASIC Physical Design. Proficiency in state-of-the-art CAD tools such as DC, PT, ICC2/FC, and ICV. Experience with advanced technologies like FinFet. Strong problem-solving skills and the ability to autonomously resolve a wide range of issues. Excellent verbal and written communication skills. Who You Are: An innovative thinker with a passion for technology and continuous learning. A collaborative team player who excels in a dynamic and fast-paced environment. A mentor and guide for junior team members. A strong communicator with the ability to network effectively with senior personnel. A composed and reliable professional who can handle risks and uncertainty with ease. The Team You’ll Be A Part Of: You will be part of an engineering team dedicated to implementing DDR and HBM PHYs for customer ASICs and SOCs. The team focuses on the DDR and HBM PHY Hardening service line, encompassing synthesis, physical design, verification, design for test, and ATPG. You will collaborate with both internal and external design teams, contributing to complex projects and driving technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Job Title: Analog/Mixed-Signal Layout Methodology Engineer Company: Synopsys Role Description: Synopsys, at the forefront of technological innovation, is seeking an Analog/Mixed-Signal Layout Methodology Engineer. As a member of our Mixed Signal IP Methodology Team, you will work with the most advanced chip design technologies and tools. You will collaborate with local and global teams to develop capabilities that improve the time-to-market of complex mixed-signal designs in the latest technology nodes. This role offers the opportunity to lead technical projects, coordinate with other team members, and develop our best-in-class utilities. Key Responsibilities: Propose and develop innovative methodologies to accelerate layout development without compromising quality. Collaborate with cross-teams in the enablement of advanced technology nodes. Measure project performance using appropriate systems, tools, and techniques. Establish and maintain relationships with cross-functional teams, internal and external customers. Create and maintain comprehensive methodology and workflow documentation. Key Qualifications: Familiarity with the physical design of analog and mixed-signal CMOS circuits. Proficiency in TCL and/or Python. Understanding of the full design cycle from RTL to GDSII, including chip level. Excellent communication skills. Strong organizational skills, attention to detail, and multi-tasking abilities. Experience with advanced FinFET nodes, TSMC 16 nanometer and below. Familiarity with Design tools such as Custom Compiler, Cadence Virtuoso, or equivalent. Knowledge of Verification tools like ICV, Calibre. Experience working with Jira/Atlassian or similar tools. Strong working knowledge of MS Office Suite of applications. Preferred Experience and Requirements: MSEE or BSEE with a minimum of 3 years of related experience. Previous analog layout physical design experience. Join us to contribute to the evolution of technology and leave your mark on the semiconductor industry. Contact us today to learn more about this exciting opportunity! Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic engineer with working experience in SOC-level functional verification and strong understanding of AXI and High-speed IO protocols like PCIe and USB. You should have a passion for working with the best of the brains in the industry in developing end to end solutions and deploying them at our premier customer base. Your technical excellence, analytical skills, coupled with strong communication and interpersonal skills, make you a valuable asset to any team. You excel in communication, teamwork, and multitasking, and have experience working in cross-functional, multi-site environments. What You’ll Be Doing: Working closely with a world-class R&D team, you’ll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM). Working closely with customers, you will bring the detailed requirements into the factory to enable R&D for a strong, robust, and successful product development. Working closely with product development team, you will validate and end-to-end solution both internally (before shipment) as well as in customer environment. Driving the deployment and smooth execution of SLM solutions into customers’ projects. Enabling customers to realize the value of silicon health monitoring throughout the lifecycle of silicon bring-up, validation, through in-field operations. The Impact You Will Have: Enhancing Synopsys’ Silicon Lifecycle Management (SLM) IP portfolio and end-to-end solution. Driving the adoption of Synopsys’ SLM solutions at premier customer base worlwide. Influencing the development of next-generation SLM IPs and solutions. What You’ll Need: BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field. 4+ years of hands-on experience with SoC-level functional verification or Design-for-Test (DFT) or both. Good knowledge of AXI, APB Background in verification, with at least sub-system level verification Debugging abilities to identify issues in functional verification. Knowledge of DMA, ideally should have verified a sub-system with DMA Knowledge of High-speed IO sub-systems like PCIe and USB A thorough understanding of memory mapping concepts is essential. End to end knowledge of how transactions/data flow between the HSIO interface to/from memory Knowledge and experience with Memory BIST/DFT/ATE/SLT/any other test solutions Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions Customer facing experience is a plus – educating/guiding customer on technical details of a solution Good to have: Hands-on debug experience of silicon is a plus Some programming experience to write/debug simple drivers in C Detailed knowledge of the PCIe and USB protocols Architecture/micro-architecture experience Working with FPGAs The Team You’ll Be A Part Of: As part of the Silicon Lifecycle Management (SLM) solutions team, you will collaborate with global R&D teams to develop world-class IPs and end-to-end solutions to address silicon health issues at premier data center, AI, and automotive customers. Our team is dedicated to bringing solutions to enhance the life of a silicon anywhere it belongs. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced IT Director with over 18 years of industry experience, who has navigated through the intricacies of Compute, Storage, Networks, Data Centers, and managing HPC environments. Your expertise in handling large-scale 24X7 IT infrastructure delivery programs for global clients is unparalleled. You possess a proven capability to translate business requirements into strategic programs and initiatives, driving them to successful completion. Building and managing large, high-functioning teams is second nature to you, and you excel in fostering collaboration and communication across global teams and stakeholders. You are adept at adopting best practices and are always on the lookout for ways to innovate and optimize processes. Your knowledge in various modules of SAP Success Factor, along with your strategic mindset, adds a significant advantage to your leadership style. What You’ll Be Doing: Operational Ownership of HPC Engineering infrastructure including Compute, Citrix, Storage, Networks, Data Centers. Driving strategic initiatives related to continuous improvements, including automation initiatives to reduce incident volumes, improve customer experience, and optimize costs. End-to-end ownership and operational excellence of the 24X7 Global IT Support operations. Ensuring SLA/KPI adherence, quality compliance, stakeholder communication, customer satisfaction, and risk/issue identification and mitigation. Leading weekly reporting, QBR, project reviews, and managing major outages. People management including hiring, mentoring, upskilling, training/certification, succession planning, and improving employee engagement. The Impact You Will Have: Enhancing customer experience in the region and enabling IT as a strategic partner for business units. Building and leading a high-functioning, collaborative IT team aligned with organizational objectives. Driving continuous improvements and automation initiatives to optimize operations and reduce costs. Ensuring operational excellence and adherence to SLAs/KPIs, leading to high customer satisfaction. Fostering a culture of innovation and best practices in the region. Maintaining strong governance and compliance in alignment with organizational guidelines. What You’ll Need: Over 18 years of experience in IT HPC Engineering infrastructure management including Compute, Citrix, Storage, Networks, Data Centers. Experience with job scheduling and queuing systems like LSF, SLURM. Experience in handling large-scale 24X7 IT infrastructure delivery programs for global clients. Proven capability to translate business requirements into strategic programs and initiatives. Proficiency in building and managing large, high-functioning teams. Experience in different modules of SAP Success Factor, strategy, and roadmap development. Who You Are: Strong collaborator with excellent communication skills to work with global teams and stakeholders. Innovative thinker with a strategic mindset and a focus on continuous improvement. Effective leader with a track record of building and managing high-performing teams. Detail-oriented with a strong focus on quality and compliance. Proactive problem-solver with the ability to identify and mitigate risks effectively. The Team You’ll Be A Part Of: You will be a key leader in the Synopsys IT team in the SA region, aligning with the CIO objectives and regional objectives to ensure the IT organization’s success. You will drive outcome-based delivery, making a significant impact through your leadership skills and strategic initiatives. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

About Synopsys At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. As we extend our PCIe project management team, we have a great job opportunity for you. In this interesting and challenging position as a project engineering manager (PEM) you will be responsible for the planning and execution of development projects which deliver leading-edge products for consumer, industrial and automotive applications. You are a seasoned engineering professional with a passion for innovation and excellence. With a solid background in project management and engineering, you thrive in dynamic environments and excel at leading cross-functional teams to success. Your analytical mindset allows you to navigate complex challenges, and your communication skills ensure that all stakeholders are aligned and informed. You possess a deep understanding of engineering principles and are adept at applying them to real-world scenarios. Your proactive approach and attention to detail set you apart, and you are always looking for ways to improve processes and outcomes. You are not just a manager but a mentor and a leader, inspiring your team to achieve their best. What You’ll Be Doing: Collaborating with cross-functional teams to define project requirements, scope, and objectives. Developing detailed project plans, including timelines, resource allocation, and risk management strategies. Monitoring project progress and performance, identifying potential issues, and implementing corrective actions as needed. Communicating project status, updates, and milestones to stakeholders, ensuring transparency and alignment. Representing R&D on customer relationships, tracking execution to plan, aligning with senior leadership of team on mitigation and escalation management Mentoring and guiding team members, fostering a collaborative and innovative work environment. The Impact You Will Have: Driving the successful execution of engineering projects, contributing to Synopsys' reputation for excellence and innovation. Enhancing the efficiency and effectiveness of project management processes, leading to improved project outcomes. Facilitating cross-functional collaboration, ensuring that all teams are working towards common goals. Providing leadership and mentorship to team members, fostering their professional growth and development. Ensuring that projects are delivered on time, within scope, and within budget, contributing to the overall success of the organization. Identifying opportunities for process improvements and implementing best practices to enhance project delivery. What You’ll Need: Excellent written and verbal communication in English is a must Bachelor's or master’s degree in engineering or a related field. Proven experience in project management, with a track record of successfully leading engineering projects. Strong knowledge of engineering principles and practices. Excellent organizational and time-management skills, with the ability to manage multiple projects simultaneously. Proficiency in project management tools and software. Who You Are: A natural leader with strong interpersonal and communication skills. A strategic thinker with excellent problem-solving abilities. Detail-oriented and highly organized. Proactive and able to work independently with minimal supervision. Collaborative and able to work effectively in a team environment. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative project management team focused on delivering cutting-edge HBM and UCIe projects. Our team is dedicated to excellence and continuous improvement, and we work collaboratively to achieve our goals. We value diversity, creativity, and a strong work ethic, and we are committed to fostering an inclusive and supportive work environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a dynamic and strategic leader with a passion for technology and innovation. With over a decade of experience in infrastructure technologies, you have honed your skills in managing Site Reliability Engineering (SRE) lifecycle practices. You thrive in environments where you can leverage your expertise in Linux platforms, networking protocols, storage solutions, and databases. Your problem-solving capabilities are top-notch, and you are adept at troubleshooting and resolving complex infrastructure issues. Automation is second nature to you, and you have a proven track record in developing custom monitors and implementing automated testing processes. You are process-oriented, always looking for ways to enhance reliability and efficiency. Your proactive mindset drives you to anticipate potential issues and plan for future needs, ensuring that systems are resilient and performant. Communication is one of your strong suits. You excel at keeping stakeholders informed, building strong relationships across teams, and fostering a culture of open communication. You are a leader who inspires your team to think ahead, take proactive steps, and continuously seek improvements. Your ability to manage change effectively ensures that disruptions are minimized while maximizing efficiency. What You’ll Be Doing: Developing and implementing a comprehensive Reliability Architecture to ensure high standards of reliability and performance across all platforms, systems, and tools. Integrating Monitoring and Alerting systems into the observability platform to ensure early detection and resolution of issues. Managing Incident Response, leading the team during major incidents, ensuring quick and effective resolution, and conducting thorough postmortem analyses. Driving Automation & Continuous Improvement initiatives to reduce incidents, improve efficiency, and enhance reliability. Instilling a culture of Proactive Thinking within the team, managing change effectively, and overseeing the improvement of Change Management procedures. Communicating effectively with stakeholders regarding reliability issues, building strong relationships, and fostering a culture of open communication. The Impact You Will Have: Ensuring the reliability and performance of critical infrastructure services that support engineering and business teams. Enhancing the resilience and efficiency of our private cloud environment through strategic reliability practices. Improving incident response times and minimizing the impact of major incidents on business operations. Driving continuous improvement and innovation in infrastructure reliability and performance. Building a proactive and forward-thinking team culture that anticipates and addresses potential issues. Fostering strong relationships and effective communication across teams and stakeholders, ensuring alignment and collaboration. What You’ll Need: 5+ years of practical application and experience in managing SRE lifecycle practices for a mid-to-large organization. 10+ years of experience working on various infrastructure technologies, including Linux platforms, storage platforms, networking protocols, DNS/LDAP, and databases. 5+ years of direct experience troubleshooting and solving infrastructure problems. Proven process-oriented approach to solving problems and improving reliability. Proven experience with Automation, focusing on developing custom monitors and automated testing processes. Who You Are: A strategic and dynamic leader with a passion for technology and innovation. An excellent communicator who can build strong relationships and foster a culture of open communication. A proactive thinker who anticipates potential issues and plans for future needs. A problem solver with top-notch troubleshooting skills and a process-oriented approach. A champion of continuous improvement, always seeking ways to enhance reliability and efficiency. The Team You’ll Be A Part Of: You will lead a team of dedicated Site Reliability Engineers focused on developing and operationalizing lifecycle practices for all infrastructure services. The team is pivotal in ensuring the resilience and performance of our private cloud environment, working closely with cross-functional teams and service owners to build and maintain high standards of reliability. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Order Management Analyst with a deep expertise in order process and backlog management. With a strategic mindset, you will help gain and improve efficiencies through automation, standardization, and process improvements. You are dedicated to the excellence and accuracy of the order processing procedure. You have the authority to accept the order, binding the corporation legally to fulfill against the customer order, which requires a complex understanding of corporate policies and processes, driving resolution on open issues and the delivery of orders in a timely manner. What You’ll Be Doing: Providing timely order acceptance and maintaining an accurate backlog. Reviewing and interpreting customer contracts to ascertain compliance with corporate policies. Consulting and advising solutions for setting up complex or non-standard orders in SAP. Collaborating closely with Revenue Accounting, Revenue Recognition, Sales, Credit, Distribution, Materials Management, and IT support teams. Making recommendations to the Worldwide Order Management team. Participating in various corporate initiatives and projects. Documenting, updating, and re-evaluating processes and procedures to enhance business operations effectiveness to support increased growth and deal complexity. Applying company policies and procedures to resolve complex issues. Following standard practices and specific, outlined, and detailed procedures in analyzing situations or utilizing documentation from which answers can be readily obtained. Building working relationships internally. Acting as supervisor/manager backup and playing a dynamic role in quarter/year-end close, including coordination of workload distribution and system troubleshooting. The Impact You Will Have: Ensuring timely and accurate order processing to meet customer expectations and organizational goals. Improving efficiencies through process automation and standardization. Enhancing the quality and accuracy of order management procedures. Facilitating seamless coordination across multiple departments to ensure smooth operations. Contributing to corporate initiatives and driving continuous improvement projects. Supporting the organization’s growth by managing complex and non-standard orders effectively. What You’ll Need: Advanced knowledge of SAP. Expert Microsoft Office skills with emphasis on Excel. Familiarity with order acceptance policies preferred. Contract review experience is a plus. Bachelor’s degree or equivalent working experience. Minimum 3-5 years of job-related experience. Who You Are: You possess strong analytical skills and attention to detail. You are an excellent communicator, capable of building relationships across departments. Your problem-solving abilities allow you to navigate complex issues efficiently. You are proactive, adaptable, and thrive in a dynamic environment. Your dedication to continuous improvement and customer satisfaction is evident in your work. The Team You’ll Be A Part Of: You will be part of a dynamic and collaborative team that focuses on driving the strategic goals of the organization by delivering what the customer orders, on time, with 100% accuracy every time. Our team values innovation, collaboration, and data-driven decision-making, and we work closely with various departments to ensure efficiencies through automation, standardization, and process improvements. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a skilled Emulation R&D Engineer with over 8 years of experience and a strong academic background in Electronic & Communication or Computer Science Engineering. Your expertise in C/C++, OOPS, and HDL languages like System Verilog and Verilog, along with your scripting skills in Perl or TCL, make you a valuable team member. You possess knowledge of protocols such as ENET, HDMI, MIPI, AMBA, and UART, and have experience with UVM and Functional Verification. You are a resourceful problem-solver, a team player, and have excellent communication skills. What You’ll Be Doing: Designing and developing emulation models. Implementing and verifying digital designs using System Verilog and Verilog. Developing scripts in Perl, TCL, or other languages. Collaborating with cross-functional teams. Conducting protocol verification for various standards. Utilizing UVM for design validation. The Impact You Will Have: Enhancing emulation model efficiency. Contributing to high-performance silicon chips. Improving design reliability through verification. Streamlining workflows with automation. Ensuring protocol compliance. Driving technological advancements. What You’ll Need: B.E / M.E. in Electronic & Communication / Computer Science Engineering. Proficiency in C/C++ and OOPS. Knowledge of digital design and HDL languages. Experience with scripting languages. Familiarity with multiple protocols like ethernet, pcie, cxl, CSI, DSI, UFS AMBA, CHI and UVM. Who You Are: Effective communicator. Team player. Resourceful and detail-oriented. Innovative problem-solver. Adaptable learner. The Team You’ll Be A Part Of: Join a dynamic team dedicated to developing and verifying advanced emulation models for high-performance silicon chips. Collaborate with cross-functional teams to ensure seamless integration and adherence to industry standards. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will provide more details about the salary range and benefits during the hiring process. Inclusion and Diversity: Synopsys considers all applicants for employment without regard to race, color, religion, sex, gender preference, national origin, age, disability, or status as a Covered Veteran in accordance with federal law. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a motivated and skilled engineer with 4 -10 years of experience in emulation solutions development. You bring a strong foundation in programming concepts using C/C++ and an understanding of digital design. Your expertise includes HDL languages such as System Verilog and Verilog, and you are familiar with protocols like AXI, AMBA, JTAG, AVB, CAN, and TSN. You thrive in collaborative environments and have excellent communication skills. Your educational background includes a B.E/ B.Tech/ M.Tech in Electronic & Communication or Computer Science Engineering. You are passionate about developing cutting-edge emulation solutions for semiconductor customers and are eager to engage in both software development and synthesizable RTL development. What You’ll Be Doing: Developing emulation solutions for industry-standard protocols such as AXI, AMBA, JTAG, AVB, CAN, and TSN, CHI, Ethernet, PCIe, CXL, UCIe CSI, DSI, DP, UFS, MMC, HDMI, DRAM. Engaging in software development using C/C++ and synthesizable RTL development using Verilog. Verifying emulation solutions to ensure they meet the highest standards of quality and performance. Interacting with customers during the deployment and debugging phases to provide technical support and ensure successful implementation. Collaborating with cross-functional teams to integrate emulation solutions with other Synopsys products and technologies. Continuously improving and optimizing emulation solutions to meet evolving industry needs and standards. The Impact You Will Have: Enhancing the efficiency and performance of semiconductor design processes through advanced emulation solutions. Contributing to the development of high-performance silicon chips and software content that drive technological innovation. Supporting semiconductor customers in overcoming design and verification challenges, leading to successful product launches. Improving the reliability and functionality of emulation solutions, thereby increasing customer satisfaction and trust in Synopsys products. Driving continuous improvement and innovation within the emulation solutions domain. Facilitating seamless integration of emulation solutions with other Synopsys technologies, enhancing overall product offerings. What You’ll Need: Strong programming skills in C/C++ and understanding of OOPS concepts. Good understanding of digital design concepts. Knowledge of HDL languages such as System Verilog and Verilog. Experience with scripting languages like Perl or TCL is a plus. Understanding of ARM architecture is an added advantage. Knowledge of UVM and functional verification will be a plus. Who You Are: A team player with excellent communication skills. Detail-oriented and capable of working independently. Adaptable and eager to learn new technologies and methodologies. Proactive in identifying and solving problems. Passionate about delivering high-quality solutions. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing state-of-the-art emulation solutions for semiconductor customers. The team collaborates closely with other engineering groups within Synopsys to ensure seamless integration and optimal performance of our products. We value creativity, continuous learning, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a motivated and skilled engineer with 4-10 years of experience in emulation solutions development. You bring a strong foundation in programming concepts using C/C++ and an understanding of digital design. Your expertise includes HDL languages such as System Verilog and Verilog, and you are familiar with protocols like AXI, AMBA, JTAG, AVB, CAN, and TSN. You thrive in collaborative environments and have excellent communication skills. Your educational background includes a B.E/ B.Tech/ M.Tech in Electronic & Communication or Computer Science Engineering. You are passionate about developing cutting-edge emulation solutions for semiconductor customers and are eager to engage in both software development and synthesizable RTL development. What You’ll Be Doing: Developing emulation solutions for industry-standard protocols such as AXI, AMBA, JTAG, AVB, CAN, and TSN, CHI, Ethernet, PCIe, CXL, UCIe CSI, DSI, DP, UFS, MMC, HDMI, DRAM. Engaging in software development using C/C++ and synthesizable RTL development using Verilog. Verifying emulation solutions to ensure they meet the highest standards of quality and performance. Interacting with customers during the deployment and debugging phases to provide technical support and ensure successful implementation. Collaborating with cross-functional teams to integrate emulation solutions with other Synopsys products and technologies. Continuously improving and optimizing emulation solutions to meet evolving industry needs and standards. The Impact You Will Have: Enhancing the efficiency and performance of semiconductor design processes through advanced emulation solutions. Contributing to the development of high-performance silicon chips and software content that drive technological innovation. Supporting semiconductor customers in overcoming design and verification challenges, leading to successful product launches. Improving the reliability and functionality of emulation solutions, thereby increasing customer satisfaction and trust in Synopsys products. Driving continuous improvement and innovation within the emulation solutions domain. Facilitating seamless integration of emulation solutions with other Synopsys technologies, enhancing overall product offerings. What You’ll Need: Strong programming skills in C/C++ and understanding of OOPS concepts. Good understanding of digital design concepts. Knowledge of HDL languages such as System Verilog and Verilog. Experience with scripting languages like Perl or TCL is a plus. Understanding of ARM architecture is an added advantage. Knowledge of UVM and functional verification will be a plus. Who You Are: A team player with excellent communication skills. Detail-oriented and capable of working independently. Adaptable and eager to learn new technologies and methodologies. Proactive in identifying and solving problems. Passionate about delivering high-quality solutions. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on developing state-of-the-art emulation solutions for semiconductor customers. The team collaborates closely with other engineering groups within Synopsys to ensure seamless integration and optimal performance of our products. We value creativity, continuous learning, and a commitment to excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Design and develop software for interface IP systems Perform Device level and System level, validation and debug, in post-silicon Software Development for new validation methodologies Customer interface to capture requirement and post release support Maximize software productivity and faster time to knowledge Qualifications: Qualification: B.Tech in ECE/CS or equivalent with 4+ year of relevant experience ECE background with experience is software is preferred Skills: Excellent programming and testing skills using C/C++ Experience with embedded or resource-constrained environments Development experience on Unix, Linux and Windows Ability to pick up new flow, learn on the Job MATLAB & PYTHON programming exposure is plus Excellent verbal and written communication skills Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of digital, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a passion for cutting-edge technology and innovation. With 8 -12 years of experience, you bring a wealth of knowledge in CMOS memory design and circuit implementation. Your expertise lies in developing non-volatile memories or SRAM. You are proficient in schematic entry, circuit simulation, layout planning, and design verification. You thrive in a collaborative environment, interfacing with CAD and Frontend engineers to drive memory compiler automation and EDA model generation. Your attention to detail ensures the highest quality in circuit and physical layout design. Self-motivated and self-directed, you demonstrate excellent analytical and problem-solving skills. You are adept at programming in C-Shell or Perl. Your strong command of English, both verbal and written, enables you to communicate effectively with team members and stakeholders. You are committed to continuous learning and professional growth, and you bring professionalism, critical thinking, and a focus on future goals to your work. Inclusion and diversity are important to you, and you contribute to a collaborative and inclusive work environment. What You’ll Be Doing: Develop CMOS embedded non-volatile memories such as MRAM and RRAM. Design architecture and circuit implementation, focusing on high speed, low power, and high-density designs. Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation. Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow. Perform design verification and drive physical layout design and verification. Provide support and/or perform other duties as assigned and required. The Impact You Will Have: Contribute to the development of high-performance silicon chips and software content. Enhance the efficiency and performance of our CMOS non-volatile memory designs. Drive innovation in high speed, low power, and high density memory designs. Ensure the highest quality in circuit development and physical layout design. Collaborate effectively with CAD and Frontend engineers to streamline automation and verification processes. Support the continuous improvement and advancement of our memory design technology. What You’ll Need: Bachelor’s or Master’s degree in Electrical Engineering, Telecommunication, or related fields. Proficiency in CMOS memory design (NVM or SRAM), circuit simulation, memory layout designs, layout parasitic extraction, and layout verification tools and debugging techniques. Basic circuit know-how of Charge Pump, Voltage Regulator, Current Mirror, Reference voltage and current, Comparators preferred Programming capability in C-Shell or Perl Strong analytical and problem-solving skills with attention to detail. Experience in developing documents, reports, or presentations for a range of tasks. Who You Are: Self-motivated, self-directed, detail-oriented, and well-organized. Possess excellent analytical, problem-solving, and negotiation skills. Capable of leading and mentoring trainees and junior engineers, as well as managing projects. Strong command of English, both verbal and written. Exhibit strong interpersonal communication and teamwork skills. Professional, critical/logical thinker, and focused on future goals. Highly committed to continuous learning and professional development. The Team You’ll Be A Part Of: You will be a key member of our innovative R&D Engineering team, focused on developing cutting-edge CMOS embedded non-volatile memories (MRAM/RRAM). Our team thrives on collaboration and continuous improvement, working together to achieve technological advancements that shape the future. You will have the opportunity to lead and mentor junior engineers, contributing to a culture of learning and excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: As an ideal candidate for the ASIC Digital Design Engineer, Senior role, you are a highly motivated and innovative individual with a deep understanding of ASIC development flow. You are someone who thrives in dynamic environments and embraces the challenges that come with constant technological changes. You are self-motivated, proactive, and able to balance good design quality with tight deadlines. Your excellent communication skills enable you to interact seamlessly with different design groups and customer support teams. You are known for your ability to resolve issues creatively and exercise independent judgment in selecting methods and techniques to obtain solutions. You are a team player who can produce excellent results both as an individual and as part of a team. What You’ll Be Doing: Supporting development and verification of ASIC digital designs for next-generation NRZ and PAM-based SerDes products. Setting up and running lint/cdc/rdc checks using VC-Spyglass and synthesis flow using Design Compiler/Fusion Compiler. Working with Verilog and VCS to ensure design accuracy. Defining synthesis design constraints and resolving STA issues. Setting up and running FPGA prototyping flows to map RTL designs to Xilinx FPGAs. The Impact You Will Have: Contributing to the development of cutting-edge SerDes products that lead the industry. Enhancing the performance, power, and size efficiency of our silicon IP offerings. Enabling rapid market entry for differentiated products with reduced risk. Driving innovation in high-speed digital design and data recovery circuits. Supporting the creation of high-performance silicon chips and software content. Collaborating with a world-class team to solve complex design challenges. What You’ll Need: BSEE or MSEE with a minimum of 2 years of experience in digital design and front-end flows. Proficiency in running lint/cdc/rdc checks and synthesis flow. Experience in coding, verifying Verilog and System Verilog design. Experience of working with minimum supervision and owning and delivering for front-end activities in IP/SOC. Experience of leading technically for front-end activities. Knowledge of digital design methodologies, DFT insertion, synthesis constraints, and flows. Scripting experience in Shell, Perl, Python, and TCL (preferred). Who You Are: Excellent communicator with the ability to interact with diverse teams. Self-motivated and proactive, with a strong attention to detail. A creative problem-solver who can think independently. Capable of working under tight deadlines while maintaining high-quality standards. A team player who can contribute effectively both individually and collaboratively. The Team You’ll Be A Part Of: Join our highly experienced mixed-signal design and verification team, where you will work alongside experts in digital and mixed-signal engineering. Our team is dedicated to developing innovative solutions for the next generation of high-speed SerDes products, providing continuous training and opportunities for growth. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and dedicated individual with a strong background in Electronics and Communication Engineering or Computer Science. You have a keen interest in software development and system validation, and you are eager to apply your skills in a dynamic and innovative environment. You thrive on solving complex problems and are always ready to take on new challenges. Your technical prowess is complemented by your excellent communication skills, making you an effective team player and a valuable contributor to any project. You have a meticulous eye for detail and a commitment to delivering high-quality work. You are not only technically proficient but also adaptable, able to quickly learn new tools and methodologies. Your previous experience in embedded systems, board-level testing, and programming in C/C++ sets you apart, and you are excited about the opportunity to work with high-speed serial interfaces and FPGA-based setups. Your proactive approach and analytical mindset enable you to excel in a fast-paced, collaborative environment. What You’ll Be Doing: Developing and testing software for validation and automation purposes. Performing device-level and system-level validation and debug in post-silicon environments. Executing software tests in verification environments to ensure product quality. Working with FPGA-based setups to run validation tests and update FPGA RTL modules as needed. Creating detailed test and validation reports with statistical analysis. Interfacing with customers to capture requirements and provide post-release support. The Impact You Will Have: Contributing to the development of cutting-edge technology that drives innovation in various industries. Ensuring the reliability and performance of high-speed serial interface PHYs like USB, PCIe, and Ethernet. Enhancing the validation and debug processes through meticulous testing and analysis. Improving the overall quality and functionality of Synopsys products through rigorous validation. Supporting the continuous improvement of product development cycles. Providing valuable insights and feedback to enhance future product iterations. What You’ll Need: B.Tech in ECE/CS or equivalent with 3-7 years of previous experience in a similar role/industry. Experience in programming and testing using C/C++. Board-level test and debug experience using lab equipment. Experience with embedded or resource-constrained environments. Development experience on Unix, Linux, and Windows platforms. Ability to quickly learn new workflows and adapt to new technologies. Exposure to MATLAB/Python programming is a plus. Exposure to verification and basic RTL is a plus. Excellent verbal and written communication skills. Who You Are: A proactive and motivated individual with a passion for technology and innovation. An effective communicator who can articulate technical concepts clearly and concisely. A team player who collaborates well with others and contributes to collective goals. A detail-oriented professional with a strong analytical mindset. An adaptable learner who thrives in dynamic environments and embraces new challenges. The Team You’ll Be A Part Of: You will be part of a dedicated team focused on the development and validation of high-speed serial interfaces and embedded systems. The team collaborates closely to ensure the quality and performance of Synopsys products, leveraging a diverse set of skills and expertise. You will work alongside experienced engineers who are passionate about technology and committed to driving innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 11861 Date posted 06/03/2025 Description Candidate will be part of TCM Front End team. Design, develop, troubleshoot the core algorithms used in TCM Front End tool Design and develop standard and customized features / checks in TCM FE for seamless consumption of VCS OM. Will be working with other local and global teams of TCM and VC SpyGlass Design and development of state-of-the-art EDA tools involving development of new and innovative algorithms. Create test cases to test the developed feature. Skills Required Strong knowledge of Front-end compilers and their flow Ability to develop new software architecture and good leadership skills. Fluent in C/C++ with extensive work experience in data-structures and algorithms. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Excellent algorithm analysis skills and a good knowledge of data structures. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Familiarity with multi-threaded and distributed code development. Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Quality focus - one who believes in quality and wants to make a difference. Experience of production code development on Unix/Linux platforms. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Job Details: Job Description: Designs, develops, and builds analog circuits in advanced process nodes for analog and mixed signal IPs. Designs floorplans, performs circuit design, extracts chip parameters, and simulates analog behavior models. Creates test plans to verify design according to circuit and block microarchitecture specifications and evaluates test results. Verifies functionality to optimize circuit for power, performance, area, timing, and yield goals. Collaborates cross functionally to report design progress and collects, tracks, and resolves any performance and circuit design issues. Optimizes performance, power, area, and reduces leakage of circuits. Works with architecture and layout team to design circuit for best functionality, robustness, and electrical capabilities. Qualifications: Qualifications: B.Tech / M.Tech/ Phd with hands-on experience in high-speed analog circuit design, with a proven track record of successful projects. Expertise in designing and verifying analog circuits such as High-speed transmitter, receiver, amplifiers, PLLs, voltage regulators, and data converters. Proficiency in using EDA tools like Cadence Virtuoso, SPICE, or Synopsys.

Role & responsibilities Physical Design Engineer (PD/STA/Synthesis) Must-Haves: •Tools: Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime for STA •Flow Experience: •Floorplanning •Power planning •Placement •Clock Tree Synthesis (CTS) •Routing •Physical Verification (DRC/LVS) •Timing Closure •Knowledge of: •Low-power design (UPF/CPF) •ECOs •IR Drop, EM Analysis •STA constraints and timing analysis Nice-to-Haves: •Experience with block-level and/or full-chip PD •Familiarity with scripting (Tcl, Perl, Python)

Lead Verification Engineer Experience: 10+ Years Location:[Bangalore| Ahmedabad | Pune| Hyderabad] Employment Type: Full-Time Job Description: We are seeking a highly skilled and motivated Design Verification Engineer with 10+ years of hands-on experience in SoC verification. The ideal candidate will be responsible for developing and executing comprehensive verification plans for high-performance SoCs, collaborating with cross-functional teams, and ensuring quality standards are met throughout the verification cycle. Key Responsibilities: Drive SoC Design Verification efforts for complex projects, ensuring thorough validation of functionality and performance. Develop and implement verification strategies, including test plans and test benches for both low-speed peripherals (I2C/I3C, SPI, UART, GPIO, QSPI) and high-speed interfaces (PCIe, Ethernet, CXL, MIPI, DDR, HBM). Conduct Gate-level simulations and power-aware verification using Xprop and UPF. Collaborate with architects, designers, and pre/post-silicon teams to define and validate verification requirements. Implement and analyze System Verilog assertions and coverage (functional, toggle, code). Guide and mentor junior verification engineers while fostering a collaborative and innovative team environment. Ensure verification signoff criteria are met, with complete and accurate documentation. Contribute to continuous improvement of verification methodologies and best practices. Integrate third-party VIPs from Synopsys and Cadence. Required Skills & Experience: Strong expertise in UVM and System Verilog-based verification environments. Hands-on experience with: SoC-level and IP-level verification DDR, HBM, Xprop, and UPF-based simulations Processor-based SoC verification environments (native, Verilog, System Verilog, UVM) Proficiency in verification tools like VCS, Xsim, waveform analyzers. Solid experience in scripting (Shell, Makefile, Perl) and C-SystemVerilog handshaking. Strong understanding of test practices and adherence to verification quality standards. Problem-solving mindset with excellent analytical and debugging skills. Qualifications: Bachelor’s, Master’s, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field. 10+ years of relevant experience in SoC design verification. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and passionate individual with a strong background in semiconductor manufacturing technology and device physics. You hold a PhD in Electrical Engineering or Physics and have a deep understanding of numerical methods. You possess excellent IT skills, particularly in Linux as well as Python and TCL scripting. With at least three years of experience using TCAD simulation tools, you are adept at both pre-sales and post-sales activities, including technical support, customer relationship management, technical training, and presentation delivery. You thrive in a dynamic environment, working closely with R&D, Sales, Marketing, and customers to drive the development and acceptance of cutting-edge TCAD products. What You’ll Be Doing: Serving as the primary technical interface with customers, assisting them in evaluating, using, and applying TCAD tools. Providing technical support, troubleshooting, and resolving complex issues related to TCAD products. Managing new and existing customer relationships, ensuring high levels of customer satisfaction. Preparing and delivering technical training and presentations to customers and internal teams. Conducting beta testing, benchmarking, and onsite evaluations to support product development and customer needs. Collaborating with R&D to specify new features and drive continuous product improvement. The Impact You Will Have: Enhancing customer experience and satisfaction with Synopsys TCAD products. Driving the successful adoption and integration of TCAD tools in leading semiconductor companies. Contributing to the development and refinement of state-of-the-art TCAD tools. Strengthening Synopsys' market position through exceptional technical support and customer engagement. Facilitating knowledge transfer and training to empower customers and internal teams. Playing a key role in the continuous innovation and advancement of semiconductor technology. What You’ll Need: PhD in Electrical Engineering, Physics, or a related field. Strong background in semiconductor manufacturing technology and device physics. Proficiency in numerical methods and simulation tools. Excellent IT skills, particularly in Linux, Python, and TCL scripting. Minimum of three years of experience with TCAD simulation tools. Who You Are: A proactive and customer-oriented professional with excellent communication skills. Detail-oriented with strong problem-solving abilities. A collaborative team player who thrives in a dynamic environment. Adaptable and able to manage multiple priorities effectively. Passionate about technological innovation and continuous learning. The Team You’ll Be A Part Of: You will be part of a dynamic and innovative team focused on driving the development and adoption of Synopsys TCAD products. Collaborating closely with R&D, Sales, Marketing, and customers, you will play a crucial role in ensuring the success and continuous improvement of our cutting-edge semiconductor technology solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled engineer with 6-10 years of experience, passionate about developing cutting-edge emulation solutions for industry-standard protocols such as PCIe, CXL, and UCIe. You possess a strong background in software development using C/C++ and synthesizable RTL development with Verilog. Your deep understanding of digital design concepts, HDL languages, and scripting languages like Python or Perl will be invaluable in this role. You thrive in collaborative environments, have excellent communication skills, and are adept at solving complex problems. Your ability to interact with customers during deployment and debug processes will ensure successful implementation and satisfaction. A B.E/B.Tech/M.Tech in Electronic & Communication or Computer Science Engineering is essential. Knowledge of ARM architecture, UVM, and functional verification, along with experience in emulation, will be a significant advantage. What You’ll Be Doing: Developing emulation solutions for PCIe, CXL, and UCIe protocols for semiconductor customers. Engaging in software development using C/C++ and synthesizable RTL development with Verilog. Verifying solutions to ensure high performance and reliability. Interacting with customers during the deployment and debug phases to ensure smooth implementation. Collaborating with cross-functional teams to integrate emulation solutions. Maintaining and enhancing existing emulation solutions to meet evolving industry standards. The Impact You Will Have: Driving the development of advanced emulation solutions that meet industry standards. Enhancing the performance and reliability of semiconductor products through innovative solutions. Ensuring customer satisfaction by providing robust and efficient deployment support. Contributing to the continuous improvement of Synopsys' emulation technologies. Supporting the adoption of new protocols and standards in the semiconductor industry. Strengthening Synopsys' position as a leader in chip design and verification solutions. What You’ll Need: 5+ years of relevant experience In-depth knowledge of PCIe, CXL, and UCIe protocols. Proficiency in C/C++ programming and object-oriented programming concepts. Strong understanding of digital design principles and HDL languages such as System Verilog and Verilog. Experience with scripting languages like Python, Perl, or TCL. Familiarity with ARM architecture and UVM/functional verification is a plus. Who You Are: A collaborative team player with excellent communication skills. A problem-solver with a keen eye for detail and a passion for innovation. Adaptable and able to work effectively in a fast-paced, dynamic environment. Customer-focused, with the ability to handle deployment and debugging challenges efficiently. Committed to continuous learning and staying updated with industry advancements. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on developing and enhancing emulation solutions for cutting-edge semiconductor technologies. Our team collaborates closely with various departments to ensure the highest quality and performance of our products, driving innovation and excellence in the industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

Alternate Job Titles: Senior Digital Design Engineer ASIC Design Engineer High-Speed SerDes Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced ASIC Digital Design Engineer with a strong background in digital design for high-speed serial interfaces. You have a deep understanding of USB, PCIe, Ethernet, Display, and HDMI protocol standards, and you thrive in a collaborative environment. Your expertise in Verilog RTL design, microarchitecture, and timing constraints development makes you a valuable asset to any team. You are adept at using tools like Spyglass for CDC/RDC/Lint and have excellent debugging skills. Your ability to propose and implement design updates based on various requirements, coupled with your experience in test coverage and physical design timing closure, sets you apart as a leader in your field. With a passion for innovation and a keen eye for detail, you are ready to take on new challenges and contribute to the success of Synopsys. What You’ll Be Doing: Driving and working on digital design for high-speed serial interface PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Proposing micro-architecture of design/design updates based on customer requirements, analog requirements, system performance improvements, Link layer interface changes, or overall robustness of design. Implementing RTL in Verilog and running Spyglass CDC/RDC/Lint. Collaborating with verification teams to test desired functionality and corner cases. Developing timing constraints, DFT insertion, and test coverage, and closing timing with physical design teams. Well versed in Micro-Architecture and Block Ownership, Design from scratch. The Impact You Will Have: Enhancing the performance and reliability of high-speed serial interface PHY IPs. Contributing to the development of cutting-edge technologies that power modern electronics. Driving innovation in digital design and influencing the future of semiconductor technology. Collaborating with cross-functional teams to deliver robust and high-quality designs. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous improvement and excellence. Supporting customers by providing high-performance and reliable IP solutions that meet their needs. What You’ll Need: 5-8 years of relevant experience in digital design for ASICs. Strong knowledge of Verilog RTL design and microarchitecture. Experience with timing constraints development and synthesis flow. Proficiency in using Spyglass or similar tools for Lint/CDC/RDC. Proficiency in scripting and automation using TCL, PERL, or Python. Excellent debugging skills and attention to detail. Who You Are: A collaborative team player with strong communication skills. A problem solver with a proactive approach to challenges. A detail-oriented professional with a passion for innovation. A self-motivated individual who thrives in a fast-paced environment. An adaptable engineer who can handle multiple tasks and priorities. The Team You’ll Be A Part Of: You will be part of the High-Speed SerDes Digital Design Team, a group of talented engineers dedicated to developing high-performance serial link PHY IPs. The team focuses on innovation, quality, and collaboration to deliver industry-leading solutions. Together, you will work on challenging projects that push the boundaries of technology and make a significant impact on the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. Show more Show less

About Tata Electronics Private Limited Tata Electronics Pvt. Ltd. is a prominent global player in the electronics manufacturing industry, with fast-emerging capabilities in Electronics Manufacturing Services, Semiconductor Assembly & Test, Semiconductor Foundry, and Design Services. Established in 2020 as a greenfield venture of the Tata Group, the company aims to serve global customers through integrated offerings across a trusted electronics and semiconductor value chain. With a rapidly growing workforce, the company currently employs over 65,000 people and has significant operations in Gujarat, Assam, Tamil Nadu, and Karnataka, India. Tata Electronics is committed to creating a socioeconomic footprint by employing many women in its workforce and actively supporting local communities through initiatives in environment, education, healthcare, sports and livelihood. About the Job Description: Job Overview: Person will be responsible for developing multiple test chips for IP verification and drive optimized full-chip architecture for modular design. Will continue to push the boundaries of innovation by developing architectures that inherently support testability, with the objective of achieving zero-defect silicon. This will be driven by a "correct-by-construction" mindset throughout the design process. The role necessitates a comprehensive understanding and active involvement in all facets of VLSI development, including microarchitecture and platform architecture, front-end design, and design convergence. Additionally, the candidate will be responsible for overseeing the physical design and verification processes. Job Description: Full chip design for multimillion gates SoC Digital design and development (RTL) Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification Manage IP dependencies, planning and tracking of all front-end design related tasks Driving the project milestones across the design, verification and physical implementations Minimum Qualifications: Minimum 12 years of solid experience Test Chip / SoC design Solid expertise and understanding of digital design concepts. Developing architecture and micro-architecture from specs Understanding of JTAG base test chip architecture for IP testability and enable programmable registers for IP testability Ability to review full chip top level test plans Hands-on working knowledge and expertise in FEV, Cadence LEC & Synopsys Design Compiler Synthesis. Ability to make effective decisions, even with incomplete information when time is of essence. Working knowledge of timing closure is a must. Work on key design collaterals such as SDC and UPF flows. Work with key stakeholders like PD, DFT and Verification to discuss the right collateral quality and identify solutions/workarounds. Demonstrated good post silicon bring up and debug experience Demonstrated good SoC/ Test-Chip integration exposure and its challenges Demonstrated good exposure to design verification aspects Having SoC specification to GDS to commercialization experience is highly desired Should possess a strong understanding of a particular technical area and accumulated significant experience in this area and other related areas. Provides direction, mentoring, and leadership to a small to medium sized groups. Should possess strong communication and leadership skills to ensure effective communication with Program Perform RTL coding for SS/SOC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks. Own the Clock-Domain crossing, Linting aspects of the overall design of the IP and the subsystem. Conduct timely review of the RTL progress and work with program managers to provide weekly update on the progress towards RTL milestones completion. Work closely with DFT, Physical Design and SOC teams to incorporate the interdisciplinary feedback into the design Should possess expertise in front-end EDA tools sign-off and its flows. Ability to program with scripting languages such as Python or Perl is a plus. Highly motivated to seek out solutions and willing to learn new skills to fulfil job requirements. Proven interpersonal skills, leadership and teamwork. Understanding of various bus protocols AHB, AXI and peripherals like USB, SDCC Understanding of Memory controller designs and Microprocessors is an added advantage Understanding of Chip IO design and packaging is an added advantage Show more Show less

Physical Design Engineer (PD/STA/Synthesis) Must-Haves: • Tools: Cadence Innovus, Synopsys ICC2/Fusion Compiler, PrimeTime for STA • Flow Experience: • Floorplanning • Power planning • Placement • Clock Tree Synthesis (CTS) • Routing • Physical Verification (DRC/LVS) • Timing Closure • Knowledge of: • Low-power design (UPF/CPF) • ECOs • IR Drop, EM Analysis • STA constraints and timing analysis Nice-to-Haves: • Experience with block-level and/or full-chip PD • Familiarity with scripting (Tcl, Perl, Python) Show more Show less

Hyderabad, Telangana, India Category: Engineering Hire Type: Employee Job ID 9973 Date posted 06/02/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated software developer with a strong foundation in C++ and Python programming and experience in data analysis. You are familiar with Machine Learning (ML) applied to data analysis and optimization problems. Your collaborative nature allows you to work seamlessly with cross-functional teams, including product application engineering (PAE) and front-end development teams, to deliver intuitive and effective solutions for our customers. You thrive in a dynamic, international environment and are eager to learn and new technologies to advance our TCAD products. Your ability to communicate complex technical concepts clearly and effectively makes you an invaluable asset to our team. What You’ll Be Doing: Design and implement Data Ingestion & Processing pipelines for our Sentaurus Calibration Workbench (SCW) – Format support, validation, DB with search/filters, AI/ML-driven analysis. Integrate core TCAD simulation engines with SCW – Optimize connectivity to reduce turnaround time (TAT), improve scalability, quality of results (QoR), and ease-of-use (EoU) Collaborate closely with the product application engineering (PAE) team to ensure functionality and quality requirements are met. Collaborate closely with the front-end team to ensure backend features are seamlessly integrated into the GUI for end-users. The Impact You Will Have: Drive advancements in TCAD calibration automation, leading to significant improvements in simulation efficiency and accuracy. Enhance the user experience by supporting integration of backend features into a user-friendly GUI, enabling seamless deployment of calibration workflows to customers. Support the creation of innovative solutions that address complex semiconductor design challenges, contributing to the success of our customers. Streamline the TCAD calibration process, reducing TAT and improving overall productivity for both internal teams and customers. Foster collaboration and knowledge sharing within the team, driving continuous improvement and innovation in SCW. What You’ll Need: MS or PhD in Computer Science, Software Engineering, Electrical Engineering, or equivalent. 4+ years of hands-on experience in software development with solid programming skills in C++ and Python. Solid data analysis knowledge and skills. Familiarity and hands-on experience with ML applied to data analysis and optimization. Strong desire to learn and explore new technologies. English language working proficiency and communication skills allowing teamwork in an international environment. Willingness to work in a distributed international team. Who You Are: You are a proactive and innovative engineer with a passion for technology and a keen eye for detail. Your strong analytical skills enable you to solve complex problems efficiently, and your collaborative spirit ensures successful teamwork across diverse teams. You are adaptable and open to learning, always seeking to enhance your skills and contribute to the team's success. With excellent communication skills, you effectively convey technical concepts and foster a positive and productive work environment. The Team You’ll Be A Part Of: You will join the Sentaurus Calibration Workbench (SCW) team, a dynamic group of experts dedicated to developing and optimizing calibration workflows for TCAD simulation models. Our team collaborates closely with the product application engineering (PAE) team and front-end developers to deliver cutting-edge solutions that meet the evolving needs of our customers. We are committed to continuous innovation and excellence, driving advancements that shape the future of semiconductor technology. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Senior SoC Director / SoC Director Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad/Bangalore A US based well-funded product-based startup looking for highly talented SoC Director for the following roles Senior Director / SoC Director of SOC is : Trust, loyalty, and ability to command Technical respect with foreign partners after having Taped out Successfully multiple chips to high volume production….this should be easily achieved under his/her belt !!!!!!!! Somebody we can trust to drive on the World stage without embarrassing us Job Description: We are seeking an experienced professional to lead full chip design for multi-million gate SoCs. The ideal candidate will have expertise in digital design and RTL development, with a deep understanding of the design convergence cycle, including architecture, micro-architecture, synthesis, timing closure, and verification. Key Responsibilities: Proficiency in Interconnect Fabric Cache Coherency D2D C2C Oversee full chip design for complex SoCs. Develop and implement digital designs (RTL). Manage IP dependencies and track all front-end design tasks. Drive project milestones across design, verification, and physical implementation phases. Qualifications: At least 18-25 years of solid experience in SoC design. Proven ability to develop architecture and micro-architecture from specifications. Familiarity with bus protocols such as AHB and AXI, as well as peripherals like QSPI, NVMe, and I3C. Knowledge of memory controller designs and microprocessors is a plus. Understanding of chip I/O design and packaging is advantageous. Experience in reviewing top-level test plans. Expertise in Synopsys Design Compiler for synthesis and formal verification. Strong working knowledge of timing closure processes. Experience with post-silicon bring-up and debugging. Familiarity with SoC integration challenges. Knowledge of design verification aspects is essential. Experience from SoC specification to GDS and commercialization is highly desired. Ability to make timely and effective decisions, even with incomplete information. Demonstrated expertise in specific technical areas, with significant experience in related fields. Provide direction, mentoring, and leadership to small to medium-sized teams. Strong communication and leadership skills are necessary for effective collaboration with program stakeholders. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community" Show more Show less