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0 - 1 years

2 - 3 Lacs

Bengaluru

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Candidate will be working on runset/ruledeck development across Intel technologies.Coding SVRF/ICV/PEGASUS runest, performing L0QA qualification, managing and analyzing regression.. Candidate will also require to write and execute automation and productivity enhancement scripts in Python/SKILL Qualifications Pursuing Masters degree in Electrical/Electronics/Computer ScienceCandidate must have sound knowledge of VLSI Semiconductor device and electronic circuit fundamentals Designing Implementing circuits and performing the QA for circuit performance Scripting Automation exposure is preferred skillset Candidate must have Good oral and written communication Inside this Business Group As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel's offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

Posted 2 months ago

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5 - 8 years

7 - 10 Lacs

Hyderabad

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As a Scribe CAD Staff Engineer at Micron Technology, Inc., you will be enabling and deploying layout automation concepts to enhance memory design teams productivity. You will be collaborating with multiple global teams like CAD, Memory design, and Technology development teams. Responsibilities and Tasks include, but not limited to: Work closely with memory design and technology development teams and resolve their daily challenges and develop comprehensive solutions for future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Continuously evaluate and implement new tools and technologies to improve the current automation flows. Demonstrate growth mindset and work towards submitting patent disclosures and research papers. Provide guidance and mentorship to junior members of the team. Qualifications: Advanced understanding of PDK development/validation, EDA tools and CAD flows. Develop and enable programmatically defined P-cell (Parameterized layout generator) devices for memory layout modules. Implement advanced methodologies for layout automation which can be scalable between technologies and enhance design workflow. Good understanding of programming fundamentals, as well as exposure to various programming languages including: Skill/Skill++ (Cadence), Perl, Python, Tcl. Experience of developing physical verification collaterals using SVRF. Working experience of Physical Verification flow and analyzing/debugging DRC, ERC, LVS, DFM, Antenna and rule deck issues. Good understanding of basic CMOS process manufacturing and layout design rules. Working knowledge of Linux is a must. Excellent problem-solving skills with attention to detail. Ability to work in a dynamic environment. Proficiency in working effectively with global teams and stakeholders. 8+ years of relevant experience. Education: A Bachelors or Masters degree in Computer Science, Computer Engineering, Electrical Engineering or Electronics Engineering.

Posted 3 months ago

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