212 Sv Jobs - Page 2

About Company At 7Rays Semiconductors ( https://7rayssemi.com/) , we provide end-to-end VLSI design solutions to help our clients achieve execution excellence. Our team of experts specializes in architecture, RTL design, verification, validation, physical design, implementation, and post-silicon validation using the latest technologies and methodologies We work closely with our clients, building effective partnerships to deliver high-quality solutions tailored to their needs. With a proven track record of successful projects, we are committed to excellence and innovation in semiconductor design. Design Verification Engineer - Specialised in Protocol like; PCIe/CXL/UCIE Location: Bangalore, I...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Enginee...

Required Skills & Experience 7 to 15 years of experience in IP/Subsystem/SoC design verification. Strong knowledge in SystemVerilog, UVM , and functional coverage. Understanding of digital design concepts (FSMs, pipelines, FIFOs, memory, clock/reset domains). Experience with protocols like AMBA (AXI/AHB/APB) or similar. Familiarity with assertion-based verification (SVA) . Hands-on with EDA tools (Cadence Xcelium, Synopsys VCS, Mentor Questa, or equivalent). Proficiency in debug tools (Verdi, SimVision, DVE). Strong problem-solving and debugging skills. Scripting skills in Python/Perl/TCL/Makefile for automation. Good to Have (Optional) Exposure to DFT/DFX verification, UPF/power-aware flows...

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience 5-10 years with Masters (6 to 10 years with Bachelors) Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with...

General Summary: QCT's Bangalore Wireless R&D(WRD) HW team in Bangalore is looking for experienced Wireless HW design verification engineers to work on Qualcomms best in class chipsets for mobile phones, wearables and IOT . Candidate will be working with ASIC designs on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI Verification cycle like Testbench architecture, Verification Planning, Testbench and Test development, Verification closure with best-in-class methodologies. In this role of WRD Verification Engineer, you will be verifying Wifi and/or Modem from both TX and RX perspective. The responsibilities will majorly include :...

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the worlds mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as theyprovide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days arethe same. About The Role About The Role : You will be part of the team verifying IPs and SoCs leading to first Si success. Manage and lead a team of Verification engineers IP verification is coverage driven u...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Develop System Verilog/UVM-based testbench...

Job Overview This position is an excellent opportunity for an experienced and highly motivated verification engineer to join the Arm Systems Media IP team! The team is responsible for the development of Image Signal Processors (ISPs), Display Processors, and Video codecs for deploying within Arm Compute Subsystems for various end markets, including automotive, IoT, and client market segments Our intellectual property encompasses RTL, reference drivers, tools, and libraries, enabling our customers to build upon our work to create innovative products! You will specify and develop new hardware verification testbenches for future generation hardware IP You will improve existing testbenches to in...

Role Overview: As a DV Lead Engineer at TekWissen in Mysore, your responsibilities will include: Key Responsibilities: - Build test plan, tests, coverage assertions from Specification. - Architect and build testbench and testbench components with expertise in UVM, SV, and C SVA. - Demonstrate familiarity with industry protocols like AXI, APB, AHB, PCIe, SoC. - Showcase strong debugging skills and experience with industry standard EDA tools such as Synopsys, Cadence simulators, and debugging tools. Qualifications Required: - Experience with scripting and automation. - Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS...

The Engineering Enablement team is responsible for providing tools, methodologies, and support to engineering teams to accelerate product development across the company. This position is for an opening in the Systems Verification and Validation team within the Engineering Enablement organization in the Vertical BU .This team works to define and promote the adoption of verification best practices, including Metric-driven verification, UVM, Formal, FUSA, Security, Emulation and FPGA Prototyping methodologies . This role is more focused on driving Emulation and FPGA Prototyping solutions across ADI. Job Responsibilities : Lead, Develop and deploy best-in-class Emulation/FPGA prototyping tools a...

Job Description: Were looking for passionate Design Verification Engineers experienced in ASIC/SoC environments to contribute to high-performance PCIe, Networking, and IP Sub-System verification using industry-leading tools and methodologies. Key Responsibilities & Skills: Develop UVM-based testbenches and verification infrastructure for complex SoC and IP subsystems. Define and execute verification plans, coverage metrics, assertions, and regression strategies. Work on block-level and subsystem-level verification, ensuring reusable and scalable verification components. Collaborate with design, validation, and integration teams to ensure end-to-end functional quality. Strong knowledge of Sys...

ACL Digital Hiring for the below requirement Designation: DV engineers Experience: 8-10+ years Location: Bangalore Job Description: 1. Hands-on experiences on SV/UVM/Specman 2. Familiarity with formal-based verification 3. Running regression and debugging failures independently 4. Experience in functional and code coverages 5. Independently handling sub-module-level verification 6. Clear written/verbal communication skills. 7. Familiarity with PIPE i/f or Ethernet is a must; it's good to have basic knowledge of PCIe and/or high-speed Ethernet. 8. Familiarity in mixed signal IP (SerDes, DDR) verification will be a plus.

Job Summary: We are looking for a skilled and motivated Formal Verification Engineer to join our growing team. The ideal candidate will have a strong background in formal methods, digital design, and verification for complex SoC/CPU/GPU designs. This role involves working closely with design and DV teams to ensure bug-free, high-quality silicon. Key Responsibilities: Develop and execute formal verification test plans for complex digital blocks. Write assertions using SVA or PSL to capture design intent. Apply formal techniques to identify design issues and verify functional correctness. Work with RTL designers and functional DV teams to debug and close verification gaps. Use industry-standar...

Senior Design Verification Engineer Job Description: SV / UVM Test bench development and test cases coding. Code and Functional coverage analysis and closure. Work with team for verification closure. Experience with python or any other scripting language is a plus. Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage. Experience : 3 to 8 Years. Location : Bangalore.

Senior Design Verification Engineer Looking for Verification engineer who is going to work on testbench development, test cases / assertions / functional coverage coding, debugging. Should be an enthusiastic and a quick learner of the verification flow. Job Description: SV / UVM Test bench development and test cases coding Code and Functional coverage analysis and closure Work with team for verification closure Experience with python or any other scripting language is a plus Bus protocols AXI / APB / UART/ IJTAG protocol working knowledge is an advantage. Experience: 4 to 6 Years Location: Hyderabad

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work , to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do thei...

order General information #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness,...

Candidate should be familiar with the concepts of behavioral modeling - both digital (Verilog-D) and analog (Verilog-A or Verilog-AMS). Experience in SV and UVM testbench development/modifications from mixed signal perspective is a plus. Job Description In your new role you will: Candidate should have working experience with AMS Verification on multiple SOC's or sub-systems. One should have proficiency in AMS simulation environment using Cadence/Synopsys/Mentor tools. Knowledge of digital design techniques, Verilog HDL, and standard RTL coding styles, as well as analog circuit basics, with previous analog design experience a plus. Candidate should be familiar with the concepts of behavioral ...

Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -Partial In your new role you will: Behavioral modeling: Verilog, Wreal or SV-RNM -Full AMS Verification for SoC or IPs -Full Test plan preparation as per the dynamics of product specifications - Full Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -Partial Testcase Debug & proposing new scenarios - Partial Handling project dynamics on scope, schedule and effort coming up with alternative verification plans- Full Self-motivated to drive new scope expansion proposals mapping to business value Mentoring junior engineers in creating prob...

Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS Job Description In your new role you will: Behavioral modeling: Verilog, Wreal or SV-RNM -Full AMS Verification for SoC or IPs -Full Test plan preparation as per the dynamics of product specifications - Full Dealing challenges with AMS methodologies of Cadence: irun/xrun or Synopsys: XA-VCS or Mentor Eldo ADMS -Partial Testcase Debug & proposing new scenarios - Partial Handling project dynamics on scope, schedule and effort coming up with alternative verification plans- Full Self-motivated to drive new scope expansion proposals mapping to business value Mentoring junior engineers in creati...

JD : Verification of Debug Subsystem Requirement: 6 years exp Job Profile & Expertise Requirements: End to end Debug Subsystem verification Expertise in RTL DV, GLS, Coverage closure Understanding of ARM Coresight Debug Architecture Work with architecture and SW teams for debug system requirements, Define VPlan ARM-based CPU debug system understanding - trace, crash debug CPU knowledge and expertise in C Strong SV, UVM knowledge

Role : Design Verification Work Location : Preferred Pune WFO, If candidate is found to be excellent Noida or Bangalore Remote options are open Years of Experience : 4+ Years Education Qualification : MS (or higher) in EE/EC/ECC Engineering Skills Must have excellent knowledge of computer architecture and design verification fundamentals. Must have experience with Verilog and popular EDA simulation, System Verilog assertions and testbench methodologies. Experience in developing complex test bench in System Verilog using OVM/ UVM methodology. Hands-on experience in AMBA protocol, PCIe MAC/ USB /MAC/ Bluetooth MAC/ Wifi 802.11 MAC layer protocol. Experience in Low Power Simulation/UPF setup, d...

You will be responsible for leading the verification team on multiple projects. Your role will involve working closely with clients, sales/marketing, project managers, and design teams to plan and successfully deliver on commitments. Additionally, you will implement and provide technical guidance to team members on various aspects of verification. It will be your responsibility to guide the team members on protocols, planning, and execution of error-related test scenarios. Qualifications required for this role include: - Experience and ability to lead a verification team - Strong SV, Classes, and UVM concepts - Capability to enforce strict code quality through code review - Proficiency in gu...

We are looking for a skilled professional with 7 to 15 years of experience in Design Verification to join our team. The ideal candidate will have expertise in SV/UVM Test Bench Development and protocols such as PCI Express, UCIe, CXL, AXI, ACE, CHI, Ethernet, RoCE, RDMA, DDR, LPDDR, or HBM. Roles and Responsibility Develop and implement test benches using SV/UVM methodology. Collaborate with cross-functional teams to identify and prioritize verification requirements. Create and execute test cases to ensure design quality and reliability. Analyze and debug issues found during testing. Participate in the development of verification plans and strategies. Work closely with designers to resolve d...

Design Verification Engineer - Specialised in Protocol like;n PCIe/Ethernet/DDR/LPDDR/HBM Location: Bangalore, India Experience: 5-12 Years Job Description Experience in interconnect protocol PCIe/ Ethernet. Experience in Memory protocol DDR/LPDDR/HBM; HBM is preferred. AXI/ACE/CHI understanding, [AXI is must] Understanding of DMA usage. Strong in SV/UVM. Experience in the usage of standard VIP in TBs (preferably Synopsys) AI/ML network understanding (good to have). Additional knowledge of perl/tcl scripting will be an advantage. Must Bachelors Degree in Electrical, Electronics or Computer Engineering