Design and Verification Engineer Onzestt Services

5.0 - 10.0 years

0 - 3 Lacs

bengaluru

Work from Office

Role & responsibilities Design Verification using UVM / SystemVerilog Experience with MIPI protocols (CSI, DSI, UniPro, UFS) Knowledge of NoC interconnect verification (throughput, latency, QoS) Strong debugging skills at block, subsystem, and SoC level Ability to develop automation frameworks and participate in continuous integration Experience with functional coverage closure and constrained-random verification Subsystem-level verification experience integrating multiple IPs Exposure to performance verification and corner-case scenario testing Develop and implement test plans, testbenches, and verification environments Define verification strategy and drive sign-off for assigned subsystems...

Posted 12 hours ago

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IP Verification Lead(Leadership Role) Xilinx

16.0 - 18.0 years

0 Lacs

india

On-site

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

Posted 1 month ago

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Lead/Senior Design Verification Engineer Excel Vlsi Technologies

5.0 - 10.0 years

15 - 30 Lacs

bengaluru

Work from Office

Design Verification Engineer (5+ Years) Responsibilities: Develop, enhance, and maintain verification environments and testbenches using System Verilog and UVM. Create test plans from design specifications and contribute to coverage-driven and metric-driven verification goals. Build and integrate UVM components such as agents, monitors, scoreboards, sequencers. Write, debug, and automate tests to verify complex RTL modules/IP blocks; perform test regression and analyse results. Implement and analyse functional and code coverage metrics for quality signoff. Work closely with design, software, and architecture teams for feature coverage and bug resolution. Document verification results, covera...

Posted 3 months ago

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Staff Verification Engineer TPT - Time Partition Testing

3.0 - 7.0 years

0 Lacs

karnataka

On-site

As part of the recruitment process, you will have the opportunity to engage in interviews, whether in person or virtually. During these interviews, you will be meeting with various members of the hiring team. The purpose of these discussions will be to delve into your skills and experiences, as well as to understand your preferences and aspirations for your future role. This interaction will enable both you and the hiring team to determine if there is a good fit between your profile and the requirements of the position.,

Posted 4 months ago

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Design Verification Engineer | FINJO N851 Omni Recruit

5 - 10 years

30 - 35 Lacs

Hyderabad, Pune, Bengaluru

Work from Office

Design Verification Engineer SoC/IP/Subsystem Verification UVM and SystemVerilog Protocols such as USB, DDR, PCIe

Posted 7 months ago

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