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3.0 - 8.0 years

9 - 19 Lacs

Bengaluru

Hybrid

Job Title: Emulation Engineer Location: Bangalore Experience: 3+ Years Notice Period: Immediate Joiners Preferred Industry: Semiconductors / VLSI / EDA Employment Type: Full Time, Permanent Job Description: We are looking for a highly motivated and skilled Emulation Engineer to join our SoC/Sub-System Pre-Silicon Verification team. The ideal candidate will have hands-on experience with Protium , Palladium , and other leading emulation/prototyping platforms. You will be responsible for enabling accelerated verification using Synthesizable BFMs and VIPs, supporting early software bring-up, and collaborating across cross-functional teams. Key Responsibilities: Develop and deploy Accelerated Verification IPs (VIPs) and Synthesizable Bus Functional Models (BFMs) . Integrate memory models and third-party VIPs in the Palladium and Protium environments. Engage with internal teams and EDA vendors to optimize pre-silicon emulation setup. Understand and support left-shift software validation methodologies. Optimize and debug critical paths in emulation platforms for performance improvements. Manage builds and regression environments for emulation flows. Required Skills: 4+ years of experience in emulation/prototyping platforms (preferably Protium , Palladium , Zebu , or Veloce ). Hands-on experience with Protium (must-have). Familiarity with JTAG , UART , and SpeedBridges (Ethernet/USB). Strong scripting skills in Shell , Python , or Perl . Proficiency in SystemVerilog , UVM , and Accelerated VIP integration. Working knowledge of standard interfaces: AMBA (AXI/APB/AHB), I2C, SPI, UART, Ethernet . Excellent analytical and debugging skills. Strong communication skills and ability to collaborate with global teams. Education: B.E./B.Tech or M.E./M.Tech in Electronics , Electrical , VLSI , or a related field. Keywords: Protium, Palladium, Emulation Engineer, BFMs, Accelerated VIPs, SystemVerilog, UVM, JTAG, UART, Veloce, Zebu, HAPS, Python, Perl, AMBA, AXI, SPI, I2C, Pre-silicon Validation, Semiconductor, SoC, RTL

Posted 2 weeks ago

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4.0 - 9.0 years

5 - 15 Lacs

Kolkata, Mumbai, Hyderabad

Work from Office

Develop/customize solutions in HCL Commerce v9+. Implement/manage RESTful APIs with Commerce REST framework. Utilize CI/CD tools and understand containerization in HCL Commerce v9. Develop with Spring Boot.Enhance member, payment,and order subsystems

Posted 1 month ago

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10 - 20 years

40 - 75 Lacs

Pune, Bengaluru, Greater Noida

Work from Office

Hiring Now ASIC Design Verification Experts | Automotive Chip Projects Location: Bangalore, Pune, Noida, Chennai Experience: 3 to 20+ Years | Notice Period: Immediate to 45 Days Send Resume to: prabhu.p@acldigital.com JD 1: VIP Development – Technical Lead / Manager 10–20+ years in UVM-based VIP Development & Integration Strong expertise in PCIe, SerDes, MIPI CSI/DSI, Ethernet, SATA Experience in IP & Chip-Level Verification for automotive SoCs Strong in SystemVerilog , Assertions , and Protocol Checkers Ability to lead verification strategy and mentor IC team members Excellent debugging, ownership, and communication skills IC + Team Leadership responsibility in a global ODC setup JD 2: Processor-based SoC / Subsystem DV – Lead & Engineer Roles Lead (15+ yrs): Strong in ARM Cortex-M/A, SoC bring-up (boot code, ISRs), AMBA protocols – Led 2–3 SoC DV projects, 10+ team size, Xtensa experience is a plus Engineer (3–10yrs): – SoC DV with C/Assembly testcases, SV/UVM, AHB/AXI protocol (Team: 9) – SoC or IP DV with SV/UVM, AHB/AXI, C/ASM optional (Team: 6) Why Join Us? Work on flagship automotive chip programs Fast-track your career with IC & Lead roles Get rewarded with attractive referral bonuses

Posted 2 months ago

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