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4.0 - 12.0 years
0 Lacs
noida, all india
On-site
Role Overview: As a Qualcomm Hardware Engineer at Qualcomm India Private Limited, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems including circuits, mechanical systems, and digital/analog/RF/optical systems to develop cutting-edge, world-class products. You will collaborate with cross-functional teams to meet performance requirements and drive digital transformation for a smarter, connected future. Key Responsibilities: - Lead the power team for DSP IP - Create power spec for Qualcomm DSP IPs based on the design spec - Work on Low power design and develop Power intent using UPF for DSP IPs - Validate power intent at RTL level, Gate level (s...
Posted 3 days ago
5.0 - 15.0 years
15 - 50 Lacs
bengaluru, karnataka, india
On-site
Qualification and Mandatory Skillset Requirements: Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering/VLSI with 5 to 10 years of practical experience Strong fundamentals in digital ASIC design Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture Multiple project experience with ARM based ecosystem components (A-series ARM Cores, SMMU, GIC, Coresight, NIC and other complex bus interconnects) Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs Exposure to ARM platform architecture specifications Strong experience with Verilog, SystemVerilog, DC/DC-T based synthesis, cons...
Posted 3 weeks ago
1.0 - 5.0 years
0 Lacs
karnataka
On-site
**Role Overview:** You will be responsible for creating power specifications for Qualcomm DSP IPs based on the design specifications. Your role will involve developing power intent using UPF for DSP IPs and validating power intent at RTL level and gate level (synthesis, PD) using CLP. You will also be required to fix any issues related to power intent based on PA DV feedback and debug problems related to MV cell insertion during synthesis, modifying UPF accordingly. Additionally, you will be responsible for dynamic and leakage power projection of DSP IPs at the beginning of the project, generating dynamic and leakage power numbers using PTPX, and tracking the same at different stages of the ...
Posted 1 month ago
4.0 - 8.0 years
0 Lacs
karnataka
On-site
As a Hardware Engineer at Qualcomm India Private Limited, your primary responsibilities will include: - Creating power spec for Qualcomm DSP IPs based on the design spec - Developing power intent using UPF for DSP IPs based on power spec - Validating power intent at RTL level, Gate level (synthesis, PD) using CLP - Fixing power intent based on PA DV feedback for any issue related to power intent - Debugging issues related to MV cell insertion during synthesis and modifying UPF accordingly - Projecting Dynamic and Leakage power of DSP IPs at the beginning of the project - Generating Dynamic and Leakage power numbers using PTPX and tracking them at different stages of the implementation flow -...
Posted 1 month ago
1.0 - 5.0 years
0 Lacs
karnataka
On-site
Qualcomm India Private Limited is seeking an individual to join the Engineering Group, specifically in the Hardware Engineering department. As part of this role, you will be responsible for creating power specifications for Qualcomm DSP IPs based on the design specifications provided. Your tasks will include developing power intent using UPF for DSP IPs, as well as validating power intent at both RTL level and Gate level (synthesis, PD) using CLP. In addition, you will be required to fix any power intent issues based on PA DV feedback and debug problems related to MV cell insertion during synthesis by modifying UPF accordingly. Another aspect of the role involves projecting dynamic and leaka...
Posted 3 months ago
4.0 - 8.0 years
0 Lacs
karnataka
On-site
Creating power specifications for Qualcomm DSP IPs based on the design specifications is a key responsibility in this role at Qualcomm India Private Limited. You will be required to develop power intent using UPF for DSP IPs based on the power specifications provided. Additionally, you will need to validate the power intent at RTL level and Gate level (synthesis, PD) using CLP. In case of any issues related to power intent, you will be responsible for fixing them based on PA DV feedback. Another aspect of the role involves debugging issues related to MV cell insertion during synthesis and modifying UPF accordingly. You will also be tasked with projecting dynamic and leakage power of DSP IPs ...
Posted 3 months ago
5.0 - 10.0 years
5 - 15 Lacs
Pune
Work from Office
Role & responsibilities Good Product knowledge of Dummies, Airbags, Seats & Seatbelts. Positioning Seats & Dummies (Humanetics/ATD ) as per various load cases using primer an ANSA. Conduct detailed CAE simulations for all passive safety load cases, including frontal, side, rear, and knee impact study. Responsible for conducting Structural CAE simulations for Full vehicle, sub-system, component, pedestrian related work. Should also be responsible for performing detailed analysis of CAE simulations, prepare report and provide solution to achieve the performance target requirements for the product being developed. Creating full vehicle runnable crash FE models and simulating crash tests frontal...
Posted 6 months ago
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