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3.0 - 8.0 years
10 - 20 Lacs
hyderabad
Work from Office
Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...
Posted 1 month ago
3.0 - 8.0 years
6 - 8 Lacs
hyderabad, telangana, india
On-site
Doing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%) Able to characterize basic STD Cells Writing ARC for STD cell char (using primeLib , Silicon smart) lib QA check Circuit understanding block wise , Full chip level Static timing Analysis of DRAM block wise , top level analysis , cell level analysis Writing constraints , analysing the STA reports Reporting violations to Design team , ownership for closure Parasitic modelling and assisting in design validation, reticle experiments and required tape-out revisions Performing verification processes with modelling and simulation using industry standard simulators Contributing to cross group communication t...
Posted 1 month ago
3.0 - 8.0 years
10 - 15 Lacs
bengaluru
Work from Office
Job Description: Role and Responsibilities: Develops and prepares stdcells layouts and detailed drawings of the semiconductor devices from schematics and related geometry provided by design engineering. Work may be completed through use of CAD or other computerized equipment. Checks dimensions, writes specifications, and verifies completed drawings, artwork or digitized plots. Check design layouts and detailed drawings. 3-5 years of experience. Qualification/Requirements: Must have 3-5 of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be abl...
Posted 1 month ago
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