Verification Methodology Architect Synopsys Inc

10.0 - 14.0 years

0 Lacs

karnataka

On-site

As a highly experienced Verification Engineer at our dynamic team, you will drive innovation in advanced verification methodologies for complex semiconductor designs. Your key responsibilities will include leading the deployment of verification tools, platforms, and strategies for complex IPs, driving simulation-based and hardware-assisted verification efforts, applying expertise in various verification technologies, developing and enhancing verification methodologies, collaborating cross-functionally with IP design and DV teams, and mentoring junior engineers to foster a culture of technical excellence. You should have 10+ years of experience in verification engineering for complex hardware systems, deep expertise in simulation and debug, hands-on experience with Static/Formal verification tools and methodologies, exposure to hardware-assisted verification environments, strong analytical and problem-solving skills, a degree in Electrical Engineering, Computer Engineering, or related field, familiarity with industry-standard verification languages, experience with scripting and automation, and a track record of technical leadership and cross-functional collaboration. Join our team at Synopsys and be part of an environment that values agility, courage, excellence, and trust. You will have the opportunity to work on cutting-edge technology and make a real impact.,

Posted 2 weeks ago

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