7 Standard Cell Jobs

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

Role Overview: You will be responsible for executing internal projects or small tasks of customer projects in the VLSI Frontend, Backend, or Analog design field with minimal supervision from the Lead. Key Responsibilities: - Work as an Individual contributor on tasks such as RTL Design, Module Verification, Physical Design, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, Signoff, etc. - Analyze and complete assigned tasks within defined domains successfully and on-time with minimal support from senior engineers - Ensure quality delivery approved by senior engineers or project lead - Verify quality using relevant metrics by Lead/Manager - Ensure timely delivery as per proje...

Posted 1 week ago

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3.0 - 8.0 years

15 - 25 Lacs

bengaluru

Hybrid

Job Description: Memory design engineer. Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree. You have some understanding of computer architecture and concepts. We expect you to have basic understanding of CMOS Transistors, their behaviors. We expect some basic understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Per...

Posted 3 weeks ago

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1.0 - 6.0 years

10 - 15 Lacs

hyderabad, bengaluru

Work from Office

Qualification/Requirements: Must have 1-6 Years of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process. Should have expertise in multiple standard cell layout library developments. Should be able to perform standard cell layout development and physical verification activities for complex designs as per provided specifications. Should have expertise in layout area and routing optimization, design rules, yield and reliability issues. Good understanding of layout fundamentals i.e., Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc. Should have adequate knowledge of schematics, in...

Posted 1 month ago

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4.0 - 7.0 years

20 - 35 Lacs

hyderabad

Work from Office

Job Description: . Required Skills and Experience: Bachelor or Masters degree in Electrical or Computer Engineering 4-7 years of experience in developing timing & power models (NLDM, CCS, etc.) for standard cell, I/O and custom circuits preferably in 12nm and below nodes Hands on experience with running PrimeTime, extracting timing data for custom PnR blocks In depth knowledge of electrical engineering fundamentals including CMOS device operation and characteristics, including understanding of advancing modeling techniques Hands on experience with simulation using HSPICE, Hsim or Finesim Experience with scripting tools such as Python/Perl/Shell etc. Initiative (self-motivated, self-confident...

Posted 1 month ago

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3.0 - 8.0 years

15 - 25 Lacs

noida

Hybrid

Job Description: Memory design engineer. Responsibilities: As Memory Design Engineer, we will work on developing memory compilers and memory Fast Cache instances for our next generation Cores achieving outstanding PPA. Required Skills and Experience : We Prefer graduate or postgraduate from a University or Engineering School, in Electronic Engineering or equivalent Engineering Degree. You have some understanding of computer architecture and concepts. We expect you to have basic understanding of CMOS Transistors, their behaviors. We expect some basic understanding of high speed/low power CMOS circuit design, clocking scheme, Static and complex logic circuits. Understanding of Power versus Per...

Posted 1 month ago

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8.0 - 13.0 years

10 - 20 Lacs

noida

Work from Office

8+ years of experience in Memory/Custom Layout design. Memory Leafcell layout library design from scratch Knowledge on different types of memory architectures. Knowledge in optimized layout design for better performance. Knowledge & hands on experience in Finfet technology, layout design and DRC limitations. Proficient in physical verification flow & debug Proficient in Cadence Virtuoso layout editor and Calibre Interested can contact me at shubhanshi@incise.in

Posted 2 months ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

You will be responsible for executing internal projects or small tasks within customer projects related to VLSI Frontend, Backend, or Analog design with minimal supervision from the Lead. Your role will involve working as an Individual contributor on tasks such as RTL Design, Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will be expected to analyze and complete assigned tasks within the defined domain successfully and on time with minimal support from senior engineers, ensuring quality delivery as approved by the senior engineer or project lead. Quality of deliverables is a key focus, requiring clean delivery of modules that are easy to...

Posted 3 months ago

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