9 Staff Engineer Jobs

Hello Candidate, Greetings from Hungry Bird IT Consulting Services Pvt Ltd. We are hiring Staff Engineer (Finance) for our client. Job Title: Staff Engineer Financial Systems Location: Remote Employment Type: Full-time Seniority Level: Staff Engineer / Technical Lead About the Role: Were looking for an exceptional Staff Engineer to lead architectural design, drive technical excellence, and shape the long-term technology vision for our financial systems platform. This role blends deep hands-on technical expertise with high-level strategic thinking, working across teams to mentor engineers, influence architecture, and drive consensus across complex systems. You'll operate at the intersection of backend architecture, cloud infrastructure, and cross-functional leadership ensuring scalability, resilience, and innovation in a fast-paced, regulated environment. Key Responsibilities: Technical Leadership: Mentor senior and junior engineers, foster a culture of engineering excellence, and elevate team capabilities through technical guidance. Architecture & Design: Lead design and evolution of scalable microservices and event-driven architectures that power critical financial systems. Strategic Influence: Collaborate with product and engineering leadership to shape and influence the technology roadmap and system-level decisions. Cross-Team Collaboration: Drive alignment and consensus across multiple engineering teams to ensure cohesive and maintainable architectures. Infrastructure at Scale: Provide expert guidance in deploying and operating cloud-native infrastructure, including CI/CD pipelines, observability, and automated provisioning. Hands-on Development: Remain deeply technical, contributing to key codebases and complex architectural components. Required Qualifications: Technical Expertise: Architectural Mastery: Extensive experience designing and scaling microservices and event-driven systems. Cloud & Infrastructure Leadership: Deep expertise with AWS, Terraform, Kubernetes, and Argo CD in production environments. Polyglot Engineering: Proficiency in Python, FastAPI, TypeScript/Node.js, GraphQL, and RESTful APIs. API Design & Integration: Strong experience designing and consuming high-performance GraphQL and REST APIs. CI/CD & Observability: Advanced understanding of GitHub Actions, monitoring, distributed tracing (OpenTelemetry or similar), and operational best practices. Leadership & Domain Experience: Engineering Leadership: Proven ability to mentor senior engineers, influence decisions across teams, and drive technical direction. Strategic Thinking: Demonstrated experience aligning technical goals with business objectives. Domain Knowledge: Previous experience in the financial services industry, with a deep understanding of security, compliance, and high-availability system requirements. Preferred Attributes: Strong communication and collaboration skills across engineering, product, and leadership. Comfortable balancing short-term needs with long-term architectural vision. Passionate about building elegant, resilient, and highly observable systems. (Interested candidates can share their CV with us at shreya@hungrybird.in or reach us at +919701432176.) PLEASE MENTION THE RELEVANT POSITION IN THE SUBJECT LINE OF THE EMAIL. Example: KRISHNA, HR MANAGER, 7 YEARS, 20 20DAYS NOTICE. Name: Position applying for: Total experience: Notice period: Current Salary: Expected Salary: Thanks and Regards Shreya +91 9701432176

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Description We are seeking a Senior Staff Engineer - Quality Engineer PC Video Game Tester to join our team in India. The ideal candidate will have extensive experience in quality assurance for video games, with a strong focus on ensuring the highest quality standards are met throughout the game development lifecycle. Responsibilities Design and implement test plans for PC video games to ensure quality and performance standards are met. Collaborate with game developers to understand features and functionalities, providing feedback to improve quality. Conduct thorough testing of game builds, identifying bugs, and documenting issues clearly for the development team. Participate in playtesting sessions, gathering feedback from players to inform quality assessments. Analyze game performance metrics and provide insights on potential improvements and optimizations. Stay updated with industry trends and tools in quality assurance and game testing. Skills and Qualifications Bachelor's degree in Computer Science, Engineering, or a related field. 5-10 years of experience in quality assurance, specifically in video game testing. Strong understanding of game development processes and methodologies. Proficiency in test management tools and bug tracking software (e.g., JIRA, TestRail). Experience with automation testing frameworks and scripting languages (e.g., Python, Java). Excellent analytical skills and attention to detail. Strong communication skills, both verbal and written, to report findings effectively. Ability to work collaboratively in a team environment and independently when required.

The responsibilities will majorly include : Understanding of WLAN PHY TX and RX design paths, Algorithms that control the various aspects of wireless systems Develop test plan to verify WiFi Standards including 11BE, sequences and design components. Own end to end DV tasks from coding Test bench and test cases, write assertions, running simulations and achieving all coverage goals Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches Successful candidate will be required to collaborate with worldwide design, silicon, and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. 8+ years industry experience with below skillset : Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology Experience in formal / static verification methodologies will be a plus Good understanding of WiFi Standards is a plus Experience with GLS, and scripting languages such as Perl, Python is a plus Education Requirements BE/BTech/ME/MTech/MS Communication Engineering and/or Electronics, VLSI from reputed university preferably with distinction Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Key requirements: Thorough knowledge of the ASIC design cycle and timing closure flow and methodology. 10 + years of proficiency in timing constraints and timing closure. Expertise in STA tools (any of Primetime, Tempus, Tweaker) and flow. Strong understanding of advanced STA concepts and challenges in advanced nodes Proficiency scripting languages (TCL, Perl, Python). Strong background in PNR and Extraction domain. Experience of constraints development tool (like spyglass) will be added advantage. Leadership qualities to lead (technically) and manage the STA CAD team Qualification: BE/BTech + 12 years of experience, or ME/MTech + 10 years of experience Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. ORMaster's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Engineering or related work experience. ORPhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience. Bachelors/ Masters with 10+ years Systems Engineering or related work experience Educational Requirements Bachelor's/Masters/Doctorate degree in Engineering, Electronics & Communication Micro Electronics Information Systems, Computer Science, or related field.Individuals who possess skills/experience in one or more of the following are requested to apply: Preferred Qualifications: Areas of Expertise (the more the better): Working experience with Complex Embedded Systems, Mobile/IOT/Auto domains preferred. Expertise in fields such as power performance use cases , system modeling, SOC Profiling, PPA tradeoffs, post silicon bring up, and product qual. Firm grasp of computer architecture and OS fundamentals Post Silicon System Validation of SOC Performance, Architecture Analysis and Feedback to future products. Analyzing the power-performance data for various CPU, GPU, AI workloads benchmarks Conducting detailed workload characterization and sensitivity analysis Develop and enhance analysis tools and instrumentation to assist in analysis, identifying performance gaps and optimization options CPU microarchitecture including cache, Latency, BW analysis, etc. Linux/Android kernel development, device driver development and Android architecture experience Collaborate with the architecture team on power-performance trade-off analysis as part of product definition. Power and/or performance optimization, CPU, SOC SW DCVS/DVFS Governors exposure Working experience at System level, Linux kernel internals system programming Collaborate with internal teams and external partners for analysis and optimizations Lab Hands-on: with Power Data Acquisition/DAQs, Oscilloscope, JTAGs, ARM Developer Studio exposure Exposure to ADB shell, shell scripts, Python scripts, Understanding of Linux/android systems , automation scripts/environment Exposure to Git, Jira, Android and QTI tools Good communication skills, presentation skills and should manage his/her tasks independently Acts as a tech lead on projects and owns the outcome of the project. Advises multiple teams of engineers in the development of complex hardware designs, evaluating various design features to identify potential flaws or issues

General Summary: 12+ years of experience in SoC design Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. 12+ years of experience with a Bachelor's/ Masters degree in Electrical/ Electronics engineering

General Summary: Bachelors /Masters degree in Engineering Relevant experience of 2-12 yrs in any of the mentioned domain - Design/Verification/ Implementation Will be working on cutting-edge Wireless Technology (IEEE 802.11) team. Strong fundamentals in core areas:Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Design You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Strong communication skills to work with design teams worldwide Verification Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C As a design verification engineer you will work on developing IPs catering to upcoming Wifi standards like 802.11bn and beyond. You will have opportunity to contribute to the life cycle of the technology right from IP specification, till productization/customer deployments, leveraging your verification, pre and post silicon debug expertise. Implementation Candidate will be responsible for next generation WLAN hardmacro implementation Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO

Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. As a design verification engineer you will work with a fast paced Integrated Wireless Technology (IEEE 802.11) team, with various wireless technologies embedded into an ARM based SOC infrastructure. You will be responsible for developing HW blocks (IP design), conduct High/Mid/Low level Design review and delivery IP to Subsystem team for making complex SoCs. You will be a critical part of the WLAN subsystem, contribute to IP design, sign-off the core to the SOC design team. Skills/Experience: 6-15 years experience in Digital Design with a leading chipset company Decent knowledge in Wireless connectivity technologies:IEEE 802.11 a/b/g/n/ac/ax/be Knowledge in SoC architecture, including CPUs (preferably ARM), communications peripherals, multi-domain clocking, bus & interconnect structures, and power management Strong fundamentals in one or few of these domain areas - Wireless and Mobile communications, Information theory, Coding theory, Signal processing Strong knowledge on fixed-point implementation Truncation/Rounding/Saturation concepts Strong knowledge on Digital communication engines viz., Demodulator, Deinterleaver, Viterbi/Turbo Decoders, Sigma-Delta modulation, Base band filters, FFT etc.