26 Sta Tools Jobs

You will be working as a Qualcomm Hardware Engineer, where you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems for cutting-edge products. Your role will involve collaboration with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Plan, design, optimize, verify, and test electronic systems for launching world-class products - Bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems - Collaborate with cross-functional teams to develop solutions and meet performance requirements **Qualifications Required:...

Lead and perform all major steps of the digital physical design flow, including block-level and top-level floorplanning, placement, clock tree synthesis, routing, and timing closure. Collaborate directly with RTL and synthesis teams for timing constraint setup, synthesis refinement, and netlist quality. Develop and implement strategies for power integrity, IR-drop analysis, EM verification and low-power physical design using UPF/CPF methodologies. Hands-on execution of physical verification: DRC, LVS, ERC, antenna checks, reliability and manufacturability checks, and ECO implementations. Drive timing analysis and closure at all implementation stages, using static timing analysis (STA) and ad...

As a Place and Route Engineer at our company in Hyderabad, you will be responsible for supporting Place and Route flows for various designs at 6nm, 4nm, and 3nm technology nodes. Your key responsibilities will include: - Qualifying tool versions and deploying new features into the flow - Updating existing flows for new capabilities as required - Utilizing hands-on experience in Synopsys Fusion Compiler or ICC2 - Demonstrating proficiency in scripting languages like PERL, TCL, and possessing strong debug capabilities - Applying hands-on experience in synthesis, place and route flows, and STA tools - Utilizing hands-on experience with physical verification tools such as PnR flow qualification,...

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most?innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they?provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are?the same. Job Description Key Responsibilities: Timing Analysis & Closure Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels. Achieve timing closure by resolving violations...

At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world's most?innovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as they?provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are?the same. Job Description Key Responsibilities: Timing Analysis & Closure Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels. Achieve timing closure by resolving violations...

As a Timing Expert at Alphawave Semi, you will play a crucial role in accelerating critical data communication essential for digital innovation. Your responsibilities will include: - Developing block and full-chip SDC methodology, creating clocking diagrams, and resolving timing issues to ensure design closure for performance, power, and area (PPA). - Collaborating with RTL and physical design teams to create and manage accurate constraints for successful timing closure. - Analyzing and debugging timing violations using industry-standard tools, optimizing design for PPA through timing analysis and constraint tuning. - Mentoring other designers on SDC development best practices and participat...

You will be responsible for supporting Place and Route flows for various designs at 6nm, 4nm, and 3nm technology nodes. This includes tool versions qualification and deployment of new features into the flow. You will also be updating existing flows for new capabilities as required. It is essential to have hands-on experience in Synopsys Fusion Compiler or ICC2, along with good control over scripting languages like PERL, TCL, and strong debug capabilities. Additionally, hands-on experience in synthesis, place and route flows, and STA tools is required. You will also need hands-on experience with physical verification tools, PnR flow qualification, running multiple PnR blocks to benchmark QOR,...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. To...

At Capgemini Engineering, the world leader in engineering services, you will be part of a global team of engineers, scientists, and architects dedicated to helping innovative companies unleash their potential. Your role will involve providing unique R&D and engineering services across various industries, contributing to cutting-edge projects such as autonomous cars and life-saving robots. Join us for a career full of opportunities where you can make a difference every day. Key Responsibilities: - Timing Analysis & Closure - Perform setup, hold, and skew analysis across Full-Chip, Sub-system, and IP levels. - Achieve timing closure by resolving violations and optimizing paths. - Constraint De...

As a Design/SDC Engineer at Cisco Silicon One, your role involves overseeing fullchip SDCs and collaborating with physical design and DFT teams to achieve fullchip timing closure in multiple timing modes. You also have the option to engage in block-level RTL design or block or top-level IP integration. Your contributions focus on developing efficient methodologies for promoting block-level SDCs to fullchip and ensuring the correctness and quality of SDCs early in the design cycle. Additionally, you are responsible for reviewing block-level SDCs, creating fullchip clocking diagrams, and providing mentorship on SDC development to other RTL design owners. Key Responsibilities: - Oversee fullchi...

As a Qualcomm Hardware Engineer, your role involves planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, and various other cutting-edge technologies to launch world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. Key Responsibilities: - Work on Logic & Physical aware Synthesis with Low Power, QoR optimization, STA and Netlist Signoff flows. - Perform Logic equivalence check and low power check clean up. - Develop constraints by interacting with designers and assist in porting constraints from block to top-level. - Lead a team of 3 to 5 members, handle multiple project...

Expertise in ASIC PD Expertise in digital physical design Expertise in working with 3nm & 5nm technology nodes Expertise in EDA synthesis, APR, STA tools and methodologies Expertise in one or more of the following tools ICC, ICC2, Innovus, Olympus Working knowledge of one or more of the following tools Primetime, Calibre, and Red hawk Expertise in working with multi modes and multi corners STA Working Knowledge of multiple power planes and multiple VT libraries Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification Good at scripting languages PERL, TCL, shell Worked on at least 2 tape ins of moderate to high speed designs with multiple power planes Debug, fi...

As an STA CAD methodology lead at Qualcomm India Private Limited, you will be responsible for leading the deployment of new features and methodologies related to Static Timing Analysis (STA) and Engineering Change Order (ECO) domain. Your role will involve covering various aspects such as STA flow/methodology development, continuous efficiency improvement, and providing flow development/support for ECO convergence using tools like PrimeTime, Tempus, Tweaker, and PrimeClosure. You will face challenges in ensuring timing convergence at both block and top levels on cutting-edge technology for high-performance designs to guarantee successful design tapeouts on time with high quality. Key Respons...

Join the dynamic front-end design team at Cisco Silicon One and be a part of the heart of silicon development. Engage in every facet of chip design, from architecture to validation, utilizing the latest silicon technologies to create groundbreaking devices. Cisco Silicon One empowers customers to deploy top-tier silicon across diverse applications, shaping revolutionary solutions by designing and testing advanced ASICs that integrate networking, compute, and storage into a single system. Gain exposure to all aspects of our systems with tightly integrated hardware and software solutions. We are looking for a talented ASIC engineer with a proven track record in high-performance products to mak...

Expertise in ASIC PD. Expertise in digital physical design Expertise in working with 3nm & 5nm technology nodes Expertise in EDA synthesis, APR, STA tools and methodologies Expertise in one or more of the following tools ICC, ICC2, Innovus , Olympus Working knowledge of one or more of the following tools Primetime, Calibre , and Red hawk Expertise in working with multi modes and multi corners STA Working Knowledge of multiple power planes and multiple VT libraries Basic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence Verification Good at scripting languages PERL, TCL, shell Worked on at least 2 tape ins of moderate to high speed designs with multiple power planes Debug,...

Join our dynamic front-end design team at Cisco Silicon One, where innovation meets cutting-edge technology! As part of the heart of silicon development at Cisco, you'll engage in every facet of chip design, from architecture to validation, using the latest silicon technologies to create groundbreaking devices. Cisco Silicon One is the only unified silicon architecture that empowers customers to deploy top-tier silicon across diverse applications, from top-of-rack switches to expansive data centers. Be a part of shaping Cisco's revolutionary solutions by designing and testing advanced ASICs that integrate networking, compute, and storage into a single system. With tightly integrated hardware...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable todays needs and tomorrows next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world were living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally...

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Qualcomm Hardware Engineer, your role will involve planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. To qualify for this role, you should have a Bachelor's deg...

Company Description Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable todays needs and tomorrows next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world were living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally...

Qualcomm India Private Limited is seeking a Hardware Engineer to join their Engineering Group. As a Qualcomm Hardware Engineer, you will be involved in planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Your role will contribute to launching cutting-edge, world-class products and collaborating with cross-functional teams to develop solutions that meet performance requirements. To be considered for this position, you must have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field with a...

You will be responsible for leading Static Timing Analysis (STA) and Place and Route (PNR) activities for complex subsystems within ASIC/SoC design. Your focus will be on achieving robust timing closure and optimizing physical implementation in terms of power, performance, and area. Your role will involve developing and refining methodologies for STA and PNR specifically tailored to address the challenges posed by large, multi-interface, or mixed-signal subsystems. You will drive automation and validation of timing and physical design data across subsystem boundaries to ensure seamless integration. As a key member of the team, you will mentor and guide junior engineers, fostering their techn...

THE ROLE: As aSilicon Design Engineer,you will work withformal experts and designers to verify formal properties and drive convergence. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general.You are a team player who hasexcellentcommunication skills. You have strong analytical and problem-solving skillsand are willingto learn and ready to take on problems. KEY RESPONSIBILITIES: Run spice simulations and capture that data using script written using a programing language Perform task of debugging design timing related issues both in Spice simulations and STA reports Std cell characterization using Synopsys Silicon smart tool Run i...

Static Timing Analysis (STA) Engineer with hands-on experience in timing validation, analysis, and closure for complex SoC designs. Should have a strong background in STA flows using Tempus, along with a solid understanding of deep submicron nodes. Required Candidate profile Expertise in STA using Cadence Tempus, timing validation across multiple PVT corners, DMMMC flows, and timing closure at both block and full-chip levels, skills in TCL and Python are essential

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 12+ years of Hardware Engineering or related work experience. Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 10+ year of Hardware Engineering or related work experience. PhD in Computer Science, Electrical/Electronics Engineering, Engineering, with 8+ years of related work experience STA/Timing CAD Methodology Lead As an STA CAD methodology lead, the role would expect the candidate to lead deployment of new features ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 12+ years of Hardware Engineering or related work experience. Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 10+ year of Hardware Engineering or related work experience. PhD in Computer Science, Electrical/Electronics Engineering, Engineering, with 8+ years of related work experience STA/Timing CAD Methodology Lead As an STA CAD methodology lead, the role would expect the candidate to lead deployment of new features ...