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5.0 - 7.0 years

0 Lacs

bengaluru, karnataka, india

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience. 5 years of experience with ATPG, low power designs, BIST, JTAG, IJTAG tools and flow. Experience with DFT EDA Tessent tools. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Proficient with IJTAG ICL, PDL terminology, ICL extraction, ICL modeling with Siemens Tessent Tool, Spyglass-DFT, DFT Scan constraints, and evaluating STA paths. Knowledge of high-performance design DFT techniques like SSN, high bandwidth IJTAG. About The Job Be part of a team that pushes boundaries, developing cust...

Posted 3 days ago

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