924 Sta Jobs - Page 7

You should have at least 3+ years of relevant experience in SoC Physical design, with a focus on multiple technology nodes including 5nm for TSMC and other foundries. Your expertise should include hands-on P&R skills, particularly in ICC/Innovus. You must possess expert knowledge in all aspects of Physical Design (PD) from Synthesis to GDSII, with a strong background in Floorplanning, Placement, CTS, Routing, P&R, Extraction, IR Drop Analysis, Timing, and Signal Integrity closure. Experience in taping out multiple chips and working at the top level in the latest technology nodes will be highly beneficial. Collaboration with CAD, Methodology & IP teams for PD implementation is critical, requiring regular sync-ups for deliveries. You should have significant knowledge, and preferably hands-on experience, in SoC STA, Power, Physical Verification, and other sign-off processes. Problem-solving capabilities, proactive attitude, hardworking nature, and strong interpersonal skills are essential for this role. A Bachelor's Degree in Electrical, Electronics, or Computer Engineering is required for this position. About Company: 7Rays Semiconductor Private Ltd. provides end-to-end custom SoC design solutions, including SoC Architecture, RTL design, Design verification, DFT, Physical Design & Analog design. The company focuses on offering services to top semiconductor and system companies to assist them in designing complex SoCs. The company believes in building effective partnerships with clients to deliver high-quality solutions tailored to their needs. With a dedicated engineering team and a successful track record in project execution, the company is committed to excellence and innovation in SoC Design, Development, and deployment of customers" products.,

AMRITSAR GROUP OF COLLEGES is looking for Assistant Placement Officer to join our dynamic team and embark on a rewarding career journey. Career Counseling : Provide guidance and career counseling to students or job seekers, helping them identify their skills, interests, and career goals. Job Placement : Facilitate job placements by matching candidates with suitable job openings based on their qualifications and preferences. Employer Engagement : Build and maintain relationships with employers, businesses, and organizations to understand their hiring needs and requirements. Job Postings and Recruitment : Post job vacancies and coordinate recruitment processes, including conducting interviews and coordinating selection procedures. Resume and Interview Preparation : Assist candidates in preparing resumes, cover letters, and interview techniques to enhance their chances of securing a job. Internship and Training Opportunities : Identify and promote internship and training opportunities for students and job seekers to gain practical experience. Networking Events : Organize job fairs, networking events, and industry - specific workshops to connect candidates with potential employers.

PHYSICAL DESIGN ENGINEER (4 6 YEARS) - Incise & CMI (Cornell Medical Instruments) PHYSICAL DESIGN ENGINEER (4 6 YEARS) 2025-04-18T06:11:54+00:00 Skills : Calibre,ICC2,Perl,TCL Job Locations : Hyderabad Total vacancies : 3 Experience on EMIR analysis for multiple modes, including; static and dynamic with/without functional vectors Should have expertise in understanding and debugging EMIR issues in a block level. Power analysis for the blocks. Experience on Floor-planning, Place & route, power and clock distribution, pin placement. In-depth knowledge on industry leading tools like Redhawk, Olympus/ICC2, Primetime, and Calibre Knowledge of package modeling, package and chip level analysis is added advantage Good understanding of Physical design verification using Calibre. Knowledge of Synthesis and DFT is added advantage. Prior experience with 16nm or finer geometries is a plus. Proficient use of tcl/Perl Must have good communication skills and self-driven individual. To apply for . Our team will contact you for further details. Job Category: PHYSICAL DESIGN ENGINEER Job Type: Full Time Job Location: Hyderabad Apply for this position Allowed Type(s): .pdf, .doc, .docx By using this form you agree with the storage and handling of your data by this website. *

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT.: Experience: 3-5 Years.

The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Design For Testability - DFT. Experience: 3-5 Years.

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipros Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc Mandatory Skills: VLSI Physical Design Planning. Experience: 8-10 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Physical Place and Route Experience: 3-5 Years

Drawing, SOR & Specification study along with supplier for giving timely inputs to minimize design changes. (DFM / DFA ) FTG & APQP and tracking at all the stages of product development. Support suppliers for the development of parts and ensure QCD targets. Proactively identifying & resolving problems and maintaining quality standards First time right Development of parts. PPAP submission to QA for closure and handing over for regular supplies. Poka yoke implementation Good knowledge of quality tools, FTG and processes to ensure seamless flow of information on quality concerns to seniors. Meet all material requirement time targets by continuous interaction with supplier and internal agencies. Verifying compliance as per predetermined and approved audit schedule. Monitoring & Tracking Part development as per MPDS guidelines Releasing schedules & Procuring parts based on project gateways to ensure smooth vehicle builds. Capacity Assessment of supplier and risk identification.

Must have good knowledge & Manufacturing understanding of Gears & Shafts & Machining Commodity Parts. Must have a basic knowledge of surface treatment processes such as painting, Plating Powder Coating etc. Must have good knowledge on material grades available and suitability for application in Gear & Shafts. Draw up a plan to develop/procure components with vendors within time, cost and quality objectives. Vendor analysis and rationalization for capacity assessment, time frame agreement. Effective co-ordination with the Design team to ensure first time right and end delivery of product. Variance analysis at each stage of development in terms of Quality, Cost and Delivery and corrective action. Developing and implementing innovative approaches in cost reduction. To get actively involved in project feasibility studies Responsible for quality, Cost and delivery (QCD) targets for all new products and improvements in existing products. Part development as per APQP process and Project timelines. Responsible for quality, Cost and delivery (QCD) targets for all new products and improvements in existing products Able to review design and manufacturing feasibility assessments alongside R&D to ENSURE first-time-right results and timely product delivery.

As an experienced professional with 7-9 years of experience, you will be responsible for executing customer projects independently with minimal supervision in the field of VLSI Frontend Backend or Analog design. Your role will involve guiding team members technically and taking ownership of specific tasks/modules related to RTL Design, Module Verification, PD, DFT, Circuit Design, Analog Layout, STA, Synthesis, Design Checks, and Signoff. You will lead the team to achieve results, complete assigned tasks successfully and on-time, and anticipate, diagnose, and resolve problems as necessary. Your responsibilities will also include ensuring on-time quality delivery approved by the project manager and client, automating design tasks flows, writing scripts to generate reports, and coming up with innovative ideas to reduce design cycle time and cost. Additionally, you will be expected to write papers, file patents, and devise new design approaches. To measure the outcomes of your work, quality will be verified using relevant metrics by UST Manager/Client Manager, timely delivery will be assessed based on relevant metrics, and the reduction in cycle time and cost using innovative approaches will be monitored. The number of papers published, patents filed, and trainings presented to the team will also be considered. Your outputs are expected to demonstrate high quality deliverables with zero bugs in the design/circuit design, clean delivery of the design/module, meeting functional specs/design guidelines without deviation, and thorough documentation of tasks and work performed. Timely delivery, teamwork, innovation, and creativity will be key aspects of your role, along with participation in technical discussions and training forums. Your skills should include proficiency in languages and programming skills such as System Verilog, Verilog, VHDL, UVM, C, C++, Assembly, Perl, TCL/TK, and Makefile. You should have experience with EDA tools like Cadence, Synopsys, and Mentor tool sets, as well as technical knowledge in IP spec architecture design, bus protocols, physical design, circuit design, analog layout, synthesis, DFT, floorplan, clocks, P&R, STA, extraction, physical verification, and more. Strong communication skills, analytical reasoning, problem-solving abilities, attention to detail, and the ability to interact with team members and clients effectively are essential. You should also be well-versed in using available EDA tools, delivering tasks on time per quality guidelines, understanding standard specs and functional documents, and continuously learning new skills as needed. If you have led and executed projects in RTL Design, Verification, DFT, Physical Design, STA, PV, Circuit Design, Analog Layout, and possess a good understanding of design flow and methodologies, this role could be a great fit for you. Additionally, experience in analog circuit design and verifications, knowledge of TSMC FinFet technologies, and familiarity with Cadence Virtuoso circuit design suite would be beneficial. In this role, you will be responsible for circuit design and verification of analog modules like Voltage regulator, LDOs, developing circuit architecture, optimizing designs, guiding layout engineers, problem-solving, and effective communication skills. Desired skills include solid CMOS Analog design fundamentals, hands-on experience with Cadence Virtuoso, technical knowledge of power-performance trade-offs, understanding device parameter variation, and being a good team player in a multi-site work environment. Join us at UST, a global digital transformation solutions provider, where you will work alongside the world's best companies to make a real impact through transformation. With deep domain expertise, innovation, and agility, UST partners with clients to embed innovation and create boundless impact, touching billions of lives in the process.,

Quest Global is a leading organization known for its innovation and rapid growth in the engineering services sector. With a rich domain expertise and a strong presence in the top OEMs across seven industries, we are a company with a 25-year legacy and a vision to reach a centennial milestone. Driven by ambition, passion, and humility, we are on a journey to shape the future through engineering. We are in search of individuals who embody the spirit of humble geniuses, believing in the power of engineering to turn the impossible into reality. Our ideal candidates are innovators inspired by technology and driven to design, develop, and test solutions as trusted partners for Fortune 500 clients. As a diverse team of engineers, we understand that our work goes beyond technical solutions; we are shaping a brighter future for all. If you are eager to contribute to meaningful projects and be part of an organization that values collective success and learning from failures, we invite you to join us. We are looking for achievers and courageous challenge-crushers who possess the following skills and characteristics: Responsibilities: - Performing floor-planning and routing studies at block and full-chip level - Executing top-level floorplan and clock pushdown to Partition - IO Planning and bump planning - Collaboration with Package team to meet Die file milestones - Conducting full chip and partition level timing analysis - Exploring low power techniques and power reduction opportunities - Designing and analyzing clock distribution - Executing Physical verification activities at full-chip level - Leading technical activities of physical design throughout technology readiness, design, and execution Qualifications: - Proficiency in Netlist2GDSII Implementation, including Floorplanning, Power Grid Design, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification, and Chip finishing - Experience in Physical Design Methodologies and sub-micron technology of 16nm and lower nodes - Handling designs with >1M instance count and 1 GHz frequency - Programming skills in Tcl/Tk/Perl for automating design processes and enhancing efficiency - Hands-on experience with PNR Suite from Cadence & Synopsys (Innovus & ICC2) - Strong background in Static Timing Analysis (PrimeTime SI), EM/IR-Drop analysis (PT-PX, Redhawk), and Physical Verification (Calibre) Education Type: M.E/M.Tech/MS-VLSI Design & Embedded System Job Type: Full Time-Regular Experience Level: Mid Level Total Years of Experience: 5 - 8,

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair equipment as needed e. Allocates modules for testing and verification and reviews data and project documentation f. Provides guidance on technical escalations and review regression testing data g. Prepares documentation containing information such as test case and product scripts for IP and publishes it to the client for feedback and review h. Ensures all project documentation is complete and uploaded as per technical specifications required by the client 2. Provide customer support & governance of VLSI components & hardware systems a. Identify and recommend system improvements to improve technical performance b. Inspect VLSI components & hardware systems to ensure compliance with all applicable regulations and safety standards c. Be the first point of contact to provide technical support to client and help debug specific, difficult in-service engineering problems d. Evaluate operational systems, prototypes and proposals and recommend repair or design modifications based on factors such as environment, service, cost, and system capabilities 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Mandatory Skills: VLSI Physical Verification. Experience: 5-8 Years.

Role Purpose The purpose of this role is to perform the development of VLSI system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create verification environment and the development plan as per Universal Verification Methodology b. Create test bench development and test case coding of the one or multiple module c. Write the codes or check the code as required d. Execute the test cases and debug the test cases if required e. Conduct functional coverage analysis and document the test cases including failures and debugging procedures on SharePoint/ JIRA or any other platform as directed f. Test the entire IP functionality under regression testing and complete the documentation to publish to client g. Troubleshoot, debug and upgrade existing systems on time & with minimum latency and maximum efficiency h. Write scripts for the IP i. Comply with project plans and industry standards 2. Ensure reporting & documentation for the client a. Ensure weekly, monthly status reports for the clients as per requirements b. Maintain documents and create a repository of all design changes, recommendations etc c. Maintain time-sheets for the clients d. Providing written knowledge transfer/ history of the project Mandatory Skills: VLSI Physical Design Planning. Experience: 1-3 Years.

Som produktionstekniker hos oss p Saft ing r du i en grupp med andra produktionstekniker och projektledare, d r alla drivs av det gemensamma m let Saft AB Produktionsteknik - Produktionstekniker Vi s ker en N u s ker vi en produktionstekniker till v r fabrik i Oskarshamn. Vi s ker dig som har ett genuint intresse av teknik och vill vara en del av att skapa en effektiv och st rningsfri produktion i v rldsklass. Brinner du f r produktionsf rb ttringar och automation s kan denna tj nst vara n got f r dig. Arbetsuppgifter Som produktionstekniker hos oss p Saft ing r du i en grupp med andra produktionstekniker och projektledare, d r alla drivs av det gemensamma m let att st tta produktionen p b sta s tt. I din roll som produktionstekniker driver du renden och projekt, b de sj lvst ndigt och tillsammans med dina medarbetare. Du f rv ntas ven ing och delta i vriga uppdrag och projekt p avdelningen. Dessa projekt r fr mst fokuserade p maskinf rb ttringar, ergonomiska f rb ttringar och f rb ttrings tg rder i v r produktion. Det kan handla om renden/projekt b de i maskiner och inom v r process. Du r ven delaktig i f retagets Lean-aktiviteter. Avdelningen i vrigt r ansvariga f r f rb ttringar och nyanskaffning av utrustning och i ditt dagliga arbete ing r det att st tta avdelningen i detta. En del ritning och konstruktion i 3D f rekommer, har du inte kunskaperna i detta sedan tidigare kommer vi att tillf rse dig med en utbildning. Bakgrund och egenskaper Vi ser att du har en relevant eftergymnasial utbildning inom omr det, eller att du har erfarenhet inom likv rdigt arbete. D arbetet innefattar mycket samarbete med s v l interna som externa intressenter, r det viktigt att du har en god samarbetsf rm ga och att du r kommunikativ. Du ska ven ha en f rm ga att skapa och bibeh lla relationer. F r att trivas i rollen ska du ha f rm gan att kunna prioritera och strukturera ditt arbete p b sta s tt, d renden och projekt ofta sker parallellt med varandra. Vi s ker efter dig som vill v xa i din roll och utvecklas inom f retaget. Du uttrycker dig v l i tal och skrift p svenska s v l som p v rt koncernspr k engelska. Vi till mpar l pande urval, s v nta inte med din ans kan. Rekryteringsprocessen pausas under semesterveckorna v.29 32. F r en s ker och trygg arbetsmilj till mpar vi drogtester och bakgrundskontroller i samband med nyanst llning.

Experience in handling STA of multi-power domain designs & constraint mode merging. Job Description In your new role you will: Defining and verification of STA constraint for Functional and Test/SCANModes. Defining PVT s corners required for covering all desired scenarios for a design Knowledge on OCV/AOCV/POCV derates. Understanding of Prime-Time and TEMPUS tools, which helps in quick debugging of design/timing issues. VASTA timing closure based on chip IR drop. Knowledge on signal SI analysis and PT-PX flow. Your Profile You are best equipped for this task if you have: BE/B.Tech/M.Tech with 8+ years. Project leading knowledge is preferred. Delivery oriented, Passionate to learn and explore, Transparent in communication, Flexibility related to project situations. Candidate should have strong STA fundamentals. Has done timing sign-off including timing margin calculations. Independently, hands-on STA lead of projects. Experience in handling STA of multi-power domain designs & constraint mode merging. STA flow development , abstraction with bottleneck identification. Proficient in design margins and SDC constructs. TAT reduction inmulti-mode, multi power domain/designs. Generate timing ECOs for Physical design. Drive ambitious schedules and enables dependent teams to accomplish. Interface to design team and PD team and drive TAT reduction for PD. Has experience in mentoring junior engineers. Proficient with EDA tools from Synopsys/Cadence . Excellent analytical & communication skills. Shown ability to collaborate in a multi-functional environment, cross-site or cross-time zone. Proficient in Tcl and Perl or other scripting relevant language is a plus. Contact: swati.gupta@infineon.com We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant s experience and skills. Learn more about our various contact channels. Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process. Click here for more information about Diversity & Inclusion at Infineon.

Meet the Team Join the Cisco Silicon One team in developing a unified silicon architecture for web-scale and service provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography silicon organization and a large campus (with an on-site gym, healthcare, caf, social interest groups, and philanthropy) with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact Write micro-architecture specifications and participate in reviews. Implement Verilog RTL to meet timing, performance, and power requirements. Contribute to full chip integration and timing methodology/analysis. Develop and analyze functional coverage. Help define, evolve, and support our design methodology. Collaborate with the verification team to address design bugs and close code coverage. Work closely with the physical design team to close design timing and place-and-route issues. Triage, debug, and root cause simulation, software bring-up, and customer failures Perform diagnostic and post-silicon validation tests in the lab Minimum Qualifications: Bachelor's Degree / Master's Degreein Electrical or Computer Engineering with 7+ years of ASIC design. Prior experience working with Verilog or System Verilog programming skills Experience with simulators/synthesis/static timing constraints and related tools (e.g., VCS, DC, PrimeTime) Experience with debugging and verification methodologies Preferred Qualifications: Understanding of Networking technologies and concepts Scripting experience (Python, Perl, TCL, shell programming) Experience with formal verification tools Experience with emulation

1 Perform the electrical calculations and prepares the designs and BOM in SAP and creates the documentation. 2 Make the technical offers for the low voltage 3Ph Induction motors for various applications and with stringent customer specications. 3 Has thorough knowledge in design of three phase induction motor the preferably has an experience guiding the team members to achieve the KPIs 4 Has basic knowledge of the National and international standards governing motors. 5 Identify and select the components based on given specications, support to SP and manufacturing. 6 Work on cost reduction with innovative solutions to minimize the cost of offerings/product. Analyze localization requirements and designs/adapts products and solutions accordingly. 7 Support to manufacturing to solve the technical issues. 8 Communication with internal partners such as execution team, Quotation support team, sales team and external partners such as vendor, customer, consultant, etc.

Role Purpose The purpose of this role is to lead the VLSI development and design of the system by defining the various functionalities, architecture, layout and implementation for a client Do 1. Lead end to end VLSI components & hardware systems a. Design, analyze, develop, modify and evaluate the VLSI components and hardware systems b. Determine architecture and logic design verification through software developed for component and system simulation c. Analyze designs to establish operating data, conducts experimental tests and evaluates results to enable prototype and production VLSI solutions d. Conduct system evaluations and make appropriate recommendations to modify designs or repair equipment as needed e. Allocates modules for testing and verification and reviews data and project documentation f. Provides guidance on technical escalations and review regression testing data g. Prepares documentation containing information such as test case and product scripts for IP and publishes it to the client for feedback and review h. Ensures all project documentation is complete and uploaded as per technical specifications required by the client 2. Provide customer support & governance of VLSI components & hardware systems a. Identify and recommend system improvements to improve technical performance b. Inspect VLSI components & hardware systems to ensure compliance with all applicable regulations and safety standards c. Be the first point of contact to provide technical support to client and help debug specific, difficult in-service engineering problems d. Evaluate operational systems, prototypes and proposals and recommend repair or design modifications based on factors such as environment, service, cost, and system capabilities 3. Team Management a. Resourcing i. Forecast talent requirements as per the current and future business needs ii. Hire adequate and right resources for the team iii. Train direct reportees to make right recruitment and selection decisions b. Talent Management i. Ensure 100% compliance to Wipros standards of adequate onboarding and training for team members to enhance capability & effectiveness ii. Build an internal talent pool of HiPos and ensure their career progression within the organization iii. Promote diversity in leadership positions c. Performance Management i. Set goals for direct reportees, conduct timely performance reviews and appraisals, and give constructive feedback to direct reports. ii. Incase of performance issues, take necessary action with zero tolerance for will based performance issues iii. Ensure that organizational programs like Performance Nxt are well understood and that the team is taking the opportunities presented by such programs to their and their levels below d. Employee Satisfaction and Engagement i. Lead and drive engagement initiatives for the team ii. Track team satisfaction scores and identify initiatives to build engagement within the team iii. Proactively challenge the team with larger and enriching projects/ initiatives for the organization or team iv. Exercise employee recognition and appreciation Mandatory Skills: VLSI Physical Verification. Experience: 5-8 Years.

Manage all student progress and prepare required strategies to overcome issues. Arranging for guest lectures. Arranging visits to the local parlors for the students. Arranging Induction & different sessions too. Looking after placements for students of hub center Maintaining pre placement and post-placement data and sharing it with the central office. Checking the quality of training at the centers and submitting reports about the same. Taking an initiative in creating new placement partnerships and tie ups in coordination with the Central team. Track the students for the complete period of their employment in the city. Provide mentor-ship support to students employed in the region to help them settle down including counseling, helping with finding accommodation, resolving issues with employers, helping establish social network in city, providing any other emergency support in the city Capture feedback of students and recruiters on an ongoing basis. Build and maintain regular connections with current and past employers & clients. Requirements Willingness to travel regularly Minimum Qualification Graduation 1 years of experience in the field Own two wheeler with required documents Basic Computer knowledge (Microsoft Excel & Word, Internet, etc.) Good Communications Skills Fluency in English, Hindi & the Regional Language (Kannad) Experience/ interest in training, teaching & coordinating.

Front End Integration of Digital, Analog IPs and Subsystems to build complete SoC Netlist. IOMUX and Padring generation and integration. Design of SoC Specific Logic IPs. Perform quality checks like Lint and CDC at SoC level. Implement all feedback from Verification and Physical Design teams for all changes required. Develop SoC level Testbench for RTL and Postlayout Simulations. Collaborate with ATE and Test teams and deliver test patterns for Probe and Package level testing. Support Verification and Post-Silicon Debugging of issues. Experience and Skills Required 10-15 Years Experience in front end integration for complex SoCs. Strong scripting skills. Hands on experience in RTL coding, Lint, CDC. Experience in developing IOMUX and Padring. Expertise in developing testbench for SoC to support directed and random verification. Experienced with working with ATE teams for delivery of test patterns. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

Define SoC Function, Performance requirements. Define SoC Connectivity, Interconnectivity, Memory Map, Interrupt Map, Pin Muxing, Power Management, SoC Clock Distribution, SoC Debug. Define Data Flow and Use Cases. Maintain SoC Die Size and Power Estimates and ensure competitive PPA. Close collaboration with SoC Design and Verification Teams. Experience and Skills Required 10 to 15 years of experience in SoC / IP Design, IP Architecture SoC Architecture. Experience with ARM Microcontrollers, Memory and Interconnect technologies. Hands-on experience with defining Clocking Strategy, Power Management and Low Power strategies. Must be familiar with various Connectivity standards, SoC Security. Hands on experience with IP Design / Micro Architecture required. Experience with Signal Processing IP is preferred. Good Understanding of SoC Front End and Back End Design Flow, SoC Verification and Validation flows. Must have deep understanding Software requirements - Secure Boot, RTOS, Device Drivers. Soft Skills Strong analytical, problem-solving, and hands-on skills. Self-driven and thrives when facing open-ended tasks. Start-up mentality: fast-paced, flexible and team-oriented. Good written and verbal communication skills with great documentation skills. Flexibility to work with varied schedules and tolerance for ambiguity.

Role Purpose The purpose of the role is to design, and architect VLSI and Hardware based products and enable delivery teams to provide exceptional client engagement and satisfaction. Do Define product requirements, design and implement VLSI and HARDWARE Devices. Constant upgrade and updates of design tools, frameworks and understand the analysis of toolset chain for development of hardware products. Ability to analyse right components and hardware elements to choose for product engineering or development. Ability to conduct cost-benefit analysis and choose the best fit design. Knowledge on end to end flow of VLSI including design, DFT and Verification and Hardware product development from design, selection of materials, low level system software development and verification. Needs by displaying complete understanding of product vision and business requirements Develop architectural designs for the new and existing products Part Implementation of derived solution Debug and Solve critical problems during implementation Evangelize Architecture to the Project and Customer teams to achieve the final solution. Constant analysis and monitoring of the product solution Continuously improve and simplify the design, optimize cost and performance Understand market- driven business needs and objectives; technology trends and requirements to define architecture requirements and strategy Create a product-wide architectural design that ensures systems are scalable, reliable, and compatible with different deployment options Develop theme-based Proof of Concepts (POCs) in order to demonstrate the feasibility of the product idea and realise it as a viable one Analyse, propose and implement the core technology strategy for product development Conduct impact analyses of changes and new requirements on the product development effort Provide solutioning of RFPs received from clients and ensure overall product design assurance as per business needs Collaborate with sales, development, consulting teams to reconcile solutions to architecture Analyse technology environment, enterprise specifics, client requirements to set a product solution design framework/ architecture Provide technical leadership to the design, development and implementation of custom solutions through thoughtful use of modern technology Define and understand current state product features and identify improvements, options & tradeoffs to define target state solutions Clearly articulate, document and sell architectural targets, recommendations and reusable patterns and accordingly propose investment roadmaps Validate the solution/ prototype from technology, cost structure and customer differentiation point of view Identify problem areas and perform root cause analysis of architectural design and solutions and provide relevant solutions to the problem Tracks industry and application trends and relates these to planning current and future IT needs Provides technical and strategic input during the product deployment and deployment Support Delivery team during the product deployment process and resolve complex issues Collaborate with delivery team to develop a product validation and performance testing plan as per the business requirements and specifications. Identifies implementation risks and potential impacts. Maintain product roadmap and provide timely inputs for product upgrades as per the market needs Competency Building and Branding Ensure completion of necessary trainings and certifications Develop Proof of Concepts (POCs), case studies, demos etc. for new growth areas based on market and customer research Develop and present a point of view of Wipro on product design and architect by writing white papers, blogs etc. Attain market referencsability and recognition through highest analyst rankings, client testimonials and partner credits Be the voice of Wipros Thought Leadership by speaking in forums (internal and external) Mentor developers, designers and Junior architects for their further career development and enhancement Contribute to the architecture practice by conducting selection interviews etc Mandatory Skills: VLSI Physical Design Planning.Experience8-10 Years.

As an intern at our company, you will be responsible for assisting in various recruitment activities. Your day-to-day responsibilities will include sourcing and screening potential candidates, scheduling interviews, and maintaining candidate databases. Additionally, you will help in developing job postings and recruitment materials, as well as participating in job fairs and recruitment events. Your role will also involve providing administrative support to the recruitment team. Our company is dedicated to providing comprehensive semiconductor design services, ranging from RTL & ASIC design to physical design, STA, verification, DFT, circuit design & layout, FPGA, Foundation IP design, PSV, and emulation. We are experiencing rapid growth and boast an exceptional team of technology specialists who bring a competitive advantage, agile mindset, and innovation to tackle technological challenges and drive business transformation. With expertise in electronic design, platform design, automation, embedded systems, and software technologies, we focus on strategizing, innovating, and designing intelligent solutions that enhance product performance and enable seamless connectivity.,

Description: Job Description As a Verification Engineer at HBM Micron Technology, Inc., you will be responsible for analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design team and verification team Responsibilities will include, but are not limited to: • Doing STD cells characterization work (max up to 40% of time) , Static timing analysis (60%) • Able to characterize basic STD Cells • Writing ARC for STD cell char (using primeLib , Silicon smart) • .lib QA check • Circuit understanding block wise , Full chip level • Static timing Analysis of DRAM block wise , top level analysis , cell level analysis • Writing constraints , analyzing the STA reports • Reporting violations to Design team , ownership for closure • Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions • Performing verification processes with modeling and simulation using industry standard simulators • Contributing to cross group communication to work towards standardization and group success • Driving innovation into the future Memory generations within a dynamic work environment Desired experience 3-5 Years

About The Role Skill required: Network Services - Cisco Routing and Switching Operations Designation: Business Advisory Associate Qualifications: Any Graduation Years of Experience: 1 to 3 years About Accenture Combining unmatched experience and specialized skills across more than 40 industries, we offer Strategy and Consulting, Technology and Operations services, and Accenture Song all powered by the worlds largest network of Advanced Technology and Intelligent Operations centers. Our 699,000 people deliver on the promise of technology and human ingenuity every day, serving clients in more than 120 countries. Visit us at www.accenture.com What would you do "Helps transform back office and network operations, reduce time to market and grow revenue, by improving customer experience and capex efficiency, and reducing cost-to-serveLooking for a candidate who has expertise in Networking and has good knowledge on fundamentals of NetworkA solution that validates the ability to install, configure, operate, and troubleshoot medium-size route and switched networks." What are we looking for "Agility for quick learningAbility to work well in a teamProcess-orientationWritten and verbal communicationNetwork fundamentalsUnderstanding all the networking devices:Routers, switches, etc.IP connectivity, access, addressing, and servicesNetwork security fundamentalsInstallation, Configuration, Operation, Administration, and Troubleshooting Fundamental IPv4 & IPv6 Business NetworksExcellent CommunicationProblem Solving SkillsFlexibilityTeamworkExperience and working knowledge on OSI Layer 1 (Physical) and 2 (Datalink) troubleshooting (WAN point to point connection) Experience and working knowledge with IP, WAN, OSI layer, TCP/IP models, IPv4/v6 addressing, subnetting and Ethernet. Layer 1 to Layer 3 fault isolation and troubleshooting with telco providers and onsite technicians. Experience working with internal groups (e.g., order entry, test & turn-up, sales), and third party client/vendors and LEC s (preferred). Familiarity with SDH, SONET, and Ethernet concepts Basic knowledge of cabling infrastructure such as patch panels, cross-connects and fiber types. Experience working with internal groups (e.g., order entry, test & turn-up, sales), and third party client/vendors and LEC s (preferred). Experience working with global carriers in North America, LATAM, APAC, and/or EMEA Experience working in a multi-vendor DWDM optical environment Good English written/verbal communication and customer engagement skills Strong focus on providing an outstanding user experience Must be detail-oriented, with strong organizational skills Able to work independently and also in a team environment" Roles and Responsibilities: "In this role you are required to solve routine problems, largely through precedent and referral to general guidelines Your expected interactions are within your own team and direct supervisor You will be provided detailed to moderate level of instruction on daily work tasks and detailed instruction on new assignments The decisions that you make would impact your own work You will be an individual contributor as a part of a team, with a predetermined, focused scope of work Please note that this role may require you to work in rotational shiftsProvide 24/7/365 monitoring of ticket queue, phones, and IRC channelManage network events such as:Fiber cuts/ Leased Wave outage - Notify dark fiber providers of outage and manage event to resolution, verify quality of remedial work by measuring power levels etc., and provide all stakeholders with periodic updatesLink Down, Latency, Packet Loss, Network Traffic Issues and Routing and BGP issues - FamiliarityProvide 24/7/365 monitoring of ticket queue, phones, and IRC channelManage network events such as:Fiber cuts/ Leased Wave outage - Notify dark fiber providers of outage and manage event to resolution, verify quality of remedial work by measuring power levels etc., and provide all stakeholders with periodic updatesLink Down, Latency, Packet Loss, Network Traffic Issues and Routing and BGP issues - Familiarity and understanding of router show commands and how to interpret the outputManage client s optical network, manage alarms and faults in a multi-vendor environment, andTracking of all work in ticketing system network interconnects with internal and external network operatorsTrack and maintain a repository of RFOs and vendor improvements/actions and be able to represent client during external calls with 3rd party providersManage troubleshooting, confirming fix and restoring traffic from network incidents reported by internal teams and third-party teams, engaging field resources and inventory teams as necessary.Track, coordinate and manage hardware recalls / minor card or part replacement, RMA part delivery, initiate production change requests and work with onsite techs for faulty card/part replacementRead/Parse vendor notifications and translate to Clients Production Change Request (PCR s)Look up affected circuits to include them in change requestEscalate any emergency change requests for immediate review and schedulingNavigate ambiguity with unclear notifications from vendors - escalating as necessary or referring notification to other internal client teams" Qualification Any Graduation