Sr. Engineer 1 - Post Silicon Validation

As a Sr. Engineer 1 in Post Silicon Validation at Tessolve Semiconductors, a Design and Test Engineering Service Company, you will be responsible for validating embedded systems functionality using virtual prototyping tools like Synopsys Virtualizer, Cadence Protium, or similar. Your role will involve collaborating with software teams, developing test cases for hardware/software integration, and debugging hardware systems in a virtualized environment. Your proficiency in programming languages such as C or Python will be essential for testing and automation tasks. Key Responsibilities: - Utilize virtual prototyping tools like Synopsys Virtualizer, Cadence Protium, or similar for testing and validating embedded systems functionality. - Collaborate effectively with software teams to share functional validation insights. - Develop and execute basic test cases for hardware/software integration. - Debug and troubleshoot hardware systems in a virtualized environment. - Demonstrate a strong understanding of embedded systems, firmware development, and system-on-chip (SoC) architecture. - Use programming languages such as C or Python for testing and automation purposes. Qualifications Required: - 5+ years of experience using virtual prototyping tools like Synopsys Virtualizer, Cadence Protium, or similar. - Strong communication skills for effective collaboration with software teams. - Familiarity with basic test case development and execution for hardware/software integration. - Experience in debugging and troubleshooting hardware systems in a virtualized environment. - Proficiency in programming languages such as C or Python for testing and automation tasks.,