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5.0 - 8.0 years

4 - 6 Lacs

Kochi

Work from Office

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- New Product Development - Develop new & innovative spice products from concept to commercialization - Manage a portfolio of spice development projects - Standardize recipes, specifications of spices, blends & seasonings - Handle customer queries

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5.0 - 6.0 years

5 - 6 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Foundit logo

Design oriented and forward-looking thought process Sound knowledge of custom Analog/AMS design techniques, implementation and verification B.Tech. or M.Tech. degree in Electrical Engineering with 5+ years of relevant industry experience or Phd with relevant experience. Awareness of full custom layout techniques Exposure to advanced process challenges, including ESD and Reliability Exposure to architecture, design and verification of PVT, Oscillators, Bandgap, PLLs, LDOs, ADCs, Amplifiers, PHYs and other Mixed-signal blocks Excellent teamwork, communication, mentoring, and interpersonal skills with both internal teams and external customers Preferred skills : Strong custom design experience - specification, circuit design description and schematics Hands on experience with circuit design & simulation tools, IC design CAD packages - from any EDA vendor Strong understanding of SPICE simulator concepts and simulation methods Familiar with circuit simulation tools like PrimeSim, FineSim, HSPICE or similar Must have prior experience with Custom Compiler or equivalent schematic & Layout editor tools Experience with statistical design methodology like generating and analyzing Monte-Carlo results Awareness of post-layout extraction & simulation, testing in conjunction with silicon validation Demonstrated technical expertise in the productization of advanced technologies

Posted 2 weeks ago

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5.0 - 7.0 years

2 - 11 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

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Reviewing Die, package, and PCB physical layout designs Modeling, simulating, and verifying high-speed interface performance against specifications Participating in the improvement of SI/PI methodology flows Collaborating and networking with other teams on task-oriented projects Independently driving SI/PI research and development activities Ensuring designs meet stringent performance, power, and size requirements The Impact You Will Have: Enhance the performance and reliability of high-speed interfaces Contribute to the development of cutting-edge technology in chip design Improve SI/PI methodology flows, increasing efficiency and accuracy Foster collaboration and innovation across globally distributed teams Drive research and development initiatives to stay ahead in the industry Support Synopsys mission to lead in the Era of Pervasive Intelligence What You ll Need: Bachelors or Masters degree in Electrical or Electronics Engineering Minimum of 5 years of relevant experience Proficient in Transmission line theory and time/frequency-domain analysis Experienced with SPICE and familiar with 3D field solvers Conversant with working of DDR and PCIe/Ethernet interfaces Good verbal and written English communication skills Experience in scripting languages such as Python and TCL is a plus Familiarity with both Windows and Linux operating system

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5.0 - 10.0 years

3 - 9 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Foundit logo

* Diagnose problem, understand customer requirements and propose new enhancements for product improvement. * Support Benchmarking/customer engagements * Perform internal testing along release cycles * Prepare usage specification for new projects * Prepare and Deliver Product training/presentation/demos Qualifications and Experience * 5+ year Transistor level circuit simulation or support experience. * Experience in Standard Cell design, IO Cell design or Custom Cell design. * Experience in Std Cell/IO Cell/Custom Cell characterization * Solid understanding of SPICE simulation with industry-standard simulators * Knowledge of simulation environment integration is desirable. * Excellent communication and presentation skills, problem solving, and project management skills as well as ability to interface with customers and developers are essential. * Education: BSEE or equivalent with 5+ years (or MS/Ph.D. with 3+ years) of relevant experience

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4.0 - 10.0 years

4 - 10 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Foundit logo

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a highly skilled and experienced Analog Design Engineer with a passion for developing cutting-edge technology With a strong foundation in Electrical or Computer Engineering, you have honed your expertise in transistor-level circuit design and are adept at working with high-speed analog integrated circuits Your deep understanding of CMOS design fundamentals and familiarity with various SerDes sub-circuits make you an invaluable asset to any team You thrive in collaborative environments, working seamlessly with cross-functional teams of analog and digital designers Your meticulous approach ensures optimal power, area, and performance targets are met, and your innovative design strategies push the boundaries of what is possible You are not only technically proficient but also possess excellent communication and documentation skills, allowing you to effectively share your ideas and results with peers and customers Your proactive attitude and problem-solving abilities make you a go-to person for post-silicon design updates and electrical characterization In summary, you are a seasoned professional ready to take on the challenges of high-speed analog integrated circuit design in the latest FinFET process nodes, What Youll Be Doing: Review SerDes standards to develop analog sub-block specifications, Identify and refine circuit architectures to achieve optimal power, area, and performance targets, Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design, Oversee physical layout to minimize the effect of parasitics, device stress, and process variation, Present simulation data for peer and customer review, Document design features and test plans, Consult on the electrical characterization of your circuit within the SerDes IP product, Propose solutions for post-silicon design updates, The Impact You Will Have: Drive innovation in high-speed analog integrated circuit design, Ensure optimal performance, power efficiency, and area utilization of our products, Contribute to the development of industry-leading SerDes IP, Enhance the reliability and quality of our analog sub-blocks, Support the successful integration of SerDes IP into customer products, Foster collaboration and knowledge sharing within the R&D team, Influence design strategies and best practices within the organization, What Youll Need: BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering, In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals, Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits, Awareness of ESD issues and circuit techniques for addressing them, Familiarity with custom digital design and high-speed logic paths, Knowledge of design for reliability, including EM, IR, and aging considerations, Experience with tools for schematic entry, physical layout, and design verification, Hands-on experience with physical layout of high-speed circuits is a plus, Proficiency with SPICE simulators and simulation methods, Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture, Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired, Who You Are: Collaborative and able to work effectively in a team environment, Detail-oriented with a strong focus on quality and reliability, Proactive problem-solver with innovative design strategies, Excellent communicator with strong documentation skills, Adaptable and able to thrive in a fast-paced, dynamic environment, The Team Youll Be A Part Of: You will be part of a fast-growing analog and mixed-signal R&D team dedicated to developing high-speed analog integrated circuits in the latest FinFET process nodes Our team is composed of talented analog and digital designers from diverse backgrounds, working collaboratively to push the boundaries of technology We leverage a full suite of IC design tools, supplemented by custom, in-house tools supported by an experienced software/CAD team, to create industry-leading SerDes IP, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process,

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8.0 - 10.0 years

3 - 9 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Foundit logo

Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have:Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need:BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are:Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment.

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8.0 - 13.0 years

3 - 13 Lacs

Bengaluru / Bangalore, Karnataka, India

On-site

Foundit logo

Review SerDes standards to develop analog sub-block specifications. Identify and refine circuit architectures to achieve optimal power, area, and performance targets. Propose design and verification strategies that efficiently use simulator features to ensure the highest quality design. Oversee physical layout to minimize the effect of parasitics, device stress, and process variation. Present simulation data for peer and customer review. Document design features and test plans. Consult on the electrical characterization of your circuit within the SerDes IP product. Propose solutions for post-silicon design updates. The Impact You Will Have:Drive innovation in high-speed analog integrated circuit design. Ensure optimal performance, power efficiency, and area utilization of our products. Contribute to the development of industry-leading SerDes IP. Enhance the reliability and quality of our analog sub-blocks. Support the successful integration of SerDes IP into customer products. Foster collaboration and knowledge sharing within the R&D team. Influence design strategies and best practices within the organization. What You ll Need:BE with 8+ years of relevant experience or MTech with 6+ years of relevant experience in Electrical Engineering or Computer Engineering. In-depth familiarity with transistor-level circuit design and sound CMOS design fundamentals. Detailed design experience with at least one, and familiarity with several other SerDes sub-circuits. Awareness of ESD issues and circuit techniques for addressing them. Familiarity with custom digital design and high-speed logic paths. Knowledge of design for reliability, including EM, IR, and aging considerations. Experience with tools for schematic entry, physical layout, and design verification. Hands-on experience with physical layout of high-speed circuits is a plus. Proficiency with SPICE simulators and simulation methods. Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control / data-capture. Experience with scripting languages such as TCL, Perl, C, Python, or MATLAB is desired. Who You Are:Collaborative and able to work effectively in a team environment. Detail-oriented with a strong focus on quality and reliability. Proactive problem-solver with innovative design strategies. Excellent communicator with strong documentation skills. Adaptable and able to thrive in a fast-paced, dynamic environment

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2 - 7 years

2 - 7 Lacs

Hyderabad

Work from Office

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As a Design Verification Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high-speed designs, complex functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will need to have the ability to work as a Design Verification Engineer, to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's various design and verification teams all over the world to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs as needed. Responsibilities will include, but not limited to: Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. • Good knowledge of Basic Analog/Digital concepts. • Good knowledge of Verilog/SV concepts. • Experience in using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview. • Experience in understanding Spice simulation environment/Digital simulation environment, able to debug analog/digital design related issues. • Work experience in co-sim simulation designs is a plus. • Good scripting skills using perl, python is a plus. • Must possess good communication skills and ability to work well in a team. Bachelor's with 2+ years of work experience or Post Graduate Degree in Electronics Engineering or related engineering field with 1-2 years of working experience is required.

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1 - 3 years

4 - 7 Lacs

Hyderabad

Work from Office

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Description: As a Design Verification Engineer, you will work with a highly innovative and motivated design team using state of the art memory technologies to develop the most advanced DRAM and Emerging memory products. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high-speed designs, complex functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will need to have the ability to work as a Design Verification Engineer, to evaluate Full chip or block level functionality and provide solutions to help delivery of functionally correct design. You will work closely with Micron's various design and verification teams all over the world to contribute to the success of the design projects by applying verification tools and techniques, providing verification status and summaries to specific designs as needed. Responsibilities will include, but not limited to: Provide verification support to design projects by simulating, analyzing, and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. • Good knowledge of Basic Analog/Digital concepts. • Good knowledge of Verilog/SV concepts. • Experience in using spice simulation and digital simulation tools like Virtuoso, primesim, Finseim, Hspice, Xcellium, Simvision, Waveview. • Experience in understanding Spice simulation environment/Digital simulation environment, able to debug analog/digital design related issues. • Work experience in co-sim simulation designs is a plus. • Good scripting skills using perl, python is a plus. • Must possess good communication skills and ability to work well in a team. Bachelor's with 2+ years of work experience or Post Graduate Degree in Electronics Engineering or related engineering field with 1-2 years of working experience is required.

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7 - 10 years

15 - 30 Lacs

Hyderabad

Hybrid

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Role & responsibilities : * Pre-Silicon Support: Simulate, analyze, and debug pre-silicon full-chip designs to ensure functional accuracy. * Test Case Development: Develop stimulus and test cases to increase the functional coverage for DRAM, SRAM, and other emerging memory technologies. Core Requirements: * Strong Communication Skills: Ability to collaborate effectively within a team. * Leadership: Guide new team members and engineers, sharing your knowledge and experience. * Analytical Expertise: Deep understanding of complex CMOS and/or gate-level circuit designs. * Proficiency in SPICE and/or Verilog simulations. Preferred candidate profile : Required Skills: * Experience with SystemVerilog, PLI coding, and UVM Test Benches. * Expertise in DRAM, SRAM, or other memory-related fields. * Familiarity with AMS verification and co-simulation is a plus. * Experience with Ethernet, SATA, Perl Scripts, and Debugging is helpful. * Knowledge of full-chip DDR, gate-level simulation, and SPICE simulation is optional but advantageous. Perks and benefits : Flexible Working Hours , Transport facility, Competitive Salary

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7 - 10 years

15 - 22 Lacs

Hyderabad

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Role & osition: Sr vefication engg 1 position exp - 7-10 yrs SV & UVM method, verilog simulation, exp in memory (Not theoretical, BUT practical)- really great SRAM DRAM - v good prf - Masters degree, graduate also ok. gate level simulation, AMS skills good to have Cadence, VCS - normal verification Mentor experience required, not team lead TMSC not required preference will be given to SPICE simulation No protocols required– should be a able to write a test plan, test bench Knowledge on Pearl can be alternative to PLI coding responsibilities Preferred candidate profile Perks and benefits

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