Senior Design Verification Engineer InSemi Technologies

5.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

As a Senior Design Verification Engineer with 5+ years of experience in Bangalore & Hyderabad, your key responsibilities will include: - Demonstrating expertise in SOC/IP verification and System Verilog Coding. - Utilizing experience in OVM/UVM/methodology for verification processes. - Working in environments involving APB/AHB/AXI/PCIe/DDR protocols. - Developing Test Benches for verification purposes. - Having a good understanding of Gate Level simulation and debugging techniques.,

Posted 2 days ago

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