652 Soc Verification Jobs - Page 18

Job Description Job Summary: We are looking for a highly experienced and motivated Senior Design Verification Engineer with a deep understanding of the PCIe protocol and hands-on experience in SystemVerilog and UVM. The ideal candidate will lead verification activities for complex PCIe subsystems or SoCs, and contribute to building scalable, reusable verification infrastructure. Key Responsibilities: Develop UVM-based verification environments for PCIe IPs or SoCs . Define and execute comprehensive verification plans for PCIe Gen3/Gen4/Gen5/Gen6 features. Drive testbench development, stimulus generation, scoreboarding, and coverage closure. Validate protocol compliance including LTSSM, TLP/D...

Dear Candidate, We are hiring for Top MNC!! Location: Pune Work Mode: Hybrid-General Shift Contract: 1 Year Required Skills As a member of the Design Verification [Pre-Silicon DV] Team for NXP WCS/SCE BU. You will be responsible for verification of various IPs and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team. You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architectu...

We are now looking for a SOC Verification Engineer. NVIDIA is pioneer in building the worlds fastest highly-parallel processing systems for deep-learning, high-performance computing, and automotive applications. We are seeking a passionate, innovative, and highly motivated verification engineer to work on the complex CPU-GPU memory systems. What You ll Be Doing: Responsible for defining test plans & architecting testbenches for verification of the CPU/GPU memory subsystem. Verify micro-architecture/architecture features at subsystem or full chip testbenches. Work with architects, designers, and pre-silicon verification teams to accomplish your tasks. Build reusable bus functional models, tra...

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verif...

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance ...

Job Specs : We are seeking a highly skilled and motivated ASIC Verification Engineer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of ASIC Verification IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers. Work Location : Bangalore, Pune. Malaysia, Singapore Desired Profile : B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or Computer Engineering Visa / w...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IP’s/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seed...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm is a company of inventors that unlocked 5G, ushering in an age of rapid acceleration in connectivity and new possibilities. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform its potential into world-changing technologies and products. In the role of GPU Functional Verification Engineer , your project responsibilities will include the following, Develop deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces Strategize, brainstorm, and propose a DV environment, develop test ...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Candidate will be responsible for IP Level Verification of Qualcomm Spectra Camera Sub Systems Modules for next gen Qualcomm product portfolio. This role will require the candidate to understand details of the camera signal processing modules, verify them at module & subsystem level for enhanced features. Engineer should independently be able to own the verification of IP level modules end to end with continuous enhancements and collaborate with IP Verification, Design and System leads. Necessary skills/experience: 1+ years of experience in RTL design verification using SystemVerilog/UVM and industry-stand...

IP/SOC Verification ,Design & Verification Failure Debugging Skills Verilog, System Verilog, & UVM Functional Coverage Development, & Coverage Closure PCIe, Ethernet, CXL, USB, CAN, LIN, FlexRay, AXI, AHB, APB Concepts in Digital Design

Design Verification Engineer (5-7 years experience) Company: HCL Tech Job Summary: We are looking for a talented and motivated Design Verification Engineer to join our team and play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools. Responsibilities: Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., UVM) Design and write robust verification environments (testbenches) to achieve high code coverage Utilize simulation tools (e.g., ModelSim, Cadence Incisiv...

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Required technical and professional expertise . 6 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and in...

Hi All, We are having opportunities for Design verification lead with SOC Verification Exp for Hyderabad location Exp: 8+ yrs Loc: Hyd Skills: Soc Verification, UVM, OVM, Verilog, System Verilog

We are looking for Senior SOC Verification Engineers for the Hyderabad location. 1) SOC Verification 2) SV UVM 3) DDR, PCIe, Ethernet. Interested candidates, Kindly Share with me your updated profile with Naveen.a@modernchipsolutions.com

Strong in digital design. Skills in ASIC/FPGA verification(directed test or SV/UVM) A good knowledge of simulation flow. Good scripting knowledge Perl/python Share your Resume to mansoor@hisoltech.com

Key Responsibilities Define and implement DFT architecture for digital IP and SoCs. Insert and verify scan chains, boundary scan (JTAG), and test points. Develop and run ATPG and MBIST for various memory instances. Health insurance

Experience with OVM/UVM/VMM/Test Harness, developing assertions, checkers, coverage, and scenario creation.,min 2 to 3 SoC Verification projects.developing test and coverage plans, verification environments, and validation plans,

Job Description Must have: Must Have Required Expertise: Should be able to build test plan, tests, coverage assertions from Specification. Architect and build testbench and testbench components. Good in UVM,SV,C SVA. Familiar with industry protocols, such as AXI, APB, AHB, PCIe, SoC. Very good in debugging. Worked with industry standard EDA tools Synopsys, Cadance simulators and debugging tools. Good to have skills: Experience with scripting and automation. Demonstrated leadership and collaboration abilities, including mentoring, cross-functional communication, UPF-simulations, GLS and a proactive approach to automation. Exposure to SOC verification, Formal verification methodologies.

Role & responsibilities Test bench development and debug UVM/C based test case development and debug. Power aware test case development and debug External/Internal VIP based test development and debug. Mixed-signal block modelling and RNM based testing. Coverage analysis (code, functional, assertion) Verification plan reviews, Verification reviews Back-annotated netlist simulation execution and debug Debug failing cases & Coverage improvements.

About the Role Skills: Strong in IP / SoC-level verification Responsibilities Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Experience: 5+ years in Design Verification Required Skills Strong in IP / SoC-level verification Proficient in testbench and testcase development (SystemVerilog/UVM preferred) Clear understanding of verification plans, coverage metrics, and debugging Availability: Immediate to within 4 weeks

Job Description : We are looking for experienced SoC Verification Engineers with a strong background in ARM-based SoC architectures . Key Responsibilities : Perform verification at SoC level for ARM-based designs Develop, implement, and debug testcases and verification environments Work closely with RTL, DFT, and firmware teams to ensure high-quality SoC delivery Handle integration and verification of various IPs within the SoC Required Skills : 5+ years of experience in SoC-level verification Strong knowledge of ARM architecture (Cortex-A/M, AMBA protocols, etc.) Expertise in SystemVerilog/UVM , testbench development, and scripting Familiarity with simulation tools like VCS, Questa, etc. Ex...

Role & responsibilities Please interested candidate send me cv : galeiah.g@honeybeetechsolutions.com call me :7995220108. Client Name: Proxelera Industry: SEMICON Position Name SoC NoC Verification Engineer Job No : PROX-14080 Position type: Permanent Total Exp: 7+ years to 15y HBTS Budget: Open Notice Period: Immediate to 15days Work Location: Bangalore Job Description Must have: SoC NoC Verification Engineer with 7+ years of experience This role involves developing test plans, writing verification code, debugging issues, and collaborating with design teams to validate complex interconnect systems. Key Responsibilities Develop and execute verification plans for SoC and NoC architectures. Wr...

Responsibilities Understand the standards/specifications Architecture development and documenting implementation level details Hands on work for every aspect of verification cycle Responsible for the compliance with the latest Methodologies. Developing Verification IPs Define Functional Coverage matrix and Comprehensive Test plan Regression management and functional coverage closure DUT integration and verification for IP delivery sign-off Leading small team Person Specification Required Skills Hands-on experience of complete verification cycle with strong verification concepts Strong knowledge of Verilog, SystemVerilog and UVM Experience in UVM based Verification IP development Experience i...

Role & responsibilities 7+ years of design verification experience. MS (or higher) in EE/EC/ECC Engineering As a member of the Design Verification [ Pre-Silicon DV ] Team for client WCS/SCE BU You will be responsible for verification of various IPs and/or SoC. Candidate must be self-motivated and capable of working independently or as part of a team You will implement simulation testbenches, low power simulation setup, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target verification goals. You will also assist with developing test-plans, debugging failures and analyzing coverage information. Must have excellent knowledge of computer architecture and design...