As a member of the AECG Product Validation and Solutions Teams within AMD you will develop and enable the next generation of PCIe technologies to power datacenter, acceleration, AI and communications markets. High speed PCIe connectivity is critical for modern technology and infrastructure that helps improve our lives. THE ROLE: At AMD you will help create leading edge PCIe technologies used in a wide variety of applications. The focus of this role is to design, plan and execute RTL design for new and existing PCIe technology and solutions for programmable silicon at AMD. Key development includes PCIe technologies for PCIe Gen 6, CXL, TDISP, IDE, PCIe in-line DMA and other leading edge products. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. You should also have a desire to expand existing skill sets and take on new challenges. KEY RESPONSIBILITIES: Develop and productize next generation PCIe, CXL and connectivity solutions to power datacenter, acceleration, AI and communications markets Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs Develop comprehensive testing plans including Compliance and Interop testing. Critically review and provide feedback on the Design Implementations and Verification plans Pre-Silicon and Post Silicon validation for new PCIe enabled blocks Responsible for IP design, Silicon bring up, Validation and IP release Work in collaboration with the Global teams PREFERRED EXPERIENCE: Strong knowledge in RTL coding, preferably with Verilog and SystemVerilog Proficient in RTL simulation tools (VCS, Modelsim) Knowledge of high-speed interfaces including, PCIe, CXL, Ethernet, DDR3/4/5, LPDDR3/4, HBM, AMBA AXI/AHB/APB protocol Experience in using Lab equipment like PCIe Lecroy/Viavi Exerciser/Analyzer Experience in developing system or IP prototypes using FPGAs Strong knowledge of IP/SOC design methodologies Experience with scripting languages including Tcl, Perl, Python, Unix shells and Makefiles Knowledge of C/C++ is an added advantage ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering with 8+Yrs of exp

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of PCI Express controllers for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. At NVIDIA, our employees are passionate about parallel and visual computing. Were united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design. You will be collaborating with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B. Tech. / M. Tech or equivalent experience 5+ years of relevant experience Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive verification of IP or interconnect protocols (e. g. PCI Express, USB, SATA) Experience in developing and working in functional coverage based constrained random verification environments Background in DV methodologies like UVM/VMM and exposure to industry standard verification tools for simulation and debug Ways to stand out from the crowd: Excellent knowledge of PCIE protocol - Gen3 and above Good understanding of the system level architecture of PCIE/CXL-based designs Perl, Python or similar scripting and SW programming language experience Good debugging and analytical skills Good interpersonal skills & dream to work as a great teammate #LI-Hybrid

Role & responsibilities Hands on software development experience on latest Microprocessors, SOCs, Microcontrollers from NXP, TI, Infineon etc. Multicore processors firmware and software development is preferred. Hands on experience in latest Xilinx/Intel FPGAs based software design and development starting from System software, driver firmware and Software development is a must. Knowledge and Work experience of high-speed interfaces and device drivers development for interfaces like PCIe, DDR4/DDR3/QDRII, USB, Ethernet and other basic communication protocols like SPI, UART, I2C and CAN etc Additional Skills: Hands on software development experience on latest Microprocessors, SOCs, Microcontrollers from NXP, TI, Infineon etc. Multicore processors firmware and software development is preferred. Hands on experience in latest Xilinx/Intel FPGAs based software design and development starting from System software, driver firmware and Software development is a must. Knowledge and Work experience of high-speed interfaces and device drivers’ development for interfaces like PCIe, DDR4/DDR3/QDRII, USB, Ethernet and other basic communication protocols like SPI, UART, I2C and CAN etc Preferred candidate profile

Role & responsibilities Hands on software development experience on latest Microprocessors, SOCs, Microcontrollers from NXP, TI, Infineon etc. Multicore processors firmware and software development is preferred. Hands on experience in latest Xilinx/Intel FPGAs based software design and development starting from System software, driver firmware and Software development is a must. Knowledge and Work experience of high-speed interfaces and device drivers development for interfaces like PCIe, DDR4/DDR3/QDRII, USB, Ethernet and other basic communication protocols like SPI, UART, I2C and CAN etc Additional Skills: Hands on software development experience on latest Microprocessors, SOCs, Microcontrollers from NXP, TI, Infineon etc. Multicore processors firmware and software development is preferred. Hands on experience in latest Xilinx/Intel FPGAs based software design and development starting from System software, driver firmware and Software development is a must. Knowledge and Work experience of high-speed interfaces and device drivers’ development for interfaces like PCIe, DDR4/DDR3/QDRII, USB, Ethernet and other basic communication protocols like SPI, UART, I2C and CAN etc Preferred candidate profile

Role Purpose: As a DevOps Engineer - III at Jumio, You should be strong in both the Dev and Ops part of DevOps. We are looking for someone who has a deep understanding of systems architecture, understands core CS concepts well and is able to reason about system behavior rather than merely working with the toolset of the day. We believe that only such a person will be able to set a compelling direction for the team and excite those around them. If you are someone who fits the description above, you will find that the rewards are well worth the high bar. Being one of the early hires of the Bangalore office, you will have a significant impact on the culture and the team; you will work with a set of energetic and hungry peers who will challenge you, and you will have considerable international exposure and opportunity for impact across departments. Role Value: This member will work as an IC in the BASE team adding value to increase the productivity of engineers in Jumio and build a scalable and secure platform. He will mentor junior engineers in the team and drive projects that need collaboration. Example Responsibilities Design and develop solutions for deploying highly secure, highly available, performant, and scalable services in elastically provisioned environments Design and maintain persistent storage solutions in our infrastructure Own all operational aspects of running persistent storage including automation, monitoring, and alerting, reliability, and performance Have a direct impact on running a business by thinking about innovative solutions to operational problems Drive solutions and communication for production-impacting incidents Running technical projects and being responsible for project-level deliveries Partner well with engineering and business teams across continents Experience and Qualifications Bachelor s or advanced degree in Computer Science or a closely related field 7+ years of professional experience in DevOps, with at least 1/2 years in Linux / Unix Very strong in core CS concepts around operating systems, networks, and systems architecture including web services Strong scripting experience in Python and Bash Deep experience administering, running, and deploying AWS-based services Strong knowledge of PostgreSQL, redis, Elasticache (OpenSearch), Neptune internals, performance tuning, query optimization, and indexing strategies Experience with Aurora, redis, Elasticache, Neptune architecture, including replication, failover, and backup/restore mechanisms Familiarity with AWS services commonly used with above services (e.g., RDS, CloudWatch, IAM, VPC, Lambda) Experience with high availability and disaster recovery solutions like Aurora, OpenSearch, Neptune, Redis Experience with database migration tools like AWS DMS, pg_dump, or logical replication. Solid experience with Terraform, Packer, and Docker or their equivalents Knowledge of security protocols and certificate infrastructure. Strong debugging, troubleshooting, and problem-solving skills Broad experience with cloud-hosted applications including virtualization platforms, relational and non-relational data stores, reverse proxies, and orchestration platforms Curiosity, continuous learning, and drive to continually raise the bar Strong partnering and communication skills Great to have Experience and Qualifications Past experience as a senior developer or application architect is strongly preferred. Experience working with, and preferably designing, a system compliant to any security framework (PCI DSS, ISO 27000, HIPPA, SOC 2, ...) Key Characteristics and Attitudes In a recent global survey these attributes were valued by Jumios in all locations and functions - we firmly believe in hiring for attitude as well as skill. Friendly and supportive Adaptable and flexible Articulate and persuasive High IQ and EQ Curious and coachable Commercially Aware Resilient and tenacious Big picture and the detail @Work: This role is based out of our Bangalore office at Prestige Tech Park III. You ll be part of a dynamic, collaborative engineering team focused on innovation and technical excellence. Expect to work with passionate peers, modern tools, and a mission that matters Jumio Values: IDEAL: Integrity, Diversity, Empowerment, Accountability, Leading Innovation Equal Opportunities : Jumio is a collaboration of people with different ideas, strengths, interests and cultures. We welcome applications and colleagues from all backgrounds and of all statuses. About Jumio: Jumio is a B2B technology company dedicated to eradicating online identity fraud, money laundering and other financial crimes to help make the internet safer. We leverage AI, biometrics, machine learning, liveness detection and automation to create solutions that are trusted by leading brands worldwide and respected by industry thought leaders. Jumio is the leading provider of online identity verification, eKYC and AML solutions. With a global footprint, we re expanding the team to meet strong client demand across a range of industries including Financial Services, Travel, Sharing Economy, Fintech, Gaming, and others. Applicant Data Privacy We will only use your personal information in connection with Jumio s application, recruitment, and hiring processes, as described in Jumio s Applicant Privacy Notice. If you have any questions or comments, please send an email to privacy@jumio.com .

We are seeking a highly skilled and experienced Sr. DevSecOps engineer to join our fast-paced and security-focused team. The ideal candidate will have extensive expertise in GitHub, GitHub Actions, Terraform, AWS, CI/CD processes, TypeScript, and testing frameworks. This role requires someone who can take ownership of projects and drive them to completion with minimal oversight. The successful candidate will thrive in a fast-paced environment, demonstrating excellent problem-solving skills, strong attention to detail, and a focus on maintaining secure systems. Key Responsibilities: Project Ownership: Deliver projects to completion. Ensure successful execution of tasks and regular deployments to production. CI/CD Strategy: Implement, and manage robust CI/CD pipelines using GitHub Actions and Terraform to automate code testing, building, and deployment processes. AWS Infrastructure: Maintain cloud infrastructure using AWS services such as ECS, ECR, EKS, Cognito, VPC Transit Gateway, and Route53. Ensure best practices in infrastructure-as-code and cloud security. Terraform Expertise: Utilize Terraform to define and provision AWS resources, ensuring high scalability, availability, and security of cloud environments. Automation & Optimization: Automate system configurations, software deployments, and infrastructure scaling to optimize workflows and system performance. Dockerization: Assist software engineers in containerizing their applications using Docker and preparing them to run efficiently on AWS ECS Fargate and EKS Fargate. TypeScript/JavaScript Support: Work closely with software engineers to support the development of secure, scalable application services using TypeScript and JavaScript frameworks such as NestJS and Next.js. Test Writing: Guide and assist software engineers and QA team members in writing effective tests using the Jest framework to ensure the reliability and robustness of their applications. Security & Compliance: Implement DevSecOps best practices, ensuring that all deployments meet the highest security standards. Familiarity with compliance frameworks (e.g., NEST CSF, HIPAA/HITRUST, SOC 2) is a plus. Monitoring & Troubleshooting: Set up monitoring and alerting for infrastructure and services, proactively addressing performance bottlenecks and security vulnerabilities within software applications and infrastructure. Collaboration & Communication : Work closely with developers, QA teams, and other stakeholders to ensure smooth, reliable daily deployments to production and fast iterations. Documentation: Document processes, configurations, and project outcomes to ensure clarity and transparency in all aspects of the DevSecOps lifecycle. Qualifications: 6+ years of DevOps/DevSecOps experience, with a focus on security, automation, and cloud infrastructure. Expertise in Terraform for provisioning cloud resources and infrastructure automation. Expertise with Docker and container orchestration (ECS/EKS). Expertise experience with AWS services, including ECS, ECR, EKS, Cognito, Lambda, S3, VPC Transit Gateway, and Route53. Proficiency in Docker, with experience containerizing applications and deploying them on AWS ECS Fargate and EKS Fargate. Proficiency in GitHub and GitHub Actions, including managing repositories, creating workflows, and automating deployment pipelines. Proficiency in TypeScript/JavaScript, including experience with frameworks like NestJS and Next.js. Solid understanding of CI/CD processes and ability to architect scalable, efficient pipelines. Experience with networking and security in AWS (e.g., VPC, IAM, Security Groups). Ability to work independently and manage complex tasks in a fast-paced environment with minimal oversight. Strong problem-solving skills with a focus on security, automation, and efficiency. Excellent written and verbal communication skills. Nice to Have: Familiarity with compliance frameworks such as NEST CSF, HIPAA, SOC 2, or similar. Experience working in highly secure, regulated environments. About Us: TechAhead is a global digital transformation company with a strong presence in the USA and India. We specialize in AI-first product design thinking and bespoke development solutions . With over 15 years of proven expertise, we have partnered with Fortune 500 companies and leading global brands to drive digital innovation and deliver excellence. At TechAhead, we are committed to continuous learning, growth and crafting tailored solutions that meet the unique needs of our clients. Join us to shape the future of digital innovation worldwide and drive impactful results with cutting-edge AI tools and strategies!

New requirement - JD for Cybersecurity risk manager: Key responsibilities As a Cyber Risk compliance Professional in our Group CISO office, you will be occupied in the following domains: a) Risk management b) Compliance. This role is responsible for planning, managing and coordinating various cybersecurity risk management activities focused on identifying, assessing, and mitigating risks for the enterprise from a business perspective. Skill requirement: Degree, or equivalent, in Information Security or Cyber Security or Computer science or similar course Self-motivation to continuously develop in the areas of cybersecurity Ability to prioritize and complete multiple complex projects under tight deadlines Ability to translate security issues into business risks Excellent interpersonal skills and ability to work effectively within a team at all hierarchical levels Willingness to research client inquiries and emerging issues, including regulations, industry practices, and new technologies Experience, knowledge and strong interest in information and cyber security domains are essential for this role Experience Cyber / technology risk assessments management methodologies Hands on with assessment report preparation and presenting to senior technical and business stakeholders Articulative and confident in presentation to senior stakeholders Knowledge of use of and risks related to modern and emerging technologies Cybersecurity audit Advanced knowledge and understanding of ITGC, NIST 800-53, NIST CSF controls and Risk management frameworks Expertise in complex business processes and technological risks Deep understanding of security technologies including firewalls, proxies, SIEM, XDR, CSPM, IGA, PAM, Data protection Experience: 8 12 years.

Title: Security Analyst (SOC & EDR) Location: Gurgaon, India Type: Hybrid (work from office) Job Description Who We Are: Fareportal is a travel technology company powering a next-generation travel concierge service. Utilizing its innovative technology and company owned and operated global contact centers, Fareportal has built strong industry partnerships providing customers access to over 600 airlines, a million lodgings, and hundreds of car rental companies around the globe. With a portfolio of consumer travel brands including CheapOair and OneTravel, Fareportal enables consumers to book-online, on mobile apps for iOS and Android, by phone, or live chat. Fareportal provides its airline partners with access to a broad customer base that books high-yielding international travel and add-on ancillaries. Fareportal is one of the leading sellers of airline tickets in the United States. We are a progressive company that leverages technology and expertise to deliver optimal solutions for our suppliers, customers, and partners. FAREPORTAL HIGHLIGHTS: Fareportal is the number 1 privately held online travel company in flight volume. Fareportal partners with over 600 airlines, 1 million lodgings, and hundreds of car rental companies worldwide. 2019 annual sales exceeded $5 billion. Fareportal sees over 150 million unique visitors annually to our desktop and mobile sites. Fareportal, with its global workforce of over 2,600 employees, is strategically positioned with 9 offices in 6 countries and headquartered in New York City. Job Overview We are seeking a proactive and knowledgeable Security Analyst to join our Information Security Operations (SecOps) team . This role will focus on SOC monitoring and Endpoint Detection and Response (EDR) using SentinelOne . The ideal candidate should have solid experience in threat monitoring, incident response, and SentinelOne tool handling. Key Responsibilities: Monitor and respond to SOC alerts and security incidents in real time. Analyze logs and alerts from SIEM and SentinelOne EDR platforms. Perform incident triage , escalation, and coordination with internal teams. Troubleshoot SentinelOne-related issues , including error resolution, agent communication, and performance problems. Understand and manage SentinelOne policies , ensure proper deployment, and make necessary adjustments for better coverage. Quickly identify the root cause of issues related to endpoint protection and take corrective actions. Coordinate with the IT team for issue resolution and endpoint remediation. Collaborate with teams to reduce false positives and improve alert accuracy. Maintain incident documentation , reports, and operational dashboards. Support in threat hunting , vulnerability detection, and other BAU (Business As Usual) security tasks. Required Skills & Qualification: Bachelors/Masters Degree in Computer Science, Information Systems, Engineering. 24 years of experience in SOC operations and endpoint security monitoring. Hands-on experience with SentinelOne EDR , including troubleshooting and policy management. Good knowledge of cybersecurity threats, incident response processes, and log analysis. Ability to investigate and resolve SentinelOne alerts and agent-related errors effectively. Experience working with SIEM tools (like Splunk, Qradar, etc.). Strong understanding of false positive tuning and threat detection improvement. Basic scripting knowledge (PowerShell, Python) is a plus. Good communication and analytical skills. Preferred Skills & Qualifications: CEH , CompTIA Security+ , or any other relevant security certification. Disclaimer This job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee. Fareportal reserves the right to change the job duties, responsibilities, expectations or requirements posted here at any time at the Companys sole discretion, with or without notice.

VERIFICATION LEAD – IP VERIFICATION SmartSoC is looking for a smart and enterprising leader with expert knowledge in IP Verification to come and technically lead a Team. We are looking for someone who is very strong technically and very good at multi-tasking as your role will involve leading 7 to 8 projects at one time. You will be responsible for leading and managing a team, client communication, and project execution. This role will include- Lead an internal IP Verification team, executing projects for an offshore client Be responsible for Test Planning, Environment Architecture and Project Management of Multiple Projects Guide team members in verifying IP’s and delivering zero bug IP’s Manage the team and their technical and leadership growth Manage all interactions with the client Desired Skills and Experience- 8 – 12 years experience in Design Verification Expert Knowledge in IP Verification Very strong knowledge in multiple protocols is highly desired, AMBA protocols and at least one high speed interface Must have expert knowledge in coverage driven test planning Must have expert knowledge in architecting configurable environments Must have very strong System Verilog and UVM background Must be able to lead the team technically in all aspects, must be able to drive multiple projects Past experience leading and managing teams highly desired Excellent Communication and Presentation Skills Ability and desire to learn new methodologies, languages, protocols etc. is required Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

SENIOR VERIFICATION ENGINEER – SV UVM SmartSoC is looking for smart and enterprisingDesign Verification engineers to come to join us and get an opportunity to do some cutting-edge work and also work in a great environment where work is Always Fun and Exciting. SmartSoCs is currently working on multiple in-house turnkey projects and client site projects and many of our projects involve complete verification from spec to closure including building complete DV environments in SV-UVM. Job Responsibilities- Build SV, SV UVM, OVM based environments. Work with many different networking and other protocols Desired Skills and Experience- 3 to 10 years of experience in IP verification Good experience in SV/ UVM based verification project. Good debug skills is a must. Experience in building components like Scoreboard, functional coverage & writing sequences using SV/UVM based Verification environment One of the following experiences is important: Experience in Video/Display domain in particular DP, oLDI, MIPI CSI/ DSI Experience in any one high speed protocol like USB3, PCIe, MIPI, Unipro etc Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia Singapore SwedenStockholm USADelaware Location - Bengaluru,Chennai,Hyderabad,Noida

Pre-Silicon Validation Engineer Experience4 to 10 Years QualificationB.E / B. Tech / M.E / M. Tech Essential Duties & Responsibilities: Creating test environments, checker strategies, and test generators for validating embedded power management firmware in the SOC Communicating effectively, coordinating and working with firmware developers and SOC integration teams Potentially participating in the debug of failures in silicon and developing new testing strategies to detect these failures on pre-silicon models Mentoring junior members of the team in their development You should have 3-5 years of experience in the following areas: SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM Reading and interpreting technical specs and Register Transfer Level (RTL) code SW development skills (Unit Testing, Test Driven Development) Hands-on Debug Preferred Skills and Experience: Expertise in any of one domain like Audio, Performance, power management will be a huge plus 4+ years’ experience with writing validation plans and implement those validation plans Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

As a Customer Success Manager - Azure & Security, The incumbent will be the key point of contact for customers adopting Microsoft Azure and Cybersecurity solutions. The mission is to drive customer success by ensuring secure and effective adoption of TTBS offered services, managing customer relationships, and supporting long-term strategic cloud and security goals. Its an Individual Contributor role. Key Role Deliverables Act as a trusted advisor for customers implementing Azure infrastructure, services, and security frameworks. Lead onboarding, training, and enablement for customers transitioning to Azure and Microsoft Security solutions (e.g., Defender, Sentinel, Entra). Monitor customer health, usage, and satisfaction to proactively address risks and promote solution value. Drive adoption of Azure-native security tools and best practices to strengthen cloud environments. Collaborate with technical delivery, cloud architecture, and support teams to ensure customer success and alignment. Conduct regular Executive Business Reviews (EBRs) and strategic planning sessions with key stakeholders. Maintain a deep understanding of Microsoft Azure & Security roadmap to guide clients on optimization and innovation. Identify expansion and upsell opportunities in areas like Azure cost optimization, compliance, Zero Trust architecture, etc. Right Person (Qualification & Experience) B. Tech (Computer Science, Electronics etc.) Minimum 6 years of experience in Customer Success, Technical Account Management, or Cloud Consulting with a focus on Azure and/or cybersecurity. Strong knowledge of Microsoft Azure, including core services (IaaS, PaaS), networking, identity, and security features. Familiarity with Security solutions: Defender for Cloud, SIEM, SOAR, VAPT, SOC, Purview, etc. Experience with compliance frameworks (e.g., NIST, ISO 27001, GDPR) and security best practices in the cloud. Ability to manage technical conversations with C-level stakeholders and IT teams. Strong project management, communication, and interpersonal skills. Certifications preferred: Microsoft Certified: Azure Solutions Architect Expert Microsoft Certified: Security, Compliance, and Identity Fundamentals Microsoft Certified: Azure Security Engineer Associate

SR. DFT ENGINEER SmartSoC is looking for expert DFT engineers for the development, support, maintenance, Implementation, and Testing of complex components of an ASIC/SOC/FPGA/Board. Desired Skills and Experience- 3 – 10year’s experience in DFT Good experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan. DFT logic integration and verification. Experience in debugging low coverage and DRC fixes Gate Level ATPG simulation with and without timing. Pattern generation, verification, and delivery to ATE team. Post silicon debug and support on failing patterns. Good experience with tools from Mentor/Synopsis/Cadence. LBIST experience is plus. DFT mode STA and timing closure support. Familiarity with Verilog and RTL simulation Job Category VLSI (Silicon engineering) Job Location FinlandOulu IndiaBangalore IndiaChennai IndiaHyderabad IndiaNoida Malaysia S. KoreaSeoul Singapore SwedenStockholm USADelaware USATexas Location - Bengaluru,Chennai,Hyderabad,Noida

ZS is a place where passion changes lives. As a management consulting and technology firm focused on improving life and how we live it , our most valuable asset is our people. Here you’ll work side-by-side with a powerful collective of thinkers and experts shaping life-changing solutions for patients, caregivers and consumers, worldwide. ZSers drive impact by bringing a client first mentality to each and every engagement. We partner collaboratively with our clients to develop custom solutions and technology products that create value and deliver company results across critical areas of their business. Bring your curiosity for learning; bold ideas; courage an d passion to drive life-changing impact to ZS. Our most valuable asset is our people . At ZS we honor the visible and invisible elements of our identities, personal experiences and belief systems—the ones that comprise us as individuals, shape who we are and make us unique. We believe your personal interests, identities, and desire to learn are part of your success here. Learn more about our diversity, equity, and inclusion efforts and the networks ZS supports to assist our ZSers in cultivating community spaces, obtaining the resources they need to thrive, and sharing the messages they are passionate about. Senior Technical Writer – Associate Consultant Role Information Security Technical writer team seeks an experienced Senior Technical Writer to drive, create and update IT related documentation. This may include developing new policies and standard operating procedures (SOPs) to comply with industry standards and frameworks, contractual obligations, or local law, updating and maintaining existing procedures, liaising with appropriate personnel to ensure that compliance workflow management systems are configured in accordance with documented procedures, managing the policy lifecycle end to end. This position will work closely with subject matter experts such as software development teams, Enterprise IT, HR, and Legal team leads and stakeholders. What you'll do Connect with subject matter experts and proactively manage your own learning to become familiar with our technology offerings, internal controls landscape, and internal compliance processes. Work with compliance and audit team members and other subject matter experts and functional leads to implement timely and effective edits until documentation is ready for publication on time. Suggest improvements to documentation and processes whenever possible, eventually demonstrating ownership of the technical writing function. Adhere to design template and company style guide while organizing and writing documentation. Assist with development and maintenance of applicable training and educational material (e.g., byte sized informational modules to educate end users on appropriate use of documented policies) Develop and propose documentation plans and outlines for new procedures, user/training guides and supporting materials; estimating project length and keeping everyone involved on time. Enhance and maintain existing documentation to deadline. Proactively manage the policy lifecycle (development, periodic review and approval, version control, publishing of approved policies and procedures to the company intranet). Work with appropriate personnel to make sure that ZS’s compliance workflow management systems are always in sync (configured) with newly documented or updated policies. Perform additional duties as required from time to time. What you'll bring BS/BA in English, Journalism, Communications, Technical Writing, Computer Science, or other relevant field of study required. 3.5 - 5 years’ technical writing experience, preferably documenting IT policies and procedures. Experience with Visio or other process flow visualization tool, Snagit tool required. Superior writing, editing, and communication skills required. Excellent command over the English language (especially grammar and sentence composition skills) required. Strong experience using Microsoft Suite (Word, Excel, PowerPoint, OneNote, Outlook etc.). Experience with authoring tools (e.g., MadCap Flare or any other authoring tool) will be an added advantage. Familiarity/working knowledge of various compliance frameworks (e.g., ISO 27001, ISO 22301, ISO 27702, HITRUST, PCI – DSS, SOC Audits) preferred. Experience learning about and communicating complex topics. Outstanding organizational/time management, planning and prioritization skills . Perks & Benefits ZS offers a comprehensive total rewards package including health and well-being, financial planning, annual leave, personal growth and professional development. Our robust skills development programs, multiple career progression options and internal mobility paths and collaborative culture empowers you to thrive as an individual and global team member. We are committed to giving our employees a flexible and connected way of working. A flexible and connected ZS allows us to combine work from home and on-site presence at clients/ZS offices for the majority of our week. The magic of ZS culture and innovation thrives in both planned and spontaneous face-to-face connections. Travel Travel is a requirement at ZS for client facing ZSers; business needs of your project and client are the priority. While some projects may be local, all client-facing ZSers should be prepared to travel as needed. Travel provides opportunities to strengthen client relationships, gain diverse experiences, and enhance professional growth by working in different environments and cultures. Considering applying At ZS, we're building a diverse and inclusive company where people bring their passions to inspire life-changing impact and deliver better outcomes for all. We are most interested in finding the best candidate for the job and recognize the value that candidates with all backgrounds, including non-traditional ones, bring. If you are interested in joining us, we encourage you to apply even if you don't meet 100% of the requirements listed above. ZS is an equal opportunity employer and is committed to providing equal employment and advancement opportunities without regard to any class protected by applicable law. To Complete Your Application Candidates must possess or be able to obtain work authorization for their intended country of employment.An on-line application, including a full set of transcripts (official or unofficial), is required to be considered. NO AGENCY CALLS, PLEASE. Find Out More At www.zs.com

Daily assessment of vulnerabilities identified by infrastructure scan Evaluate rate and perform risk assessments on assets Prioritizing vulnerabilities discovered along with remediation timeline s Work with associated teams to explain vulnerabilities and remediation steps as required Maintain knowledge of the threat landscape Create reports and provide analysis on vulnerabilities for technical teams and leadership Skill Required Knowledge of application network and operating system security Experience with vulnerability and patch assessment Linux and windows experience Good understanding of Windows and Linux patching Knowledge of vulnerability scoring systems CVSS CMSS Experience on vulnerability scanning tools Excellent writing and presentation skills are required in order to communicate findings and status Primary Skills VMDR Policy Compliance Qualys Tenable Nessus Rapid7 Secondary Skills Excellent writing and presentation skills are required in order to communicate findings and statusCleary communicate priorities and escalation points procedures to other team members Detail oriented organized methodical follow up skills with an analytical thought process Experience performing dynamic scans static scans and penetration testing Development experienceProject management experience Innovative and efficiency focused Track trends and configure systems as required to reduce false positives from true events

- Lead the architecture, design and development of Power Management for a highly virtualized, multi-threaded, many-core and multi-socket SMP (symmetric multi-processor) . - Develop the features, present the proposed architecture in the High level design discussions to hardware and software teams - Develop micro-architecture, Design RTL, Collaborate with the Verification, DFT, Physical design, firmware, software teams to develop the feature - Signoff the Pre-silicon Design that meets all the functional, area and timing goals - Participate in silicon bring-up and validation of the hardware - Estimate the overall effort to develop the feature - Estimate the silicon area required for the feature Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8 or more years of demonstrated experience in architecting and designing Server SoC power management features. * Experience with hardware to model correlation * At least 1 generation of silicon bring up experience * In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) * Proficiency of RTL design with Verilog or VHDL * Knowledge of at least one object oriented or functional programming language and scripting language. Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

Understand the design specification , PowerOn Specification, and Power management specification. Understand boot firmware and reset flow. And/or Power management flow. Develop skills in IBM BIST verification tools and apply them successfully Develop the verification environment and test bench Debug fails using waveform, trace tools and debug RTL code Work with Design team in resolving/debugging logic design issues and responsible for deliveries Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 3-8 years of experience in Design Verification - demonstrated execution experience of verification of logic blocks Strong in SoC verification Chip reset sequence and initialization, and/or Power management. Knowledge of verification (any) methodology, Knowledge of HDLs (Verilog, VHDL) Good programming skills in C/C++, Python/Perl Exposure in developing testbench environment, write complex test scenario, debugging and triaging fails Hardware debug skills backed by relevant experience on projects Exposure in developing testbench environment, write complex test scenarios Good communication skills and be able to work effectively in a global team environment Drive verification coverage closure Preferred technical and professional experience Knowledge of Chip-Initialisation , SCAN , BIST is a plus Scripting Expertise backed up relevant experience in the same Writing Verification test plans Functional and code coverage analysis and debug

Provide L3 support for applications written in GoLang, ensuring high availability and reliability. Analyze application behavior, parse system/application logs, and troubleshoot issues to identify and resolve root causes. Collaborate with development teams to resolve bugs and implement fixes or workarounds where needed. Enhance support scripts to automate and streamline log analysis and issue detection. Maintain knowledge base articles and documentation for known issues, fixes, and standard operating procedures. Support deployment and release activities, ensuring smooth transition of code to production environments. Engage with stakeholders to gather issue details, communicate resolutions, and set proper expectations. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise Strong hands-on experience in GoLang, particularly in understanding and debugging Go applications. Solid understanding of log structures, log parsing, and log management tools. Strong debugging and problem-solving abilities in complex environments. Familiarity with microservices, REST APIs Ability to work in a fast-paced environment and handle critical production issues with urgency. Excellent communication and collaboration skills

1. Lead High Performance ARM Core Hardening Job Title: Lead Engineer ARM Core Hardening Location: BLR/Hyd Experience: 812 years Technology Node: 5nm/3nm/2nm FinFET/GAA Reports To: Director/Technical Manager SoC Implementation Key Responsibilities: Lead end-to-end RTL-to-GDSII hardening of ARM Cortex-A/X/Neoverse cores (single and multi-cluster). Collaborate with RTL, CAD, DFT, low power, and architecture teams to define floorplan and implementation strategy. Own full flow: floorplanning, power planning (UPF-based), placement, CTS, routing, ECO, timing closure, physical verification, and signoff. Drive design quality metrics: PPA (Performance, Power, Area), DRC/LVS clean, IR drop, EM, and thermal-aware optimization. Architect physical implementation methodology tailored to ARM hardening: hierarchical flow, black-boxing strategy, physical partitioning, clocking architecture. Interface with foundry and EDA vendors for process tech enablement and tool issues. Technical Skills: Deep understanding of ARM core microarchitecture (pipeline, fetch/decode, FPU/NEON, L1/L2 cache). Expert in Synopsys/Cadence tools: ICC2/Fusion Compiler, Tempus/Innovus, Primetime, StarRC, RedHawk/Totem. Advanced clock tree design: CCOpt, custom H-trees, mesh, and multi-source CTS. Experience with UPF-based low power flows and Conformal Low Power (CLP) verification. Familiarity with physical-aware DFT and scan compression (test-mode aware synthesis/placement). Familiar with physical architecture trade-offs (voltage islands, power domains, channel management). Knowledge of EMIR, thermal, aging-aware closure in HPC-class cores. Experience taping out at 5nm or lower is mandatory. --- 2. Engineer ARM Core Hardening Job Title: Physical Design Engineer ARM Core Hardening Location: BLR/Hyd Experience: 38 years Technology Node: 5nm/3nm/2nm FinFET/GAA Key Responsibilities: Implement physical design of ARM core and subsystems from RTL to GDSII. Responsible for floorplanning, placement, CTS, routing, timing and physical closure of core logic. Perform static timing analysis, IR/EM validation, and physical verification. Optimize for frequency, leakage, and area within power and thermal budgets. Support integration of hardened cores into SoC top-level environment. Technical Skills: Good understanding of ARM core architecture and pipeline structure. Experience in Synopsys or Cadence PnR and signoff tools (ICC2, Fusion Compiler, Innovus, PT, RedHawk). Experience in UPF flows, CPF/UPF constraints, and low-power verification tools. Good in timing ECOs, DFT integration, scan reordering and hold fixing in low power designs. Strong debugging skills: congestion, IR drop, setup/hold, crosstalk, antenna, and DRC. Familiar with scripting (TCL, Python, Perl) to automate flows and reports. Work Experience Lead High Performance ARM Core Hardening Experience working with ARM POP (Processor Optimization Pack) or ARM Artisan Physical IP. Worked with multi-core cluster hardening and coherent interconnects (e. g. , CMN-600). Experience with RTL-based performance modeling and correlation with implementation ARM Core Engineer: ARM POP usage experience. Previous tapeout at \u22647nm. Exposure to hierarchical and multi-voltage designs. Familiarity with advanced floorplanning constraints for multi-core clusters.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Description / Summary Join our elite North America hardware application engineering team, and work closely with the best AEs, PEs and RD in EDA industry. Join a top class company that has been listed in Fortune magazine and Great Place to Work as one of the Worlds Best Workplaces for the eleven years in a row! You will report directly into the North America Verification Field Applications Engineering (FAE) Team, and be co-located in India alongside our RD teams. You will be a leading product expert on advanced virtual interface solutions such as Accelerated Verification IP s and Virtual Bridges solutions for Cadence s hardware emulation and prototyping platforms. Your focus will be to work on key campaigns in North America, driving differentiated HW emulation solutions at our industry leading semiconductor and system companies and you will form a key bridge between our customers, North America AEs and RD teams. Key Responsibilities Assume technical leadership for all virtual interface solutions for Palladium and Protium and become the go-to expert for the rest of the North America field AE team . Provide in-depth technical assistance in collaboration with RD to help support advanced emulation flows to secure design wins . Champion the customer needs and work closely with RD in India to develop competitive and creative technical solutions. Requirements Strong experience in hardware emulation with knowledge of interface protocols like PCIe , AMBA and Ethernet Experience in synthesizable coding style Knowledge of fundamental SoC Architectures Experience with SystemVerilog, VHDL, Verilog, C/C++/SystemC Ability to quickly analyze emulation environments and design complexity. Strong verbal and written communication skills, with the ability to effectively bridge communication channels between external customers, NA FAE team and internal RD teams. Strong teamwork skills 8+ years industry experience We re doing work that matters. Help us solve what others can t.

NVIDIA is seeking passionate, highly motivated, and creative senior design engineers to be part of a team working on the design of state of the art memory sub-system components used in their industry-leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. At NVIDIA, our employees are passionate about parallel and visual computing. Were united in our quest to transform the way graphics are used to solve some of the most complex problems in computer science. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is seeking Senior Platform Solutions Engineer for system level bringup, debug and validation of GPU and SoC product platforms. The sophisticated nature of various chip features poses many exciting debugging situations. Someone with solid understanding and innovative thinking is required for on time release of the products. As part of the Silicon Solutions Team, we are responsible for productizing NVIDIAs chips into groundbreaking consumer, professional, server, mobile, and automotive solutions. What you will be doing: Silicon and board bring up, validation, and debug from prototype to production. Responsible for the GPU and SoC system qualification including feature checks, system stress at PVT conditions, enablement and debug of product platforms at module or tray level. Communicate with team members contributing to PCB design, PCB architecture, system architecture, PCB Layout, Mechanical, Thermal, Chip Arch and product management for effective platform validation Debug complex ASIC and PCB issues related to logic design, signal integrity and power delivery in a high energy work environment, with a team that is the best in the business! Understand architecture of next generation chips and platforms, develop test plans, scripts and implement. Understand various HW features related to system power, performance and thermal. Develop new methodologies to improve the silicon validation process and take it to the next level! What we need to see: BTech/BE or MTech/ME degree in Electronics with 5+ years of work experience. Good knowledge in board and system design considerations, experience in silicon design/bring up. Platform design experience with exposure to datacenter hardware architecture and product development Strong understanding of system components like CPU, GPU, Networking, BMC and other connected peripherals Understanding of x86, ARM and GPU system architecture for server design Very good problem solving and debugging skills. Must be a standout colleague and ready to work with global teams from diverse cultural backgrounds. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation. #LI-Hybrid

Role: Embedded Developer 3+ years of work experience Client/ Domain: Semiconductor Manufacturing Work Location (client): Hitechcity , Hyderabad Work Hours: Normal Working Hours. Work Mode: Work From Office Mode of Interview: Virtual (Microsoft Teams) Project : You get work on portfolio of products of Hardware-software integration platform development team for device driver for Audio SOC. Technical Skills Excellent programming skill in C / C++ Excellent knowledge of Linux Kernel & device drivers - mandatory Experience with Linux audio stack and ALSA SOC(ASOC) Team player, with excellent verbal & written communication skills

JD- SOC lead/Manager Manage and mentor a team of SOC analysts and engineers. must have good understanding on EDR,XDR tools. Develop training programs and provide ongoing support to enhance team skills and performance. Coordinate shift schedules to ensure 24/7 SOC coverage. Oversee the identication, assessment, and response to security incidents. Ensure timely and eective resolution of security incidents and escalation when necessary. Conduct post-incident reviews and coordinate with other departments to address root causes and improve security posture. Supervise the monitoring of security alerts, events, and logs from various sources including SIEM, IDS/IPS, and other security tools. Ensure the SOC team eectively analyses and correlates security data to detect potential threats. Optimize and tune SOC tools and processes to improve detection capabilities and response times. Develop and maintain SOC policies, procedures, and best practices. Ensure compliance with organizational security policies and relevant regulatory requirements. Update and rene incident response plans and playbooks. Prepare and deliver regular reports on SOC performance, incident trends, and threat landscape to senior management. Communicate eectively with internal stakeholders and external partners as needed. Coordinate with other teams to ensure alignment and integration of security initiatives. Stay current with industry trends, emerging threats, and new technologies. Implement continuous improvement processes to enhance SOC eiciency and eectiveness. Evaluate and recommend new tools and technologies to enhance the SOCs capabilities.

Prior experience in IT Audit (ITGC/GITC/SOC report, testing) from a client-facing ROLE Having experience in leading a small team or managing a portfolio. Ensure compliance with engagement plans and internal quality & risk management procedures. Required Candidate profile Must have experience in ITGC & SOC & IT Audit. Interested candidates can share their updated CV on sakshi@yeslandmark.com

Come, be a part of a growing team where you can make an impact! If tackling problems and designing disruptive solutions is your passion, we have the platform for you. Encouraging leadership and supportive mentors will give wings to your ideas. Join us and grow with us! Jobs SOC & ISO 27001 Compliance Specialist Role Remote 29th May 2025 Somnetics is looking for a SOC & ISO 27001 Compliance Specialist for Information Security / Compliance Department. The individual will report to Information Security Manager / Compliance Manager. Key Responsibilities : Compliance Management: Implement and maintain SOC 2 & ISO 27001 controls. Manage internal/external audits and remediation. Policy & Procedure Oversight: Develop and update security policies. Promote compliance awareness across teams. Risk Management: Conduct risk assessments and treatment planning. Monitor and report security risks and gaps. Collaboration & Training: Coordinate with IT, legal, HR for compliance efforts. Train staff on security and compliance practices. Continuous Improvement: Enhance security processes and controls. Stay updated on industry trends and regulations. Requirements: : Education & Experience: Bachelor s in InfoSec, CS, or related field. 3 5 years in compliance/information security. Hands-on with SOC 2 & ISO 27001 audits. Preferred Certifications: ISO 27001 Lead Implementer/Auditor CISA / CISM / CISSP Skills: Strong in SOC 2, ISO 27001, and risk management. Excellent documentation & communication skills. Familiarity with GRC and audit tools. Key Competencies: : Analytical Thinking Attention to Detail Problem Solving Project Management