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7.0 - 9.0 years

7 - 15 Lacs

Hyderabad

Hybrid

Naukri logo

Role & responsibilities Role : Azure Sentinel Experience : 7 to 9 Years Location : Hyderabad Notice Period: Immediate to 15 Days Job Description We are looking for an experienced SOC Engineer (L2/L3) with hands-on expertise in Microsoft Azure Sentinel. The ideal candidate will be responsible for advanced threat detection, incident response, and evaluating AI-generated security analysis outputs. Key Responsibilities: Perform exploratory, simple, and complex data analysis for the alerts on sentinel (e.g., anomaly detection, clustering). Create and review visualizations such as timelines and activity graphs. Generate and validate reports with insights, recommendations, and next steps. Evaluate AI-generated outputs for: Accuracy of insights and structured data. Quality of code and logic. Relevance and real-world applicability. Grade outputs using a predefined rubric and provide feedback. Handle 2030 evaluations per day depending on task complexity.Required Skills: 6-9 years of experience in a SOC environment (L2/L3 level). Strong knowledge of Azure Sentinel and KQL (Kusto Query Language). Experience with threat detection, incident response, and security analytics. Familiarity with data visualization and reporting tools. Ability to assess AI-generated content and provide structured evaluations. Preferred Qualifications:Ai/ML Knowledge and understanding of Python Experience with AI/ML in cybersecurity. Certifications like AZ-500, SC-200, or equivalent

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3.0 - 8.0 years

3 - 8 Lacs

Noida, Uttar Pradesh, India

On-site

Foundit logo

We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting, What Youll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability, Collaborating with cross-functional teams to define and develop SOC architecture and specifications, Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements, Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives, Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies, Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation, Job Description And Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG) At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects Our work spans from sub-blocks to full turnkey end-to-end SoCs Our customers range from start-ups to industry leaders, commercial companies, and government agencies, As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors, Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC, Understand the design/architecture and develop timing constraints for synthesis and timing, Run preliminary synthesis to ensure that the design can be synthesized as intended, Run formality to ensure equivalence of RTL and gates, Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer, Required E/B Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC, Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing, Good conceptual understanding of RTL rule checks, Hands-on experience on synthesis and timing constraints development, Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc ) will be preferred, The Team Youll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success, Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring proces

Posted 3 weeks ago

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