330 Soc Design Jobs - Page 2

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. **Key Responsibilities:** - Full chip design for multi-million gates SoC - Digital design and development (RTL) - Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification - Manage IP dependencies, planning and tracki...

About Madre Janus Madre Janus is the cybersecurity division of Madre Group a Fortinet MSSP partner delivering enterprise-grade managed security services, compliance advisory, and digital resilience architecture across industries. Headquartered in Technopark, Thiruvananthapuram, and expanding its operations in Bengaluru, Madre Janus combines technical excellence with business foresight to secure the digital core of organizations worldwide. As part of our continued growth, we are seeking a Cybersecurity Business Partner a senior professional who can bridge executive-level client relationships with deep technical strategy, driving cybersecurity transformation and managed service adoption. Posit...

We are seeking a highly experienced DFT (Design for Test) Principal MTS to join our AECG SSD ASIC team in Bangalore. The ideal candidate will have a strong technical background and extensive experience in DFT methodologies, particularly in the context of SoC design and development. THE PERSON: You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Lead DFT Strategy and Implementation Develop and execut...

About The Role Your Role As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will collaborate closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners. In this role, you will: Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus) Collaborate with design and architecture teams to define timi...

Role Overview: As an STA Engineer, your primary responsibility will be timing closure and verification of complex ASIC or SoC designs. You will collaborate closely with cross-functional teams, including physical design, logic design, and architecture, to ensure timing requirements are met across various design stages and process corners. Key Responsibilities: - Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages - Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs - Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus) - Collaborate with design and architecture teams to defin...

You will be joining Graphcore, a globally recognized leader in Artificial Intelligence computing systems, as a Senior Technical Program Manager focusing on post-silicon validation and bring-up. Your role will involve bridging the technical and management domains, driving critical programs from preparation through execution of post-silicon validation and bring-up. Collaboration with development managers, engineers, and multi-functional teams will be crucial for the flawless delivery of silicon projects. **Key Responsibilities:** - **Program Leadership and Execution:** - Own the planning, development, and management of project schedules and deliverables - Ensure meticulous management of tasks,...

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiencesfrom AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challengesstriving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Toge...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

Job Overview We are seeking an experienced and highly skilled Senior SOC Design Verification Engineer with a minimum of 5 years of hands-on experience in SOC Design Verification. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System on Chip designs. Job Description Lead and manage SOC Design Verification efforts for complex projects, ensuring the successful execution of verification plans. Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, Ethernet, CXL, MI...

Come join Intel's Design Development Group organization as an SOC Verification engineering focused on Design for Debug (DFD). As a member of the product team, you will work firsthand with multi-function teams/sites, implementing and validating state-of-the-art debug solutions appropriate for new and existing technology in the product. In this role you will be working as part of a pre-silicon validation team for future Intel SoCs or IPs, focusing on debug validation. You will be working with pre-silicon and post -silicon validation teams to improve debug features and tools suites. You will also work closely with post-silicon validation SW teams on debug tool validation and silicon enabling. Y...

General Summary: Experience in Logic design /micro-architecture / RTL coding is a must. Must have hands on experience with SoC design and integration for SoCs. Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ...

Job Details: Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarch...

Job Details: Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verif...

Job Details: Job Description: As an IP Structural/Physical Design Engineer, you will be working alongside Elite IP and SoC design teams to deliver next-generation Xeon products and related IPs for Server markets. We are looking for candidates with experience as physical design engineers as part of the Structural Design Expert Team in the IP organization. You will be fluent in all aspects of IP physical design flow from high-level block design to synthesis, place and route and timing and power convergence to build a design database that is ready for manufacturing. Your responsibilities will include all aspects of RTL2GDSII physical design flow convergence including but not be limited to: Over...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification, GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skil Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or rel...

Lead Design Verification Engineer Location: Bangalore/Ahmedabad/Pune/Hyderabad Experience: 10+ Years Company: Eximietas Design About Eximietas Design Eximietas Design is a leading technology consulting and solutions development firm specializing in VLSI, Cloud Computing, Cyber Security, and AI/ML domains. Our success is anchored in the unparalleled expertise of our engineering leadership team, whose collective experience spans global technology leaders like Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun . With a strong commitment to innovation and excellence, we deliver cutting-edge solutions that empower businesses to thrive in the ever-evolving digital landscape. Job Area Engine...

Location: Hyderabad Experience: 3-7 Years Email to Apply: aman.a@acesoftlabs.com Responsibilities : • Develop SoC-level test plans and analyze coverage • Build verification environments for complex SoCs • Develop directed/random tests in RTL & GLS environments • Review architectural specifications to ensure high quality • Collaborate with customers to understand verification requirements • Debug pre-silicon and post-silicon issues Skills : • B.Tech in Electrical Engineering or related field • 3+ years in SoC/IP verification using SystemVerilog and UVM • Experience writing assertions and coverage analysis • Strong expertise with SoC simulation tools & advanced verification methodologies Prefe...

General Summary: Strong knowledge of digital design and SOC architecture. Good understanding of OOP concepts Experience in HVL such as System Verilog, UVM/OVM & System C Experience in HDL such as Verilog Knowledge of ARM/DSP CPU architecture, High Speed Peripherals like USB2/3, PCIE or Audio/Multimedia Familiarity with Power-aware Verification , GLS, Test vector generation is a plus Exposure to Version managers like Clearcase/perforce Scripting language like Perl, Tcl or Python Analytical and Debugging skills Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work exp...

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

General Summary: Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC. Understanding of Memory controller designs and microprocessors is an added advantage Hands on experience in constraint development and timing closure Work closely with the SoC verification and validation teams for pre/post Silicon debug Hands on experience in Low power SoC design is required Experience in Synthesis / Understanding of timing concepts for ASIC is required. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primet...

As an ASIC/SoC Design Engineer at Qualcomm India Private Limited, you will be responsible for Logic design, micro-architecture, RTL coding, and integration for complex SoCs. Your expertise in Verilog/System-Verilog and knowledge of AMBA protocols such as AXI, AHB, and APB will be crucial. You will collaborate with verification and validation teams, work on low power SoC design, multi-clock designs, and asynchronous interfaces. Your experience with tools like Lint, CDC, Design compiler, and Primetime will be essential for successful ASIC development. Additionally, your understanding of constraint development, timing closure, and synthesis concepts will be beneficial. **Key Responsibilities:**...

We are seeking an experienced System on Chip (SoC) Architect to join our development team. The ideal candidate will be involved in designing, integrating, and optimizing SoC hardware architectures and ensuring seamless software-hardware co-development. You have: Bachelors Degree in Electrical Engineering, Computer Engineering, or a related field (Masters or Ph.D. preferred). Overall,15+ years of experience as a Chip design expert. 8+ years of proven experience in IC design, SoC architecture, or a similar role. Proficiency in hardware description languages: Verilog, VHDL, and System Verilog Expertise in EDA tools for IC design and verification: Mentor Graphics, Cadence, or Synopsys Strong und...

Required Skills Experience in Logic design / RTL coding is a must. Experience is SoC design and integration for complex SoCs is a must. Experience in Verilog/System-Verilog is a must. Experience in Multi Clock designs, Asynchronous interface is a must. Experience in using the tools in ASIC development such as Lint and CDC. Experience in Synthesis / Understanding of timing concepts is a plus. Experience in ECO fixes and formal verification. Should have knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset architecture. Excellent oral and written communications skills. Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.

General Summary: Qualcomm Cloud Team is looking for a Sr. Lead Engineer for Linux device driver for Machine Learning use cases. The development target is Qualcomm high-performance inference accelerator AI 100 and related products. The candidate will help work on developing code for Linux device drivers and help with upstreaming the code so experience with developing Linux Device drivers, Linux user-mode drivers would be beneficial. Familiarity with development of functional simulation of SoC systems included bus subsystems, DMA, PCIe and peripherals, synchronization mechanisms such as semaphores as well as low speed peripherals will be beneficial. Required Skills and Aptitudes Experience wit...

General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence. Skills/Experience 5-10 years with Masters (6 to 10 years with Bachelors) Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with...