SMTS Silicon Design Engineer

15 - 20 years

50 - 60 Lacs

Posted:None| Platform: Naukri logo

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Job Type

Full Time

Job Description

SMTS SILICON DESIGN ENGINEER

THE ROLE:

As a member of the Networking Technology Solutions Group, you will help bring to life cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.
This exciting position as SMTS will provide the opportunity to demonstrate strong technical leadership across the design hierarchy from architecture to productization. Join us in providing innovative IP solutions as we embark on our journey into delivering the leading-edge IP Solutions for data center networking solutions

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

KEY RESPONSIBILITIES:

  • Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams
  • Work cross functionally with IP/Domain architects to identify and assess complex technical issues/risks and develop architectural solutions to achieve product requirements
  • Work on high quality design deliverables with design qualifications like lint, CDC, synthesis and hand-off documentation
  • Knowledge sharing and other contributions to Platform & System Architecture
  • As an overall product owner, responsible for architecture analysis and technical solutions for marketing/feature change requests
  • Work closely with Design teams for Area and Floorplan refinement, Verification Test plan reviews, Timing targets, Emulation plans, Pre-Si bug resolution and Performance/Power Verification sign offs
  • Support Post-Si teams for Product Performance, Power and functional issues debug/resolution

PREFERRED EXPERIENCE:

  • A minimum of 15 years of experience is required
  • Proven experience in Silicon IP development process and design methodologies
  • Experience with Verilog RTL design, simulation, linting, CDC and other design qualifications, scripting etc..
  • Detailed understanding and proven track record of developing leading edge networking IP solutions such as Ethernet and industry standard security protocols
  • Detailed knowledge of PCIe is a plus
  • Excellent communication, management, and presentation skills
  • Experience analyzing Networking or System-level Micro-Architectural features to identify performance bottlenecks within different workloads
  • Adept at collaboration among top-thinkers and senior architects with strong interpersonal skills to work across teams in different geographies

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • #LI-SR5

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