We're Hiring: Sales Executive (Male) Are you a dynamic individual eager to kickstart your sales career? We're looking for a Sales Executive to join our growing team! If you're fluent in Tamil, English, and Hindi, and ready to dive into an exciting role with immense growth potential, we want to hear from you! What You'll Do: * Help us build our business from the ground up by connecting with manufacturers and vendors. * Gain hands-on experience in sales, vendor interaction, and business operations. What We Offer: * Salary: Starting from ₹15,000/month (based on skills and experience). * Incentives: ₹500/month for mobile recharge, health insurance, and a 10% performance bonus if we hit our profit targets! * Growth: Immense professional and personal development in a dynamic startup environment. * Travel: Occasional travel to manufacturer/vendor locations (expenses covered). This is a temporary requirement during our system setup phase. Who We're Looking For: * Fluent in Tamil, English, and Hindi * 0-1 year of experience (freshers are welcome and encouraged to apply!). * A personal laptop will be an advantage. * Someone passionate, driven, and ready to learn and grow with us! Job Types: Full-time, Permanent, Fresher Pay: From ₹8,089.76 per month Benefits: Cell phone reimbursement Flexible schedule Health insurance Expected Start Date: 28/08/2025
We are hiring enthusiastic and passionate Physical Design (PD) Engineers– Freshers who aspire to build their career in the semiconductor/VLSI industry. Selected candidates will undergo intensive hands-on training in Physical Design flow using industry-standard tools and methodologies. Roles & Responsibilities Participate in training on Physical Design flow (Floorplanning, Placement, CTS, Routing, Timing Closure, DRC/LVS). Work on live projects under the guidance of senior engineers. Gain expertise in tools like Cadence Innovus, Synopsys ICC2, and PrimeTime. Collaborate with the team to deliver block-level and chip-level layouts. Perform STA, IR drop, EM, and physical verification checks. Document and present progress reports during training and project phases. Eligibility Criteria: B. Tech/M. Tech in ECE, EEE, or related streams. Passed out in B. Tech 2021, 2022, 2023, or 2024. Strong fundamentals in Digital Electronics, CMOS, and VLSI Design. Passionate about starting a career in Physical Design. Good analytical and problem-solving skills. Excellent communication and team collaboration abilities. What We Offer: Structured training by industry experts. Opportunity to work on real-time projects with Tier-1 clients. Career progression path with performance-based growth. Mentorship, certification, and hands-on experience with industry tools. Selection Process: 1. Offline written Test 2. Technical Interview 3. HR Discussion How to Apply: Send your updated resume to pd.freshers@siliconus.com with the subject line: "Application for Physical Design Fresher– " Job Type: Full-time Pay: ₹300,000.00 - ₹350,000.00 per year Benefits: Health insurance Leave encashment Paid sick time Provident Fund Ability to commute/relocate: Panathur, Bengaluru, Karnataka: Reliably commute or planning to relocate before starting work (Required) Application Question(s): Should not have created a Provident Fund before. Need a fresh resource. The interview process is strictly Offline. Don't apply or request online. Your profile will be rejected if requested. Education: Bachelor's (Required) Work Location: In person Expected Start Date: 02/02/2026
Job Title: Analog Layout Trainer Location: Bengaluru Employment Type: Full-time Department: Training & Development About the Role: We are looking for a skilled and passionate Analog Layout Design Trainer to train and mentor students in custom analog and mixed-signal layout design. The ideal candidate will have hands-on experience in analog layout methodologies, a strong understanding of design rules, and proficiency with leading EDA tools. Key Responsibilities: Conduct classroom and lab sessions on Analog and Mixed-Signal Layout Design. Develop and maintain course content, lab exercises, and training material aligned with industry standards. Mentor trainees on layout techniques, matching principles, parasitic extraction, and DRC/LVS processes. Evaluate trainee performance and provide continuous, constructive feedback. Integrate real-world analog layout practices into project-based learning. Coordinate with academic and placement teams to ensure trainees meet industry expectations. Required Skills & Expertise: Strong proficiency in Cadence Virtuoso or equivalent custom layout tools. In-depth knowledge of layout matching, device placement, parasitic extraction, and verification fundamentals (DRC/LVS). Understanding of process technology, PDKs, and design rule constraints. Familiarity with analog circuit blocks such as op-amps, comparators, bandgaps, and current mirrors. Qualifications: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Design. Experience: 1–5 years of experience in Analog Layout Design. Prior mentoring or training experience is an added advantage. Excellent communication and presentation skills. Passion for teaching and guiding aspiring VLSI engineers. Career Path: Year 1: VLSI Trainer – Training Institute Year 2 Onwards: Eligible to move as a full-time employee of Siliconus Technologies Private Limited. Please send your Resume to WhatsApp: 7893662522 Job Type: Full-time Pay: From ₹20,000.00 per month Application Question(s): Total Years of Experience: Current Institute / Organization Name: Current CTC: Expected CTC: Area of Expertise: Notice Period / Availability to Join: Work Location: In person
Job Title: RTL Design Trainer Location: Bengaluru Employment Type: Full-time Department: Training & Development About the Role: We are looking for an experienced and enthusiastic RTL Design Trainer to train and mentor students in digital design and RTL development using industry-standard EDA tools. The ideal candidate should have a strong understanding of Verilog, design methodologies, and RTL coding best practices, with a passion for teaching and guiding aspiring VLSI engineers. Key Responsibilities: Conduct classroom and lab sessions on RTL Design and Digital Design Fundamentals . Develop and update course materials, lab exercises, and project modules aligned with industry practices. Mentor trainees on RTL coding, synthesis concepts, and design implementation using standard EDA tools. Guide students through mini-projects and design assignments to strengthen practical understanding. Evaluate trainee progress and provide constructive feedback. Stay updated on industry trends, tools, and technologies to keep the curriculum current. Coordinate with academic and placement teams to ensure students meet professional expectations. Required Skills & Expertise: Strong proficiency in Verilog HDL and RTL design principles. Hands-on experience with tools such as Synopsys Design Compiler , Cadence Genus , or equivalent. Solid understanding of digital logic design, FSMs, synthesis, and timing concepts . Knowledge of simulation environments and design verification fundamentals. Qualifications: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Design. Experience: 1–5 years of experience in RTL Design. Prior experience in training, mentoring, or lab guidance preferred. Excellent communication and presentation skills. Strong interest in teaching and developing technical talent. Career Path: Year 1: VLSI Trainer – Training Institute Year 2 Onwards: Eligible to move as a full-time employee of Siliconus Technologies Private Limited . Please send your Resume to WhatsApp: 7893662522 Job Type: Full-time Pay: From ₹20,000.00 per month Benefits: Provident Fund Application Question(s): Total Years of Experience: Current Institute / Organization Name: Current CTC: Expected CTC: Area of Expertise: Notice Period / Availability to Join: Work Location: In person
Job Title:VLSI Physical Design Trainer Location: Bengaluru Employment Type: Full-time Department: Training & Development About the Role: We are seeking a highly skilled and motivated VLSI Physical Design Trainer to deliver industry-oriented training programs. The ideal candidate will possess in-depth knowledge of ASIC/SoC design flow, EDA tools, and best practices in physical design implementation and sign-off. Key Responsibilities: Conduct classroom and lab sessions on VLSI Physical Design concepts. Develop and update course materials, lab exercises, and assessments aligned with industry standards. Mentor trainees in floorplanning, placement, CTS, routing, timing closure, and sign-off methodologies. Provide guidance on project implementation and tool usage. Evaluate trainees’ progress and provide performance feedback. Coordinate with academic and placement teams for trainee readiness. Required Skills & Expertise: Expertise in ASIC/SoC design flow – floorplanning, placement, CTS, routing, and sign-off. Hands-on experience with Cadence Innovus , Synopsys ICC2 , PrimeTime , or equivalent EDA tools. Strong understanding of timing analysis, power analysis, DRC/LVS checks , and PnR methodologies. Qualifications: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Design. Experience: 1–5 years of relevant experience in Physical Design. Prior training or mentoring experience preferred. Excellent communication and presentation skills. Career Path: Year 1: VLSI Trainer – Training Institute Year 2 Onwards: Eligible to move as a full-time employee of Siliconus Technologies Private Limited. Please send your Resume to WhatsApp: 7893662522 Job Type: Full-time Pay: From ₹20,000.00 per month Benefits: Provident Fund Application Question(s): Total Years of Experience: Current Institute / Organization Name: * Current CTC: Expected CTC: Area of Expertise: Notice Period / Availability to Join: Work Location: In person
Job Title: Physical Verification Trainer Location: Bengaluru Employment Type: Full-time Department: Training & Development About the Role: We are seeking a knowledgeable and detail-oriented Physical Verification Trainer to train students in DRC, LVS, and sign-off verification flows. The trainer will prepare participants for real-time physical verification tasks using industry-standard tools and practices. Key Responsibilities: Conduct sessions on Physical Verification methodologies and workflows. Develop and maintain practical lab modules and exercises on DRC, LVS, and ERC. Mentor students on sign-off checks, tool usage, and problem debugging. Evaluate and track trainee progress. Collaborate with other trainers to ensure complete design flow understanding. Required Skills & Expertise: Hands-on experience with tools such as Mentor Calibre , Cadence Assura/PVS , or Synopsys ICV . Strong understanding of DRC/LVS/ERC , design rules, and process technology. Familiarity with GDSII handling and verification methodologies. Qualifications: B.E/B.Tech or M.E/M.Tech in Electronics, Electrical, or VLSI Design. Experience: 1–5 years in Physical Verification or related domain. Experience in teaching or mentoring is preferred. Excellent analytical and communication skills. Career Path: Year 1: VLSI Trainer – Training Institute Year 2 Onwards: Eligible to move as a full-time employee of Siliconus Technologies Private Limited. Please send your Resume to WhatsApp: 7893662522 Job Type: Full-time Pay: From ₹20,000.00 per month Benefits: Provident Fund Application Question(s): Total Years of Experience: Current Institute / Organization Name: Current CTC: Expected CTC: Area of Expertise: Notice Period / Availability to Join: Work Location: In person
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