636 Silicon Jobs - Page 9

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience 4 years of experience with digital design in ASIC. Experience in RTL design utilizing Verilog/System Verilog with ARM-based SoCs, interconnects, and ASIC methodology. Experience in a scripting language, such as Python or Perl. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience with AMBA (Advanced Microcontroller Bus Architecture) protocols. Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC). Experience with methodologies for low power estimation, timing closure, synthesis. Experience with a scripting language like Python. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Define microarchitecture details including interface protocols, block diagrams and data flow. Perform RTL quality checks such as Lint, CDC, and Synthesis checks. Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up. Collaborate within a team to develop and deliver optimized interconnect blocks and subsystems. Coordinate with architecture, design verification, and implementation teams to ensure specification adherence and Communicate and work with multi-disciplinary and multi-site teams.

Minimum qualifications: Bachelor s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience. 15 years of experience in ASIC RTL design integration. Experience in Verilog or Systemverilog coding. Experience in High performance design, Multi power domains with clocking of multiple SoCs with silicon. Preferred qualifications: Master s degree in Electrical Engineering or Computer Engineering, or equivalent practical experience. Experience with ASIC design methodologies for front quality checks including Lint, CDC/RDC, Synthesis, DFT ATPG/Memory BIST, UPF and Low Power Optimization/Estimation. Experience with chip design flow and understanding of cross domain involving DV DFT/Physical Design/software. Knowledge in one or more of these areas: Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, Pin-muxing. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Lead a team of ASIC RTL engineers on Sub-system and chip-level Integration activities including planning tasks, hold code and design reviews, code development of features. Interact closely with architecture team and develop implementation (microarchitecture and coding) strategies to meet quality, schedule and PPA for Sub-system/chip-level integration. Work closely with the cross-functional team of Verification, Design for Test, Physical Design and Software teams to make design decisions and represent project status throughout the development process.

Minimum qualifications: Bachelor s degree in Electrical/Computer Engineering or equivalent practical experience. 2 years of experience with RTL design using Verilog/System Verilog and microarchitecture. Experience in ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: Master s degree in Electrical/Computer Engineering. Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC). Experience with methodologies for low power estimation, timing closure, synthesis. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As part of our platform IP team, you will be a part of a team that designs foundation and chassis IPs (NoC, Clock, Debug, IPC, MMU and other peripherals) for Pixel SoCs. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver quality RTL. You will solve technical problems with innovative micro-architecture, low power design methodology and evaluate design options with complexity, performance and power. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities Define microarchitecture details such as interface protocol, block diagram, data flow, pipelines, etc. Perform RTL development (SystemVerilog), debug functional/performance simulations. Perform RTL quality checks including Lint, CDC, Synthesis, UPF checks. Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up. Communicate and work with multi-disciplined and multi-site teams.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a SoC RAS and Manageability Controller FW Developer, you are responsible for working with a team on the enablement of the SoC and Platform management solution for Qualcomm's upcoming products. You will collaborate internally to help define and implement embedded firmware to manage the error, debug and telemetry management features for the Qualcomm SoCs across many verticals. You will also participate in various other aspects of the management controller firmware development, including power management, boot, RAS, debug, security and runtime services. In SoC Management Controller FW developer role you will be working closely both with the hardware and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the complete firmware development lifecycle through design, development, debug and verification, in pre-silicon and post-silicon environments. Develop core firmware stack, utilizing and RTOS, that provides the essential services and frameworks to various algorithms running on the power management controller. Assist in defining Reliability, Availability and Serviceability solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Collaborate with team members and other teams on silicon and platform bring-up, debug and diagnostics. Assist in identifying skills requirements and in hiring engineers, Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 8 years experience in embedded firmware development Familiarity with Error reporting and manageability requirements on a datacenter server platform. Familiarity with ARM RAS specification, ARM CPU RAS extensions, and Software components (SDEI, APEI, UEFI CPER) specifications is preferred. Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing and debugging in pre-silicon environments including simulators and FPGA emulation Experience defining interprocessor communication interfaces between embedded controllers and the platform Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Who We Are Simpplr is the AI-powered platform that unifies the digital workplace - bringing together engagement, enablement, and services to transform the employee experience. It streamlines communication, simplifies interactions, automates workflows, and elevates the everyday experience of work. The platform is intuitive, highly extensible, and built to integrate seamlessly with your existing technology. More than 1,000 leading organizations - including AAA, the NHS, Penske, and Moderna - trust Simpplr to foster a more aligned and productive workforce. Headquartered in Silicon Valley with global offices, Simpplr is backed by Norwest Ventures, Sapphire Ventures, Salesforce Ventures, and Tola Capital. Learn more at simpplr.com . Lead Product Designer The Opportunity Simpplr is looking for a Lead UX/UI designer who excels at user-centric product development to help design the future of work. This is a great opportunity to join a team responsible for a product that is defining the way companies engage and connect with their employees. You ll be working alongside talented and passionate product managers, UX/UI designers, researchers and remotely with members of our engineering team in US, India and the UK - all focused on collectively building a world class application. We bring our A-game every day, and have fun doing it. We are looking for truly awesome, unbelievably talented creators to join us. As a Lead Product Designer , you will: Design and Develop: Create intuitive and user-friendly interfaces for developer tools, extensibility features, and integrations. User Research: Conduct user research to understand the needs and pain points of developers and IT professionals. Collaboration: Collaborate closely with engineers, product managers, and other stakeholders to ensure that design solutions align with business objectives. Innovation: Drive innovation and explore new design opportunities to enhance the developer experience. Mentorship: Provide mentorship and guidance to junior designers on the team. Qualifications: Experience: Proven experience in designing developer tools, extensibility features, or integrations. Skills: Strong understanding of UX design principles, including user research, wireframing, prototyping, and usability testing. Proficiency in design tools such as Figma, Sketch, or Adobe XD. Technical Knowledge: Familiarity with development tools and technologies, such as APIs, SDKs, and programming languages. Communication: Excellent communication and collaboration skills, with the ability to effectively communicate design concepts to technical and non-technical stakeholders. Problem-Solving: Strong problem-solving and analytical skills to identify and address design challenges. Youll be a great addition to the team if you: Want to be part of creating amazing and innovative experiences that help solve real pain points for our customers while driving concrete metrics and business outcomes and know how to find the right balance. Use data and research to inform your design decisions and are able to assess the impact of your designs with quantitative and qualitative data. Are comfortable operating in a fast paced environment and ambiguous problem spaces Bonus: Worked in the B2B, HR, Productivity space or tackled issues related to communication systems for knowledge workers. Have a track record in using design thinking to drive cross functional alignment and storytelling. Have experience partnering with Product to envision long term product vision, strategy, and roadmap. Bring a strong sense of empathy and a user - centric approach to design. Are excited to work in a positive, supportive environment and want to collaborate as part of a high - caliber, cross - functional team that helps you grow. Have a portfolio showing compelling and quality design as well as a track record of driving design forward. Simpplr s Hub-Hybrid-Remote Model: At Simpplr we believe that when work is good, life is better and that belief guides all we do. Including how we approach our flexible work model. Simpplr operates with a Hub-Hybrid-Remote model. This model is role-based with exceptions and provides employees with the flexibility that many have told us they want. Hub - 100% work from Simpplr office. Role requires Simpplifier to be in the office full-time. Hybrid - Hybrid work from home and office. Role dictates the ability to work from home, plus benefit from in-person collaboration on a regular basis. Remote - 100% remote. Role can be done anywhere within your country of hire, as long as the requirements of the role are met.

We are now looking for a SOC Verification Engineer. NVIDIA is pioneer in building the worlds fastest highly-parallel processing systems for deep-learning, high-performance computing, and automotive applications. We are seeking a passionate, innovative, and highly motivated verification engineer to work on the complex CPU-GPU memory systems. What You ll Be Doing: Responsible for defining test plans & architecting testbenches for verification of the CPU/GPU memory subsystem. Verify micro-architecture/architecture features at subsystem or full chip testbenches. Work with architects, designers, and pre-silicon verification teams to accomplish your tasks. Build reusable bus functional models, traffic generators, monitors, checkers and scoreboards following coverage driven verification methodology. Developing innovative tools/automation to stress the design under test and cover the verification space. What We Need To See: BS or MS in electrical engineering or computer engineering 3+ years of experience working on ASIC development Exposure to micro-architecture of high-performance CPU or GPU memory subsystems Experience with industry standard verification methodologies Ways To Stand Out From The Crowd: Exposure to coherency protocols, cache verification and network-on-chip (NOC) Exposure to CPU memory subsystem and knowledge of AMBA/CHI protocols. Innovative mindset, ability to use automation/tools to cover vast verification spaces. Good communication skills and ability collaborate across multiple teams. With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If youre a creative and self-reliant engineer with a real passion for technology, we want to hear from you. #LI-Hybrid

Principal Physical Design Engineer in Pune, MH, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

Principal Physical Design Engineer in Bangalore, KA, India Description Invent the future with us. By providing a new level of predictable performance, efficiency, and sustainability Ampere is working with leading cloud suppliers and a growing partner ecosystem to deliver cloud instances, servers and embedded/edge products that can handle the compute demands of today and tomorrow. About the role: Ampere Computing is seeking a highly skilled engineer to join our physical design team with a focus on both CPU/GPU physical design and interconnect integration/implementation for CPU and GPU products. This role requires deep expertise in high-speed and power efficient physical design and methodologies with hands-on experience implementing CPU/GPU & interconnect networks to deliver robust, high-performance silicon solutions. You will collaborate closely with Architects, RTL designers, packaging team, and timing, power & DFT teams to ensure robust, high-performance designs that meet stringent timing, power, and area requirements. Interconnect floor planning iterations, partitioning, pin-placement, wire planning, clock distribution network. Working with Architecture, RTL and timing teams for optimal floorplan from system performance point of view. Implement power and clock domain crossing with UPF and timing methodologies. Converge timing on high speed interface with appropriate methods of clock balancing and skewing. Lead and execute physical design tasks for CPU/GPU blocks including floor planning, placement, clock tree synthesis, routing, and optimization. Collaborate with RTL designers and timing engineers to achieve timing closure, power targets, and area goals. Perform physical verification and signoff checks ensuring design compliance with foundry rules and design specifications. Analyze and resolve physical design issues such as congestion, timing violations, and signal integrity challenges. Develop scripts and automation flows to improve design efficiency and quality. Address interconnect-related challenges such as crosstalk, IR drop, electromigration, and noise. Document design methodologies, best practices, and integration guidelines specific to Ampere s CPU/GPU physical design flows. Collaborate and work with cross geo teams in India & Vietnam About you: M.Tech in Electronics Engineering or Computer Engineering with 6+ years of semiconductor experience or B.Tech in Electronics Engineering or Computer Engineering with 8+ years of semiconductor experience Experience in high performance/low power physical design, preferably with a focus on CPU and/or GPU architectures. Proven expertise in both CPU / High performance physical design and interconnect integration/implementation. Solid understanding of timing analysis, signal integrity, power integrity, electromigration, and advanced process technologies (7nm, 5nm, or below). Deep understanding of semiconductor device physics, interconnect materials, and advanced process technologies (7nm, 5nm, or below). Strong proficiency with EDA tools such as Cadence Innovus, Synopsys ICC2, Mentor Calibre, and parasitic extraction tools (StarRC, Quantus). Experience with scripting languages (Tcl, Python) for automation and tool customization. Excellent problem-solving skills and ability to work effectively in cross-functional teams. Effective communication skills to collaborate with design, verification, and manufacturing teams. What we ll offer: At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, bonus (i.e., variable pay tied to internal company goals), long-term incentive, and comprehensive benefits. Benefits highlights include: Premium medical, dental, vision insurance, parental benefits including creche reimbursement, as well as a retirement plan, so that you can feel secure in your health, financial future and child care during work. Generous paid time off policy so that you can embrace a healthy work-life balance Fully catered lunch in our office along with a variety of healthy snacks, energizing coffee or tea, and refreshing drinks to keep you fueled and focused throughout the day. And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are passionate about inventing industry leading cloud-native designs that contribute to a more sustainable future. We are excited to share more about our career opportunities with you through the interview process.

MTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Silicon Design team at AMD you will help create leading edge IP s used in a wide variety of applications. The focus of this role is to lead, design, plan and execute RTL design for NoC (Network on Chip). THE PERSON: Successful candidate will have an SOC/ASIC Design background, would have participated in several silicon design projects with increasing level of scope/responsibilities and has a history of achieving results through effective execution . KEY RESPONSIBILITIES: Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements. Collaborate with architecture and hardware teams to understand the requirements. Help lead and mentor other engineers to achieve project goals and organizational growth. Work with verification and physical design teams to achieve high quality design and successful tape outs. Design and implement logic functions that enable efficient test and debug. Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features. Implement automation to increase design team efficiency. PREFERRED EXPERIENCE: Must have proven track record of ASIC design on several production tape-outs. Experience in Designing RTL block for an SOC. Experience in integrating ASIC IP into an SOC. Experience with Arm architecture and APB, AXI, CHI protocols. Experience with synthesis, static timing analysis & optimizations. Experience writing timing constraints and exceptions. Experience with automation using scripting techniques such as PERL, Python or Tcl Ability to develop clear and concise engineering documentation. Ability to organize and present complex technical information. Strong verbal and written communication skills. Exhibit strong ownership of tasks and responsibilities. ACADEMIC CREDENTIALS: Bachelor s or master s degree in computer engineering/Electrical Engineering #LI-PS1

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com . Wireless Hardware Applications Engineer We are Silicon Labs. We are a leader in secure, intelligent wireless technology for a more connected world. Our integrated hardware and software platform, intuitive development tools, unmatched ecosystem and robust support make us the ideal long-term partner in building advanced industrial, commercial, home and life applications. We make it easy for developers to solve complex wireless challenges throughout the product lifecycle and get to market quickly with innovative solutions that transform industries, grow economies and improve lives. Silicon Labs is looking for a junior t o join the A pplication s E ngineering team. We are the bridge between our C ustomers and the internal engineering teams. We help our Customers by providing technical collateral like documentation, coding and hardware examples, and deep technical analysis to solve their actual issues. Our Customers are engineers of those companies who determine the worldwide IoT market. On the other side , w e take the ir technical feedback into internal discussions, as a contribution to new product definitions and/ or bug fixes. What does the Hardware Applications Engineering team do? Silicon Labs Wireless portfolio includes many different transceivers and wireless MCUs for applications like Bluetooth, Zigbee , Thread, Z-Wave, Wi-Fi, Wi-SUN, and a lot more, less known proprietary protocols. Our small team is an expert of and responsible for the lower abstraction layers of the embedded software , below MAC, down the radio configuration registers and peripherals inside the chip, and the surrounding hardware components, schematics , layout including RF matching circuitry and antenna design. As our new application engineer, you get A job in a dynamic and highly innovative technology company in a rapidly growing global market The chance to join a group of highly professional and dedicated colleagues who share your passion Exposure to a broad set of technologies, platforms, and tools The satisfaction of seeing your work in action What you will do In this role you will be working with our cutting-edge 32-bit Wireless MCU products. You will have a direct impact on the success of our biggest customers as they design and build connected systems , and you will be directly contributing to the definition of our next generation products. Here is what your daily role will look like: Actively help customers with their design, development activities , by reviewing schematics, layouts , or fine tune RF performance on Customer PCBs T roubleshoot communication system performance issues by targeted measurements, identify root cause and offer options for solution Create reference designs , hardware design guides for wireless applications Collaborate with IC design, software engineering and marketing teams on product evaluations and new product definitio n Mastery needed for success in this role: BSc or MSc degree in Electrical Engineering Board or system level engineering knowledge with a solid understanding of RF concepts Understanding of Radio Transceiver architecture with knowledge of how to test and verify RF System performance Proficiency taking measurements with standard RF lab instruments (signal generator, spectrum analyzer, network analyzer, scope, DMM, supply) Ability to perform PCB development and optimize RF matching networks Excellent written and verbal communication skills in English We consider the following as a plus: Experience with integrated transmitters and receivers, impedance matching, PCB design Experience in using a scripting language, e.g. P ython , Perl, JavaScript , etc. Experience in embedded SW programming Experience with wireless communication protocols ( Wi-Fi , Bluetooth LE/Mesh, Zigbee, IEEE 802.15.4) Perks & Benefits at Silicon Labs: Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

Head of Software Engineering Location: Mumbai (Hybrid) Company: Miko - AI Robotics for Kids Company Overview Founded in 2015 by IIT Bombay alumni, Miko is a consumer robotics innovation lab passionate about transforming how children learn through technology. With a mission to bring AI and robotics to every home , Miko combines the strengths of over 200+ interdisciplinary professionals across software engineering, robotics, AI, design, child psychology, and content development. Our flagship product, Miko 3 , is an AI-powered intelligent robot for children aged 5-10 years. Designed to educate, entertain, and engage through conversational learning , Miko 3 is powered by proprietary emotional intelligence, multilingual AI, vision & speech recognition, and a dynamic personality engine. With a presence in over 140+ countries and offices in Mumbai, Silicon Valley, and London , Miko is redefining home learning with the world s first content on subscription hardware platform for kids. Role Summary: Head of Software Engineering As Head of Software Engineering , you will be a core member of Miko s leadership team. This role is responsible for defining and executing the software architecture vision, managing cross-functional teams, and delivering scalable, secure, high-quality software for our AI-powered robots. We are looking for a hands-on leader who thrives in fast-paced environments, brings technical depth, leads by example, and is capable of nurturing and scaling high-performing engineering teams. Key Responsibilities Technical Strategy & Architecture Define and execute short- and long-term software architecture roadmaps for Miko s product suite. Drive the end-to-end software development lifecycle from ideation, design, implementation to deployment and maintenance. Collaborate with AI, Embedded, Product, and UX teams to deliver integrated experiences that delight end-users. Team Leadership Lead and mentor a team of 8-10+ full-stack engineers (and multiple sub-teams) across backend, frontend, DevOps, and test automation. Hire top-tier talent, manage team performance, and facilitate career growth through structured feedback and mentorship. Promote a strong engineering culture focused on innovation, quality, and ownership. Development & Execution Build and maintain robust, low-latency, scalable systems across cloud, mobile, embedded, and Android platforms. Guide architectural choices across tech stacks: Java, Spring Boot, MySQL, Docker, Kubernetes, CI/CD pipelines, Reactive frameworks (WebFlux/Vert.x) , and modern frontend/backend systems. Champion DevOps practices ensuring high availability, performance monitoring, and automated testing. Cross-Functional Collaboration Work with founders, product managers, AI researchers, and designers to align engineering roadmaps with business goals. Contribute to product innovation and user experience decisions with a builders mindset. Operational Excellence Report on engineering KPIs, delivery milestones, system reliability, and tech debt to executive leadership. Continuously improve engineering processes to support high-velocity product development while maintaining code quality. Requirements 8+ years of software development experience with 3+ years in a senior leadership/architect role. Expertise in Full Stack development , especially in enterprise-grade Java-based backends , Spring Boot , RESTful APIs, microservices, SQL databases (MySQL), and CI/CD practices. Strong architectural understanding across mobile, embedded, and cloud platforms . Experience building complex distributed systems, working with technologies like Docker , Kubernetes , Android , Reactive frameworks , and cloud-native solutions. Ability to break down complex problems, provide clear technical direction, and deliver results in an agile environment. Exceptional communication and people leadership skills with a proven track record of growing and inspiring engineering teams. Passionate about working in a multidisciplinary setup and contributing to impactful products for global consumers. Why Join Miko? Build for impact: Shape the future of consumer robotics for millions of children globally. Be part of a visionary team: Work alongside top engineers, scientists, psychologists, and creatives. Continuous innovation: Work on proprietary technologies in AI, robotics, emotional intelligence, and adaptive learning . Culture of growth: Participate in cross-functional learning, knowledge-sharing sessions, and fast-track career opportunities in a startup environment. Diverse and global exposure: Collaborate across borders and backgrounds, with teammates from India, the US, and the UK. Ready to Shape the Future? Apply now and help us create technology that kids love and parents trust.

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life s work , to amplify human creativity and intelligence. As an NVIDIAN, you ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! NVIDIA is seeking best-in-class Senior SoC/CPU Verification Engineer to verify the worlds most powerful CPUs/Socswith AI capabilities for self-driving cars, gaming consoles & other automated machines (see NVIDIA Grace CPU and Arm Architecture | NVIDIA). NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. What you ll be doing: Work alongside brilliant engineers on NVIDIAs next generation CPU Verify micro-architecture/architecture features at unit level or subsystem or full chip testbenches including FPGA/Silicon Partner with CPU architects in crafting verifiable designs. Working on full stack development - from verifying sequences at SW simulator level, to getting the overall end-to-end sequence working on silicon with a full SW stack. What we need to see: Strong verification fundamentals and are able to juggle working on SW simulators vs Silicon Proficiency in CPU architecture (ARM knowledge is desirable), Verilog, System Verilog and possess strong debugging skills. 5+ years of experience with Bachelors/Masters in Computer Science or Electronics Engineering or equivalent experience Ways to stand out from the crowd: Worked on various pieces of CPU unit/microarchitecture verification You have worked on complex coverage driven verification projects Experience of collaborating with geographically diverse multi-functional teams With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world s most desirable employers. We have some of the most resourceful and versatile people in the world working for us and, due to outstanding growth, our best-in-class engineering teams are rapidly growing. If youre a creative and autonomous engineer with a real passion for technology, we want to hear from you. #LI-Hybrid

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 12 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Nice to haves - Knowledge of instruction dispatch and Arithmetic unit. - Knowledge of test generation tools and working with ISA reference model. - Experience with translating ISA specifications to testplan. - Knowledge of verification principles and coverage. - Understanding of Agile development processes. - Experience with DevOps design methodologies and tools.

NVIDIA is seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of memory subsystem units for the world s leading GPUs and SOCs. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. The GPU started out as an engine for simulating human imagination, conjuring up the amazing virtual worlds of video games and Hollywood films. Today, NVIDIA s GPU simulates human intelligence, running deep learning algorithms and acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. NVIDIA is increasingly known as the AI computing company. What you ll be doing: You will be responsible for verifying the ASIC design, architecture and micro-architecture of memory sub-systems/units using advanced verification methodologies. Understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. Coming up come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. Work on advanced verification methodologies like SV/UVM. Perform functional coverage driven verification closure. Working with architects, designers, and pre and post silicon verification teams to accomplish your tasks. What we need to see: B. Tech. / M. Tech. , or equivalent experience. 5+ years of relevant experience. Experience in verification of complex IPs/units and sub-systems. Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Expertise in Verilog. Knowledge in SystemVerilog or similar HVL / UVM or VMM. Ways to stand out from the crowd: Experience in memory subsystem or network interconnect IP verification. Debugging and analytical skills with sound scripting knowledge. Good communication and excellent team player. #LI-Hybrid

About Client Hiring for One of the top most MNC!! Job Description Job Title : VLSI Sales Head Qualification : Any Graduate or Above Relevant Experience : 15 to 25 Years MAIN SKILL Ability to engage with customer R&D leaders and influence business opportunities. Build strong customer relationships and possess influential skills to drive business growth Work within organization delivery/ resourcing/ CoE teams and external partner ecosystem to staff and ramp-up VLSI team based on customer needs Understanding of Silicon Engineering Value Chain (Frontend, Backend, Post Silicon) and VLSI design fundamentals (ASIC/SoC, FPGA, digital/analog design, Package Design) Familiarity with tools and design flows (e.g., RTL to GDSII, DFT, STA, CAD flow & methodologies) Familiarity with Silicon Engineering languages and methodologies (e.g., Verilog, UVM methodology) Ability to groom and drive a sales team GOOD TO HAVE Hands-on experience in Silicon Engineering (VLSI design, Verification and validation) Create and leverage VLSI partner ecosystem for expanding offerings and talent Stay updated on semiconductor industry trends and competitor activities to refine the sales approach accordingly and gain customer mindshare. IC Design Services Strategy, Business Plans and roadmap. Guide Business development manager/ sales manager SoW and MSA reviews ROLES AND RESPONSIBILITIES Expand existing client relationships, and identify new IC Design Services growth opportunities Identify and establish new logos in IC Design Services Deliver against sales targets Collaborate with Presales and Technical teams to develop compelling customer propositions Ability to engage confidently at senior levels within customer organizations Build and maintain a robust sales pipeline through proactive lead generation and networking Work with Hiring, Resourcing, Delivery teams and partner ecosystem to meet requirements Utilize industry trends, competitive insights to enhance sales strategies and provide input to offering owners. Excellent stakeholder management and client facing skills Excellent communication and analytical skills Location : HYDERABAD /BANGALORE CTC Range : 35 LPA TO 45 LPA Notice period : ANY Shift Timing : N/A Mode of Interview : VIRTUAL Mode of Work : WORK FROM OFFICE Vardhani IT Staffing Analyst Black and White Business solutions PVT Ltd Bangalore, Karnataka, INDIA. 8686127477 I vardhani@blackwhite.in I www.blackwhite.in

Verification Engineer Location: Bengaluru Experience: 4-8 years Primary Skills 1. Knowledge of one or more Protocols: PCIe, LPDDR, SPI, USB, AXI. 2. Knowledge of ARM and/or x86 SoC Architecture. 3. Strong experience in C programming language, Assembly Language & Python programming. 4. Strong experience in one or more scripting languages Perl/ Python/ TCL etc. 5. Debugging experience. 6. Debugger interface knowledge (Coresight/ UltraSoC, Lauterbach, JTAG). 7. Experience on any emulation platforms (Palladium, Zebu or equivalent). 8. Experience in testing embedded software on SoC, including understanding of HW architecture, board schematics, protocols & standards. 9. Working proficiency and communication skills in verbal and written English. Good to have Skills 1. Experience in coding / development in C, Python. 2. Experience of Palladium compilation/ build flows is a big plus. 3. Power controller chips Knowledge & Testing is a big plus. Qualifications 1. BE degree in Electronics, Computer Science or similar technical field of study or equivalent practical experience. 2. 4 - 8 years of experience in hardware or embedded test and automation role. Responsibilities 1. Pre Silicon Validation / Emulation Engineer responsible for test plan development, test scenario creation and validation of IPs/ SoCs on Palladium emulation platform. 2. Triage, analyze and send comprehensive test results for nightly/ weekly/ Stability test. 3. Automate tests using existing test frameworks and work closely with Test Leads to improve test framework robustness and efficiency.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Excellent Design verification domain expertise. Develop test strategy, TB architecture and test plan for new IP’s/new features Develop strategies for re-useable, scalable and enhance Sub system level verification environment Excellent C/System Verilog/Verilog skills to handle C based TB environment Strong skills in debug, post silicon debug-failure re-creation and root cause analysis Scripting proficiency - PERL, Python, for developing applicable automation AMBA, AXI bus protocols Power intent verification, GLS etc. Capable of communicating effectively with all stakeholders across the globe Capable of seeding a new team for new IPs, able to hire and expand the team in expertise and efficiency Capable of mentoring the team members for their career growth, maintaining diversity in the team, collaborating with other leads and managing multiple parallel projects Take initiatives to enable various ideas for improving efficiencies. Good to have: Image Processing, DSI/DP/HDMI Protocols Good knowledge of new methodologies, flows and tools to be incorporated. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

Job Area: Engineering Group, Engineering Group > Software Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer, you will design, develop, create, modify, and validate embedded and cloud edge software, applications, and/or specialized utility programs that launch cutting-edge, world class products that meet and exceed customer needs. Qualcomm Software Engineers collaborate with systems, hardware, architecture, test engineers, and other teams to design system-level software solutions and obtain information on performance requirements and interfaces. Minimum Qualifications: Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience. 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc. Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age - and this is where you come in. GENERAL SUMMARY As a SoC RAS and Manageability Controller FW Developer, you are responsible for working with a team on the enablement of the SoC and Platform management solution for Qualcomm's upcoming products. You will collaborate internally to help define and implement embedded firmware to manage the error, debug and telemetry management features for the Qualcomm SoCs across many verticals. You will also participate in various other aspects of the management controller firmware development, including power management, boot, RAS, debug, security and runtime services. In SoC Management Controller FW developer role you will be working closely both with the hardware and firmware development teams. You will have an opportunity to engage with third parties on enablement of new platforms, as well as providing input to our SoC and platform architects on future designs. Role and Responsibilities Drive the complete firmware development lifecycle through design, development, debug and verification, in pre-silicon and post-silicon environments. Develop core firmware stack, utilizing and RTOS, that provides the essential services and frameworks to various algorithms running on the power management controller. Assist in defining Reliability, Availability and Serviceability solutions for future generation of Qualcomm CPUs. Actively engage with open source communities to contribute support for processor architectures, device drivers, and firmware features Collaborate with team members and other teams on silicon and platform bring-up, debug and diagnostics. Assist in identifying skills requirements and in hiring engineers, Preferred Qualifications BS/BEng in Electrical, Computer Engineering, or Computer Science (or equivalent professional experience) with 8 years experience in embedded firmware development Familiarity with Error reporting and manageability requirements on a datacenter server platform. Familiarity with ARM RAS specification, ARM CPU RAS extensions, and Software components (SDEI, APEI, UEFI CPER) specifications is preferred. Self-starter who takes initiative and brings technical leadership Proficient writing and debugging C and assembly Driver development experience in RTOS or OS Kernel environments Demonstrated development experience with embedded OSes such as Zephyr, eCos, uC/OS or FreeRTOS Experience developing and debugging in pre-silicon environments including simulators and FPGA emulation Experience defining interprocessor communication interfaces between embedded controllers and the platform Familiarity with ARM v8 architecture. Development experience for a ARMV8 platform is a plus. Physical Frequently transports between offices, buildings, and campuses up to mile. Frequently transports and installs equipment up to 5 lbs. Performs required tasks at various heights (e.g., standing or sitting). Monitors and utilizes computers and test equipment for more than 6 hours a day. Continuous communication which includes the comprehension of information with colleagues, customers, and vendors both in person and remotely. Minimum Qualifications Education Bachelors - Computer Science, Bachelors - Engineering, Bachelors - Information Systems Work Experiences 4+ years experience with Programming Language such as C, C++, Java, Python, etc. ,8+ years of Software Engineering or related work experience

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Skills & Experience MTech/BTech in EE/CS with 7+ years of ASIC design experience. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5/6) is added advantage. Understanding of protocols like AHB/AXI/ACE/CHI is desirable. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills. Hands on experience in Multi Clock designs, Asynchronous interface is a must. Hands on experience in Low power SoC design is required. Responsibilities Mirco architecture & RTL development and its validation for linting, clock-domain crossing and DFT rules. Work with functional verification team on test-plan development and waveform debugs at core, sub-system, SoCs levels. Hands on experience in constraint development and timing closure. UPF writing, power aware equivalence checks and low power checks. Support performance debugs and address performance bottle necks. Provide support to sub-system, SoC integration and chip level debug. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Preferred Qualifications: Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. 8+ years of Hardware Engineering or related work experience. 2+ years of experience with circuit design (e.g., digital, analog, RF). 2+ years of experience utilizing schematic capture and circuit simulation software. 2+ years of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc. 1+ year in a technical leadership role with or without direct reports. Principal Duties and Responsibilities: Leverages advanced Hardware knowledge and experience to plan, optimize, verify, and test critical electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems. Integrates complex features and functionality into hardware designs in line with proposals or roadmaps for complex products. Conducts complex simulations and analyses of designs as well as implements designs with the best power, performance, and area. Collaborates with cross-functional teams (e.g., design, verification, validation, software and systems engineering, architecture development teams, etc.) to implement new requirements and incorporate the latest test solutions in the production program to improve the yield, test time, and quality. Evaluates, characterizes, and develops the novel manufacturing of solutions for leading edge products in the most advanced processes and bring-up product to meet customer expectations and schedules. Evaluates reliability of critical materials, properties, and techniques and brings innovation, automation, and optimization to maximize productivity. Evaluates complex design features to identify potential flaws, compatibility issues, and/or compliance issues. Writes detailed technical documentation for complex Hardware projects. Level of Responsibility: Works independently with minimal supervision. Provides supervision/guidance to other team members. Decision-making is significant in nature and affects work beyond immediate work group. Requires verbal and written communication skills to convey complex information. May require negotiation, influence, tact, etc. Has a moderate amount of influence over key organizational decisions.

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field. Minimum of 3+ years’ experience in the area of DFT-, ATPG, Scan Insertion, MBIST, JTAG -In depth knowledge of DFT concepts. -In depth knowledge and hands on experience in DFT(scan/mbist) insertion, ATPG pattern generation/verification, mbist verification and post silicon bring up/yield analysis -Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations. -Ability to analyze and devise new tests for new technologies/custom RAM design/RMA etc. -Expertise in scripting languages such as perl, shell, etc. -Experience in simulating test vectors. -Knowledge of equivalence check and RTL lint tool (like spyglass). -Ability to work in an international team, dynamic environment -Ability to learn and adapt to new tools and methodologies. -Ability to do multi-tasking & work on several high priority designs in parallel. -Excellent problem-solving skills

About Aeris Communication: The "Internet of Things" (IoT) is expected to grow to $19 trillion over the next 10 years as 50 billion devices are brought online. Aeris is at the forefront of this industry, building networks and applications to enable Fortune 500 clients to fundamentally improve their businesses. Headquartered in Silicon Valley with offices in Chicago, Romania, London, Delhi, and Tokyo as well as other markets, we rank among the top ten cellular providers for the IoT globally. We power critical projects across energy, transportation, retail, healthcare and more. Aeris IoT is the IoT SaaS platform for mobile operators and enterprises within Internet of Things (IoT) business. It is built on core tenants of cloud computing and intelligence (AI/ML) that enables operators and enterprises to address new revenue streams from a vast variety of devices while simplifying the process and reducing the cost of connecting them to benefit from economies of scale. Aeris is a valued supplier to automotive OEM s including Volkswagen and Mitsubishi. Our Aeris Mobility Suite product been able to enhance connectivity for the complete vehicle life cycle changing the business dynamics of their programs. As a result of our continued success, Aeris Connected Car footprint and roadmap is expanding both for current generation connected vehicles and next generation Software Defined Vehicles (SDV). We are seeking a world-class Software Architect to join us on this journey. The role offers access to some of the most brilliant minds in the industry, and the opportunity to build and elevate a thriving company in an environment that values innovation, autonomy and integrity. This new position will play an important role in shaping our AI strategy. A few things to know about us:

Standard Cell Characterization- Sr Engineer Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Play Video Job Description Category Engineering Hire Type Employee Job ID 11933 Remote Eligible No Date Posted 06/07/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and meticulous R&D Engineering Senior Engineer with a profound understanding of semiconductor technologies. You thrive in dynamic environments where your expertise in MOSFET and FINFET technologies can shine. With a keen eye for detail and a dedication to quality, you excel at characterizing and modeling standard cells for various technologies and foundries. You are adept at conducting quality analysis of characterized liberty and Verilog models, ensuring timing, power, and functionality standards are met. Your experience with PrimeLib, Hspice, PrimeSim, and Finesim tools positions you as a key player in the validation process. You are committed to delivering on time and quality releases, providing daily status updates, and continuously improving processes. Your collaborative spirit and ability to communicate effectively make you a valuable team member, ready to contribute to groundbreaking innovations. What You ll Be Doing: Characterizing and modeling standard cells for various technologies and foundries. Conducting quality analysis of characterized liberty and Verilog models in terms of timing, power, and functionality. Validating characterization and simulation tool versions including PrimeLib, Hspice, PrimeSim, and Finesim. Providing daily status updates on project progress. Ensuring timely and quality releases of projects. Collaborating with cross-functional teams to enhance design and verification processes. The Impact You Will Have: Enhancing the accuracy and efficiency of standard cell models across various technologies. Improving the quality and reliability of characterized models in terms of timing, power, and functionality. Streamlining validation processes for characterization and simulation tools, ensuring robust tool versions. Contributing to the timely delivery of high-quality releases, meeting project deadlines and standards. Supporting technological innovation through meticulous analysis and validation. Fostering collaboration and knowledge sharing within cross-functional teams for continuous improvement. What You ll Need: 3+ Years of experience in Standard Cell Characterization Thorough knowledge of MOSFET and FINFET technologies. Experience with PrimeLib, Hspice, PrimeSim, and Finesim tools. Strong analytical skills for quality analysis of characterized models. Proficiency in characterizing and modeling standard cells for various technologies. Excellent communication skills for providing daily status updates and collaborating with teams. Who You Are: A detail-oriented professional with a strong analytical mindset. A proactive communicator, able to provide clear and concise updates. A collaborative team player, ready to work with cross-functional teams. A dedicated individual committed to delivering high-quality work on time. An innovative thinker, always looking for ways to improve processes and outcomes. The Team You ll Be a Part Of: You will be part of a dynamic and innovative team focused on advancing semiconductor technologies. Our team is dedicated to characterizing and modeling standard cells, ensuring the highest quality and reliability. We work collaboratively to validate and enhance our tools and processes, driving continuous improvement and technological innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

Senior Software Engineer (C#, .NET Framework) Bengaluru, Karnataka, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Synopsys software engineers are key enablers in the world of Electronic Design Automation (EDA), developing and maintaining software used in chip design, verification and manufacturing. They work on assignments like designing, developing, and troubleshooting software, leveraging the state-of-the-art technologies like AI/ML, GenAI and Cloud. Their critical contributions enable world-wide EDA designers to extend the frontiers of semiconductors and chip development. Play Video Job Description Category Engineering Hire Type Employee Job ID 10126 Remote Eligible No Date Posted 09/04/2025 We Are: You Are: You are a highly passionate technical engineer with 2-3 years of object-oriented programming experience. You are driven by the desire to innovate and solve complex problems. You possess a strong foundation in programming with expertise in C#, .NET Framework, and WPF. Your understanding of data structures and algorithms allows you to develop robust and efficient solutions. You have a keen interest in power electronics and are excited about the opportunity to work on high-precision virtual prototyping tools. You are a team player, capable of working collaboratively with application engineers to enhance and maintain user experiences. Your attention to detail ensures that customer requirements are meticulously addressed, and you are adept at implementing regression test cases to ensure software reliability. What You ll Be Doing: Developing, implementing, and testing user experiences for high-precision virtual prototyping tools. Collaborating with application engineers to enhance existing user experiences and develop new ones. Designing and implementing solutions to address customer requirements and issues. Adding regression test cases to ensure software reliability and performance. Conducting what-if studies and generating best and worst-case results for power electronics simulations. Staying up-to-date with the latest advancements in power electronics and software development. The Impact You Will Have: Enhancing the user experience of Synopsys virtual prototyping tools, making them more intuitive and efficient. Accelerating the validation of software-defined vehicles through advanced simulation technologies. Contributing to the reduction of project schedules for customers, enhancing their productivity. Driving innovation in the field of power electronics through high-precision simulations. Ensuring the reliability and performance of Synopsys software solutions through rigorous testing. Supporting the development of cutting-edge technologies that shape the future of smart systems. What You ll Need: Bachelors degree in Computer Science or a related field. Strong programming skills in C#, .NET Framework, and WPF. In-depth knowledge of data structures and algorithms. Experience with object-oriented programming concepts. Interest or knowledge in power electronics. Who You Are: Collaborative team player with excellent communication skills. Detail-oriented with a strong problem-solving mindset. Adaptable and eager to learn new technologies and concepts. Proactive in addressing customer requirements and issues. Innovative thinker with a passion for technology and development. The Team You ll Be A Part Of: Our Technology and Product Development Group (TPG) is all about enabling our customers to adopt a software-first approach to building and testing high-performance embedded systems. We re the world s leading provider of solutions to accelerate software-defined vehicle (SDV) validation through Synopsys virtual prototyping and electronic digital twins technologies, eliminating months off customers project schedules. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. ** Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Bengaluru View Map Hiring Journey at Synopsys Apply As an applicant your resume, skills, and experience are being reviewed for consideration. Phone Screen Once your resume has been selected a recruiter and/or hiring manager will reach out to learn more about you and share more about the role. Interview You will be invited to meet with the hiring team to measure your qualifications for the role. Our interviews are held either in person or via Zoom. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

About Aeris Communication: The "Internet of Things" (IoT) is expected to grow to $19 trillion over the next 10 years as 50 billion devices are brought online. Aeris is at the forefront of this industry, building networks and applications to enable Fortune 500 clients to fundamentally improve their businesses. Headquartered in Silicon Valley with offices in Chicago, Romania, London, Delhi, and Tokyo as well as other markets, we rank among the top ten cellular providers for the IoT globally. We power critical projects across energy, transportation, retail, healthcare and more. Aeris IoT is the IoT SaaS platform for mobile operators and enterprises within Internet of Things (IoT) business. It is built on core tenants of cloud computing and intelligence (AI/ML) that enables operators and enterprises to address new revenue streams from a vast variety of devices while simplifying the process and reducing the cost of connecting them to benefit from economies of scale. Aeris is a valued supplier to automotive OEM s including Volkswagen and Mitsubishi. Our Aeris Mobility Suite product been able to enhance connectivity for the complete vehicle life cycle changing the business dynamics of their programs. As a result of our continued success, Aeris Connected Car footprint and roadmap is expanding both for current generation connected vehicles and next generation Software Defined Vehicles (SDV). We are seeking a world-class Software Architect to join us on this journey. The role offers access to some of the most brilliant minds in the industry, and the opportunity to build and elevate a thriving company in an environment that values innovation, autonomy and integrity. This new position will play an important role in shaping our AI strategy. A few things to know about us:

SMTS SILICON DESIGN ENGINEER THE ROLE: We are currently seeking a highly skilled verification engineer for GFX sub-system(Graphics Power Management) verification team. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Work with all partners such as lead architects and block design teams to understand features to be implemented and verified. Develop robugs test plan for both synthetic and real workload trace Debug verification test failures, working with the design teams Make sure the design meets functional/performance/power expectations Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools and do test plan, test creation and triage, coverage, and assertion etc. Must demonstrate strong analytical thinking and problem-solving skills with an excellent attention to detail. Must have good English hearing, speaking, reading, and writing capabilities. Must have good teamwork and interpersonal skills. Graphics pipeline experience is preferred. Deep knowledge of computer architecture is preferred. Must be a self-starter, and able to independently drive tasks to completion. Good teamwork and communications skills are required. PREFERRED EXPERIENCE: Minimum 12 years of experience in ASIC verification Must be proficient in Verilog, System Verilog, UVM Methodologies, and C/C++ programming ACADEMIC CREDENTIALS: B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering / Computer Engineering with Digital Systems/VLSI as major with 12+ Years of Exp Location : Hyderabad, India