465 Silicon Jobs - Page 5

Job Overview Tessolve seeks a dynamic and experienced Bench Char Engineer to bepart of the Bench Char team. The ideal candidate will have a strong technicalbackground and the ability to establish and nurture long-term clientrelationships. This role involves working closely with cross-functional teamsto achieve organizational goals. Job Location :Electronic -City, Phase II, Bangalore. What you ll do v Support in characterization ofdevice performance and prepare characterization report v Write and debug test programs fordevice characterization v Analyze test data, perform rootcause analysis of device failures, and define solutions v Recommend improvements to devicestructure based on characterization data v Develop new techniques to streamlinecharacterization process v Identify and resolve deviceperformance issues promptly v Present test results in accurate andclear manner v Assist development and manufacturingengineers in designing and developing new devices; v Mentoring junior characterizationengineers and lab technicians; Who you are Bachelors in Electronic engineering or (related field) Experience with High speed PCIe, SEREDES, DDR, USB and Power IC characterization and Electrical Parameter validation of Silicon is a strong. Experience in PMIC modules BUCK,BUCK-BOOST, BOOST and LDO Electrical Parameters Measurement. Good knowledge analog and digital electronic engineering fundamentals Effectively wield the electronics tools: Oscilloscopes, Multimeters, Waveform Generators, Power Supply and Spectrum analyzers Knowledge of communication interfaces (I2C, UART, SPI, USB) Knowledge of PCB in layout and schematic readability experience Software development skills in one of the following languages Python, MATLAB, NI LabView, NI TestStand Able to work in a team. Fluent written and verbal English is essential. Tessolve Semiconductor Private Limited, as well as its affiliates andsubsidiaries ( Tessolve ) does not require job applicants to make anypayments at any stage of the hiring process. Any request for payment inexchange for a job opportunity at Tessolve is fraudulent and should be ignored.If you receive any such communication, we strongly advise you to refrain frommaking any payments and to promptly report the incident to us athr@tessolve.com. Tessolve is not responsible for any losses incurred due to suchfraudulent activities

Kamla Homes is looking for Painter / Carpenter to join our dynamic team and embark on a rewarding career journey Perform surface preparation, painting, and carpentry tasks Read and interpret work drawings and specifications Use hand and power tools safely and effectively Maintain cleanliness and repair logs for equipment

Job Title : Technical Content Strategist/Developer Location: Pune or Bengaluru, India Company Description : Nexthop AI is a team of industry-leading professionals with deep hardware and software expertise spanning silicon, systems, network operations and cloud development, dedicated to building innovative, bleeding-edge solutions for large-scale AI deployments. The team culture thrives on collaboration, creativity and fun while delivering foundational technologies for next-generation AI infrastructure. About the Role: We are seeking an experienced Technical Content Strategist/Developer to be an integral part of our team. Job Responsibilities: Collaborate with cross-functional teams hardware and software engineers, product managers, technical support engineers, customer engineers to gather technical information, verify content accuracy, and convert it into different forms of technical content. Develop and maintain customer-facing technical product documentation, including configuration guides, product manuals, CLI guides, release notes, and training material. Ensure that our technical content is clear, concise, and actionable, and tailored for our target audiences network architects, operators, and data center engineers. Practice and implement documentation standards, best practices, templates, versioning and style guides. Create and / or polish content for our corporate website, blog, and customer portal. Leverage AI tools and automation workflows to make content development and editing more effective and efficient and content easily queryable by users. Qualifications : Were seeking individuals who thrive in a fast-paced, collaborative startup and have a strong aptitude for taking initiative and learning. Additionally, we value individuals who practice and instill customer empathy. 8+ years of experience as a technical writer, content developer, or similar role. Strong background in networking and familiarity with data center technologies. Exceptional writing, editing, and proofreading skills. Excellent collaboration skills and experience of working with crossfunctional teams both local and remote. Ability to translate complex technical concepts into clear, concise, and customer-friendly content. Working knowledge of modern enterprise documentation platforms such as Docusaurus, Document360, or Gitbook, and structured authoring tools such as DITA, Markdown, or Oxygen. Demonstrated experience of using AI tools to assist with information retrieval, research, content creation, and process automation. Experience of creating technical documentation for networking products both hardware and software. Familiarity with modern headless CMS solutions such as Contentful, Sanity, and Strapi, and web technologies such as Wordpress, HTML/CSS, and Javascript/React would be a big plus.

Job Description Role: Senior Manager, IO Design Memory Technology Competencies: Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design) Extensive Hands-on design experience in IO Design(LVCMOS, HVCMOS, DDR, LVDS) 15+ years of Experience on handling IO designs, projects working with BU, Stake holders NAND Flash Design knowledge is plus Expertise in ESD, Powerbus, Floor plan, Layout guidelines Expertise, knowledge of advanced DDR algorithms : Training modes and DFE/CTLE/Compensation Techniques, Clock skew techniques Management and Lead experience to handle Team of IO engineers Experience in working with cross geo, cross team functions and stake holder management Expertise with package/board/Power integrity /signal integrity constraints is a plus. Strong communication skills & circuit design knowledge is preferred. Tool knowledge: spice tools: finesim, hspice & other flows Good to have: Lead team of experienced IO Design Engineers Strategic development of next generation IO for scaling speed Build Best in Class IP Design Handling BU communication on all IO Roadmap, RMA, FA Drive E/E IO Design capability and execution till Silicon to Productization Qualifications B.TECH/M.TECH in Electrical / Electronics / VLSI / Microelectronics with 15+ years of experience

About Us: Neuron7.ai is a rapidly growing AI-first SaaS company focused on creating a category-defining service intelligence product. Backed by top venture capitalists in Silicon Valley and a distinguished group of angel advisors/investors, we are recognized as a startup to watch. Our swift traction in the market underscores our mission: to empower enterprises to make accurate service decisions at scale. Our AI-driven platform delivers service predictions in seconds by analyzing structured and unstructured data alongside insights from leading experts. In complex service environments such as high-tech devices, manufacturing, and medical devices Neuron7.ai helps service leaders excel in critical metrics like first-call resolution, turnaround time, and service margins. Learn more at Neuron7.ai Why Join Us: At Neuron7.ai , you ll be part of a dynamic, high-impact team that is redefining the future of service intelligence. We value creativity, collaboration, and innovation, and we offer an environment where bold ideas and continuous learning are encouraged. About the Team: You will join a passionate and fast-moving AI/ML team committed to building cutting-edge autonomous AI agents and intelligent systems. The team thrives on solving real-world challenges and pioneering new approaches to decision intelligence and automation. Role Overview: We are looking for an experienced Lead Automation Test Engineering who is passionate about building autonomous Agentic AI systems capable of reasoning, planning, and executing tasks with minimal human intervention. You will play a critical role in developing and optimizing these agents by combining advanced technologies such as LLMs, reinforcement learning, and symbolic AI, and embedding them into enterprise-grade platforms. What You ll Do: Design and build AI agents that autonomously plan and perform complex tasks using LLMs, reinforcement learning, and symbolic Machine Learning & NLP: Develop and fine-tune NLP models for natural language understanding, contextual decision-making, and conversational Technical Skills: Strong proficiency in Python and ML frameworks like TensorFlow or PyTorch Experience with Large Language Models (e.g., GPT, Claude, LLaMA) including prompt engineering and fine-tuning Hands-on knowledge of reinforcement learning, planning algorithms, and autonomous agent frameworks Familiarity with cloud platforms (AWS, Azure, GCP) and MLOps practices Strong understanding of AI pipelines, API development, and system integration Qualifications: Education: Bachelors or Master s degree in Computer Science, Artificial Intelligence, Machine Learning, or a related field from a Tier-1 institution Experience: 8-12 years of experience in AI/ML development, including hands-on work with LLMs systems Demonstrated ability to take research concepts into production-grade systems Preferred Qualifications: Experience in decision intelligence, strategic planning AI, or autonomous agent frameworks Knowledge of graph-based reasoning, AI, or hybrid AI modelsE xposure to data pipeline frameworks such as Flink, PySpark, or similarFamiliarity with containerization tools (Docker, Kubernetes) and messaging systems (Kafka, RabbitMQ) What We Do and Value: At Neuron7.ai , we value integrity, innovation, and a customer-first mindset. Our mission is to revolutionize service decision-making using intelligent automation and cutting-edge AI technologies. Perks & Benefits: Competitive salary, equity, and performance bonuses Paid sick leave Latest MacBook Pro and best-in-class tools Comprehensive health insurance coverage Paid parental leave Flexible hybrid work culture (Bengaluru office) Our Commitment to Diversity and Inclusion: Neuron7.ai is committed to fostering a diverse and inclusive workplace. We are proud to be an equal opportunity employer and make hiring decisions based on merit, qualifications, and business needs without discrimination or harassment of any kind. If youre passionate about Automation Engineering and want to help build the future of autonomous enterprise systems, we d love to hear from you.

Sound foundation in RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 3-5 years experience or PhDs with 0-4 years experience from top tier institutes Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in RF blocks like LNA, PA, RF switches, SPXTs Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills.

Title: Analog and Mixed Signal Design Engineer About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries make possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Analog and Mixed Signal Design Engineer to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of analog circuit design blocks like BGR, LDO, OTA, Current mirrors Your Job: Sound foundation in Analog and Mixed signal circuit design in advanced silicon technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 8 years experience or PhDs with 5 years experience from top tier institutes Applicants should have proficient knowledge of Analog circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in analog blocks like OPAMP, OTA, Bandgap References (BGR), LDO, Biasing circuits with temperature compensation and mismatch aware circuit design Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog design flows and knowledge of ADC, DACs is a plus Good publication and patent record Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills.

Title: Analog and Mixed Signal Design Engineer About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries make possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Analog and Mixed Signal Design Engineer to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of analog circuit design blocks like BGR, LDO, OTA, Current mirrors Your Job: Sound foundation in Analog and Mixed signal circuit design in advanced silicon technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 8 years experience or PhDs with 5 years experience from top tier institutes Applicants should have proficient knowledge of Analog circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in analog blocks like OPAMP, OTA, Bandgap References (BGR), LDO, Biasing circuits with temperature compensation and mismatch aware circuit design Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog design flows and knowledge of ADC, DACs is a plus Good publication and patent record Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Seeking an experienced Analog IC design engineer for developing complex analog mixed signal/ high precision analog ICs for Power, Isolation and Infrastructure applications. This person will work in a design group at the forefront of Powering the A.I., EV and Energy revolution, working to develop technologies that will revolutionize various end markets by enabling new levels of power efficiency. Responsibilities Architects, designs, and verifies circuits, systems, algorithms, etc. to meet product requirements. Develops innovative new designs for patenting or protecting as trade secrets. Reports on design results through design reviews and weekly status meetings. Attends design reviews to provide input and learn from other designer s work. Research design techniques through technical publications and seminars. Develops scripts needed for automating design verification and thoroughly verifies their work before closing the task out. Responsible for custom layout including overseeing the work of layout designers. Works on bench characterization of silicon as needed to prove block/chip performance and to find issues with silicon. Communicates with cross functional team as needed to make sure all the assumptions made during design process are vetted properly. Helps recruit and grow the team, contribute to team building activities. Job Requirements Educational Background B.Tech + 5 years experience M.Tech + 3 years experience PhD + 0 years experience Minimum Requirements Knowledge of MOS transistors and analog circuit design Knowledge of complex AC/DC analysis (poles, zeros, compensation), loop dynamics and feedback systems Knowledge of device physics and CMOS/BiCMOS fabrication processes. Previous design experience with complex analog and mixed signal design blocks. Knowledge in signals, systems and transforms. Understanding of the end to end design flow from product definition to high volume manufacturing Understanding of layout tradeoffs for performance and size Knowledge of circuit simulation tools, layout verification tools, modeling tools, and UNIX Additional Skills (one or more of these are highly desirable) Previous design experience with high precision current/voltage references, bandgaps, regulators, ring oscillators, level shifters etc Knowledge of high voltage processes and design in BCD and/or SOI type processes MOS Device modeling skills (noise, excess thermal noise, DIBL) Laboratory measurement skills System knowledge (e.g., isolators) and design skills in system modeling Understanding of mixed signal solutions including discrete time digital signal processing Good written and verbal presentation skills Job Segment: Design Engineer, Electrical Engineering, Thermal Engineering, Manufacturing Engineer, Fabrication, Engineering, Manufacturing

Title: RF Design Engineer About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries make possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for a highly motivated Engineer in RF circuit design to work in the Reference design team based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of RF circuit design blocks like LNA, PA, RF Switches, SPXTs Your Job: Sound foundation in RF circuit design in advanced silicon technologies SiGe and sub-nm CMOS technologies Support silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Required Qualifications: MTech with more than 3-5 years experience or PhDs with 0-4 years experience from top tier institutes Applicants should have proficient knowledge of Analog and RF circuit design and experience with EDA (Cadence, ADS) in silicon technologies SiGe and CMOS (bulk and SOI) Experience in RF blocks like LNA, PA, RF switches, SPXTs Experience in layout and parasitic extraction Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge of SiGe and CMOS technology nodes 45/32/28nm and below is an advantage Hands-on knowledge of state-of-the-art analog biasing circuit blocks is a big plus and knowledge of mismatch aware design Good publication record and patents Dedication and the ability to work within a very dynamic interdisciplinary environment Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional spoken and written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Sodexo Food Solutions India Pvt. Ltd. is looking for Carpenter to join our dynamic team and embark on a rewarding career journey Measurement and Planning: Measure and plan the layout and design of structures or components to ensure precision and accuracy in construction Cutting and Shaping: Cut and shape wood, metal, or other materials using hand and power tools like saws, chisels, and routers Assembly: Assemble and join pieces of wood or materials using screws, nails, adhesives, and other fastening methods to create structures, such as furniture, cabinets, or buildings Installation: Install doors, windows, moldings, cabinets, and other fixtures in homes, offices, and construction projects Framing: Build structural frameworks and frames for buildings, including wall framing, roof trusses, and floor systems

THE ROLE: We are looking for an adaptive, self-motivative Physical Design Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading products to market. The Physical Design team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Physical Design Closure of critical partitions in complex IPs PREFERRED EXPERIENCE: 7+ years of expereince in Physical Design Should have done partition closure in at least 3-4 tapeouts Should have exposure to one of signoff verification flows ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering /Electronics Engineering #LI-SR5 Benefits offered are described: AMD benefits at a glance .

The Opportunity Are you an experienced Senior Product Manager with a strong track record, analytical skills, and strategic thinking abilitiesIf so, joining our team at Nutanix AI will allow you to contribute to key features on our platform, drive and measure adoption success rates, and collaborate with various teams across the company. As a Senior Product Manager for Nutanix AI, you will have the opportunity to define and build AI/ML products, delivering infrastructure solutions for applications built upon LLMs for numerous use cases. Join our team and be at the forefront of the AI/ML revolution. About the Team Luke Congdon is a Senior Director of Product Management at Nutanix leads a team of diverse product managers for AI/ML, AHV, and End User Computing. Prior to joining Nutanix six years ago, Luke has built and brought numerous products to market at seminal Silicon Valley technology companies, including VMware, NetApp, and Sun Microsystems. Luke received his MBA at Santa Clara University and BS at the University of Connecticut. He also attended Harvard University s Leadership for Senior Executives program. Luke is currently living in Atlanta, Georgia, after 23 years in Silicon Valley with his family and Formosan Mountain Dog. Your Role Help define and execute the roadmap for Nutanix Enterprise AI development, ensuring that our products align with customer needs and industry trends. Regularly reach out to customers, collect their feedback, and synthesize it into prioritized requirements that inform our product development process. Write detailed market requirements and product requirement documents (PRDs) to clearly communicate the specifications and goals of our AI products. Coordinate with cross-functional teams including product management, engineering, program management, support, and marketing to ensure successful execution of the product roadmap. Evangelize and advocate for our AI solutions, providing customer briefings and promoting the benefits of our technology to drive adoption and customer satisfaction. Collaborate with marketing and enablement teams to drive field and partner enablement initiatives, enabling our sales team and partners to effectively promote and sell our AI solutions. Author, build, and maintain compelling internal and external facing collateral, including presentations, whitepapers, and case studies, in partnership with our outbound teams to showcase the value and capabilities of our AI products. What You Will Bring You should have direct experience or a strong familiarity with the AI/ML product ecosystem. Familiarity with the concerns of customers in the AI/ML solutions space is important. You should have 3+ years of product management experience in enterprise datacenter products, AI/ML, Kubernetes, virtualization, IaaS, cloud computing, or related offerings. A strong understanding of components of enterprise offerings and frameworks is required. Your ability to innovate, build and launch successful products should be demonstrated. Attention to detail is essential in executing complex projects with cross-functional dependencies. A BS or MS in Computer Science or a related field is strongly preferred, while an MBA is considered a plus. Familiarity with industry solutions such as LLM inference, RAG, fine-tuning, serving endpoints, LLM models, Hugging Face, OpenAI, or similar offerings is desired. Work Arrangement Hybrid: This role operates in a hybrid capacity, blending the benefits of remote work with the advantages of in-person collaboration. For most roles, that will mean coming into an office a minimum of 2 - 3 days per week, however certain roles and/or teams may require more frequent in-office presence. Additional team-specific guidance and norms will be provided by your manager. -- Nutanix is an Equal Employment Opportunity and (in the U. S. ) an Affirmative Action employer. Qualified applicants are considered for employment opportunities without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, marital status, protected veteran status, disability status or any other category protected by applicable law. We hire and promote individuals solely on the basis of qualifications for the job to be filled. We strive to foster an inclusive working environment that enables all our Nutants to be themselves and to do great work in a safe and welcoming environment, free of unlawful discrimination, intimidation or harassment. As part of this commitment, we will ensure that persons with disabilities are provided reasonable accommodations. If you need a reasonable accommodation, please let us know by contacting [email protected] .

Lead the core level pre-silicon functional & performance verification for our next -generation IBM POWER processor core systems offering. Understand the IBM Power ISA and micro-architecture of the processor core, understand and enhance the existing unit and core level verification environment. Develop deep understanding of the processor pipeline including Instruction Fetch, Branch Prediction, Dispatch, Load Store and execution units of the high performance processor CPU. Hands on debug for core level fails, propose and implement stimulus enhancements and drive improving the debug capabilities for core testbench environments. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification the Instruction Sequencing Unit for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for ISU which covers the Issue queues, Register Renaming for Out of Order Execution, Issue instructions to Execution Pipelines, Reordering Buffers for completion of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of Instruction Dispatch verification. Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture. Hands on experience of implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling etc. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic units. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Who are we, you ask? Interviews can be hard, especially at top tech companies like Google, Facebook, and Netflix. Many candidates fall short simply because they aren t adequately prepared. That s where we come in. Our acclaimed courses specialize in interview preparation and transitioning into high-demand tech fields such as AI, ML, and Data Science. At Interview Kickstart, current and former hiring managers have guided over 17,000 tech professionals through transformative career journeys, ensuring their success in landing coveted positions. Think of us as the everything store for career transitions and interview skill development. How do we do that, you ask? We have a structured approach to interview success, which includes: Career Accelerator Course Comprehensive end-to-end courses and platform A roster of over 600+ instructors from leading Silicon Valley companies like Google, Facebook, Amazon, and Netflix A holistic approach that includes live classes, mock interviews, personalized coaching, resume refinement, career strategies, and invaluable referrals What s more exciting is - we are completely remote, and we are hiring the best people we can find regardless of geography. Position: Senior Manager - Sales Interview Kickstart is looking for a dynamic and strategic Senior Sales Manager to lead our sales team and drive our business growth. This role requires a proven sales leader with experience in managing high-performing sales teams, defining sales strategies, and achieving sales targets. Key Responsibilities: Develop and execute sales strategies to achieve revenue goals and expand our market presence. Lead, mentor, and manage a team of sales professionals, fostering an environment of high performance and professional growth. Identify new business opportunities and build relationships with potential clients, partners, and stakeholders. Analyze sales metrics and trends to inform decision-making and drive continuous improvement in sales processes. Work closely with marketing to develop and implement outreach strategies that generate leads and support revenue goals. Conduct regular performance reviews and training sessions, providing feedback and coaching to team members. Build and maintain reports for senior management, showcasing team performance, strategies implemented, and future objectives. Join us in our mission to empower candidates with the skills they need to succeed in technical interviews through innovative sales strategies!

Manager/Senior Manager Banking Alliances About us: Cashfree is a leading payments and API banking solutions company. We provide full-stack payments solutions enabling businesses in India to collect payments and make payouts via all available methods with a simple integration. Cashfree s offerings include an advanced and easy way to integrate payment gateway, a split payment solution for marketplaces, bank account verification API and Auto Collect -- a virtual account solution to match inbound payments to customers. Founded by IIIT Hyderabad alumnus Akash Sinha and IIT Kharagpur graduate Reeju Datta, www.cashfree.com is among the leading payment service providers in India processing transactions worth USD 20 Billion annually. We have leveraged technology to lead payment disbursals in India with more than 50% market share among payment processors. Cashfree enables more than 1,00,000 businesses with payment collections, vendor payouts, wage payouts, bulk refunds, expense reimbursements, loyalty and rewards. Apart from India, Cashfree s products are used in eight other countries including USA, Canada and UAE. Cashfree is backed by Silicon Valley investor Y Combinator, Apis Partners, State Bank of India (SBI) and was incubated by PayPal. Cashfree is currently used by over 100,000 businesses for vendor payouts, wage payouts, build refunds, expense reimbursements, loyalty, and rewards. Some of its notable customers include Dunzo, Xiaomi, Tencent, Delhivery, Zomato, Cred, Club Factory, and ExxonMobil. Roles & Responsibilities: Manage Pricing & Profitability charter for all PG product s [ Cards, UPI, NACH, Card EMI, NB] Build AOP & Key initiative plan with Banking & technology partners Leverage relationship with Banking Partners & drive key metrics like Recovery, Dispute management, Pricing Build & grow Business portfolio with Banking Partners Build & establish relationships with the Banks key stakeholders. Collaborate with Finance, Product, Operations & finance team to build best customer centric product experience Role will involve managing the key banking partners, fintechs and issuing focused cobrands/network Drive pre sales,commercial negotiations,agreements, customer delivery; implementation of the said solutions across mapped set of banks/fintechs Required Skills: Business acumen and Customer advocacy: Should be a passionate believer in digital transformation and the use of technology to simplify business processes and improve merchant/ customer experience. High energy team player with willingness to learn and adapt quickly. Business thinking Stakeholder management Program management Soft skills like PPT, Excel & Documentation Good to have: Experience in FinTech / Technology organizations Experience in startup ecosystem or a product/Technology driven organization

At Sentient, we re pioneering the open artificial general intelligence (AGI) frontier, enabling loyalty and monetization of open-source models through cutting-edge research. Our platform is designed to democratize AI development, empowering communities to collaboratively train, control, monetize, and build on top of AI models in a truly open and accessible ecosystem, ensuring fair value distribution to AI builders. Sentient is backed by leading Silicon Valley venture capital firms including Founders Fund and founded by top AI academics and protocol founders. Job Summary Were seeking an exceptional AI Product Data Analyst to join our team in building Sentient Chat, a multi-agent product aiming to compete with leading consumer AI competitors. This role is a unique opportunity to work on end-to-end AI system development, from data analysis to executing on tangible AI feature improvements. The ideal candidate will have a strong focus on data analysis, natural language processing, and understanding of consumer AI performance expectations. Responsibilities Build data pipelines for natural language processing from Sentient Chat logs, analyze feedback, and extract product-level insights Run public and private benchmarks on internal AI sub-systems to assess performance across prototypes and competing products Own and compile custom datasets to define acceptance criteria throughout the product development lifecycle Conduct basic market research to suggest ways to improve AI performance on target metrics Organize scripts and data to present concrete AI failure cases and identify improvement areas Required Qualifications Experience in AI/ML : 2+ years of hands-on experience in data analysis, machine learning, or a related field, with a focus on natural language processing (NLP) and/or generative AI. Technical Skills : Strong proficiency in Python, with experience in libraries such as PyTorch, NumPy, and pandas. Data Analysis : Proven ability to collect, analyze, and interpret large datasets, with experience in data profiling and evaluation. Problem-Solving : Excellent problem-solving and analytical skills, with a proactive approach to challenges and a strong foundation in data science. Ability to derive and answer product-level questions to improve the end-consumer experience. All successful candidates will be contacted within 72 hours.

Roles and Responsibility Job Description Job Position Automation QA AFOUR Technologies ACL Digital Company www.afourtech.com AFour is part of ACL Digital, an ALTEN Group Company, which is a digital product innovation and engineering leader. We help our clients design and build innovative products (AI, Cloud, and Mobile ready), content and commerce-driven platforms, and connected, converged digital experiences for the modern world through a design-led Digital Transformation framework. By integrating our strategic design, engineering, and industry capabilities, we help our clients decode the digital world and accelerate their growth journey. Headquartered in Silicon Valley, ACL Digital is a leader in design-led digital experience, innovation, enterprise modernization, and product engineering services converging to Technology, Media & Telecom. We are a talented workforce and part of the 50,000+ employee ALTEN Group, spread across more than 30 countries, offering a multicultural workplace and a collaborative knowledge environment. In INDIA we have operations in Bangalore, Chennai, Pune, Panjim, Hyderabad, Noida, and Ahmedabad. In the USA, we have offices in California, Atlanta, Philadelphia, and Washington states. Other than the core project we expect you to use your talent and wisdom for regular Asset/IP creation projects, Presales POCs as well as training activities. In addition, we also expect the individuals to gain more knowledge and skills in areas like CI/CT/CD, K8S, AWS/Azure/OpenStack/GCP, AI/ML, SecOps, etc. with the help of resources made available by AFour practices. Teams work on a wide range of design patterns while building applications from small, focused utilities to distributed enterprise scale applications using Mon Monolithic (MVC) design pattern or Polyglot, micro services design pattern. At AFour Technologies you can look forward to working for Software Product Companies (our customers) as their Product Engineering Partners. This provides you with a unique mix of working with products as well as services DNA. Creativity, innovation, flexibility, agility, challenges, and fun come from product mindset predictability, reliability, planning and tracking come from services mindset. Technical skills and competencies Automation Testing: Develop and implement robust automation test scripts for Windows-based desktop applications and web portal applications. Ensure the reliability, scalability, and maintainability of automation frameworks. Programming Proficiency: Utilize Selenium with Python to create efficient and effective automated test scripts. Stay updated on the latest industry trends and best practices in automation testing. Framework Development: Create and maintain automation frameworks tailored to the specific needs of the projects. Implement best practices to enhance the modularity and reusability of the automation codebase. Reporting: Generate detailed test reports, including test execution summaries and defect tracking. Collaborate with cross-functional teams to communicate test results and project status. CI/CD/CT Integration: Integrate automated tests into CI/CD pipelines for efficient and continuous testing. Collaborate with the development team to ensure seamless integration with the development process. Candidate Profile and Competencies Experience: Minimum 3 years of hands-on experience in Automation QA. Application Knowledge: Proficient in automating both Windows-based desktop applications and web portal applications. Programming Languages: Strong proficiency in either Selenium with Python or Selenium with Java. Framework Development: Proven experience in creating automation frameworks from scratch. Reporting: Ability to generate comprehensive test reports and documentation. CI/CD/CT: Familiarity with Continuous Integration (CI), Continuous Deployment (CD), and Continuous Testing (CT) methodologies. Experience 3 - 5 Mode of employment Full Time Work Mode Work from Office Job Location Bangalore

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 4 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

Lead the unit level pre-silicon functional & performance verification of the front end of the pipeline for our next -generation IBM POWER processor core systems offering. Architect and enhance the existing verification environment for Instruction fetch, Branch Prediction and Instruction Decode units of the high performance processor CPU. Develop verification test plan for both functional and performance verification including the estimation for coverage closure. Support higher level core/system simulation environment. Participate in post silicon lab bring-up and validation of the Hardware. Lead , guide ,mentor a team of engineers and represent them at global forums. Thoroughly document verification environment details, providing comprehensive insights for future reference and continuous improvement. Effectively Communicate progress ,potential challenges encountered and milestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise 8 years or more experience in functional verification of processors, demonstrating a deep understanding of core units (eg. I-Cache, Instruction Fetch, Branch Prediction, Instruction Decode) Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying frontend pipeline units of any CPU architecture. Hands on experience of Branch Prediction techniques. Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA Experience with high frequency, instruction pipeline designs At least 1 generation of Processor Core silicon bring up experience In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs) Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design Proficiency in C++, Python scripting or similar object oriented programming languages. Preferred technical and professional experience Knowledge of instruction dispatch and Arithmetic unit. Knowledge of test generation tools and working with ISA reference model. Experience with translating ISA specifications to testplan. Knowledge of verification principles and coverage. Understanding of Agile development processes. Experience with DevOps design methodologies and tools.

We are seeking highly motivated DFT engineer to be part of Hardware team. Join a great team of engineering professionals who are involved in development, validation, and delivery of DFT patterns for IBM’s microprocessor chip design team. As a member of functional DFT team ( Power on Reset, Architecture Verification Program, Array BIST teams ), you will be required but not restricted to pattern generation, simulation, validation, characterization, delivery to TAE, IBM’s Hardware Bring-up and Silicon Debug Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5-9 years experience in DFT on complex designs involving scan insertion, compression, MBIST, ATPG, simulations and IP integration and validation.Proven expertise in analysing and resolving DRCs/TSVs .Hands-on experience in pattern generation for various fault models, pattern retargeting and debugging techniques to address low coverage issues.Hands-on experience with Gate-Level DFT verification, both with and without timing annotations.Well versed with industry standard test techniques and advanced DFT features like SSN, IJTAG, IEEE 1500, Boundary scan , LBIST and STA constraint delivery .Hands on experience on industry standard tools used for DFT featuresProficiency in scripting languages such as TCL, Perl or Python to automate design and testing tasks.Worked with cross functional teams like design, STA & tester teams for ensuring top quality of DFT deliverables and DFT support and hand offs.Excellent analytical and problem-solving skills, with a keen attention to detail.Strong communication and collaboration skills, with the ability to work effectively within cross-functional teams Fundamentals in micro controller architecture, embedded firmware, functional verification and RTL design * Experience working with ATE engineers for silicon bring up, silicon debug and validation. * Experience in processor flow and post silicon validation Preferred technical and professional experience Hiring manager and Recruiter should collaborate to create the relevant verbiage.

We're hiring a Product Manager to join our Parts Product team and help expand our wholesale parts and parts inventory management capabilities. As a product owner, you'll partner with cross-functional teams to deliver scalable solutions that address the unique operational needs of automotive dealerships. we're looking for someone with experience in B2B SaaS products, ideally in inventory, order management and wholesale/distribution systems. The right candidate is customer-obsessed, learns fast, takes ownership, and is energized by solving complex business problems in partnership with engineers, designers, and operations leaders. Key Responsibilities Drive product development for key features within the Parts Management module, with a focus on wholesale workflows and inventory operations. Collaborate with senior product leaders to shape the product roadmap and translate customer pain points into actionable requirements and user stories. Conduct discovery with dealership users, field teams, and implementation specialists to understand current gaps and opportunities for improvement. Use a data-driven approach to define success metrics, prioritize enhancements, and guide decisions that create measurable business impact. Ensure smooth execution by working closely with engineering, QA, and design teams during development, testing, and release. Help build scalable, intuitive experiences that support high-volume B2B parts transactions and multi-location inventory operations. Champion responsiveness and clarity in communication, especially when supporting implementation teams or handling customer escalations. Stay informed on trends in wholesale distribution, parts logistics, and automotive SaaS to inform product strategy. Skills and Experience You have 3-5 years of experience in product management , program management , business analysis , or implementation roles within B2B SaaS , preferably in supply chain, logistics, inventory, or commerce platforms. You understand the nuances of wholesale distribution , parts/inventory management , or similar operational domains. you're a fast learner with a strong customer mindset, who thrives in a dynamic, high-growth environment. You communicate clearly and work effectively across technical and business teams. you're accountable, curious, and proactive always looking to understand the why behind user needs and business goals. Bonus points if you've worked with automative dealership systems, ERP tools, or order fulfillment platforms. Perks and Benefits Competitive compensation Generous stock options Medical Insurance coverage Work with some ofthe brightestmindsfrom Silicon Valley s most dominant and successful Companies

locationsIndia, Bangalore time typeFull time posted onPosted 17 Days Ago job requisition idJR0274344 Job Details: About The Role : Performs functional logic verification of an integrated SoC to ensure design will meet specifications.Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to micro-architecture specifications.Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.Replicates, root causes, and debugs issues in the pre-silicon environment.Finds and implements corrective measures to resolve failing tests.Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, post silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.Maintains and improves existing functional verification infrastructure and methodology.Absorbs learning from post silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products. Qualifications: Minimum Qualifications:BS with 10+ years/MS with 8+ years industry experiencesExperience on Pre-Si validation on Emulation, preferably Zebu.Experience on validation at MCP.Experience with pre-Si verification with System Verilog OVM/UVM on content development Scripting languages such as Python, Simics.Good understanding of RTL, Verilog, VHDL.Preferred Qualifications:Experience with Synopsys simulation and coverage tools.Assertion based verificationRequirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intels transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *

locationsIndia, Bangalore time typeFull time posted onPosted 9 Days Ago job requisition idJR0274850 Job Details: About The Role : We are looking for Senior DFT Design Engineers to join our team who are ready to make significant impacts in graphics and visual computing. As a member of the GHI DFT group, you will be responsible for one or more of the following activities: You will work on the design, RTL/GLS validation, automation, and/or timing analysis for Scan/ATPG and/or DFT/JTAG controller You will also contribute or be involved with trace/pattern generation efforts as well as post-silicon enabling, debug support, and/or analysis of the DFx features/content types you are responsible for. Develops the logic design, register transfer level (RTL) coding, and simulation for graphics IPs (including graphics, compute, display, and media) required to generate cell libraries, functional units, and the GPU IP block for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification, and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure high-quality integration of the GPU block. Qualifications: The ideal candidate will exhibit the following traits/skills: Excellent written and verbal communication skills Demonstrate Leadership ability in driving execution Demonstrate teamwork, problem solving and influencing skills Ability to work with different geographical locations Minimum Qualifications: Bachelors in Electrical/Computer Engineering or related field with 9+ years of experience. Or a Masters in the same fields with 7+ Years of academic or industry experience. Your experience should be in following At least one of the key DFT features such as TAP/JTAG, Scan/ATPG or Array DFT (MBIST/PBIST) (This is a key skill requirement.) SoC or IP DFT design, integration or verification EDA tools such as ATPG tools, Siemens Tessent shell, VCS simulation and/or debug tools. Preferred Qualifications: Silicon enabling debug or test pattern development experience Design automation skills and proficiency in programming or scripting languages Structural design flows, including timing, routing, placement or clocking analysis High volume manufacturing requirements and test flows 3D, media and display graphics pipelines SoC architecture Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations: Business group: The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. *