925 Silicon Jobs - Page 4

Who We Are Simpplr is the AI-powered platform that unifies the digital workplace bringing together engagement, enablement, and services to transform the employee experience. It streamlines communication, simplifies interactions, automates workflows, and elevates the everyday experience of work. The platform is intuitive, highly extensible, and built to integrate seamlessly with your existing technology. More than 1,000 leading organizations including AAA, the NHS, Penske, and Moderna trust Simpplr to foster a more aligned and productive workforce. Headquartered in Silicon Valley with global offices, Simpplr is backed by Norwest Ventures, Sapphire Ventures, Salesforce Ventures, and Tola Capit...

Project description We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way. Responsibilities Contribute to the design, development, and...

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Job Description Job Purpose Performing Obsolescence task in line with organization needs & contribute on reverse engineering activity for electronics part Key Responsibilities He / she is responsible for proactively identifying, evaluating, and mitigating risks associated with the obsolescence of components within a company s products or systems. Their role is critical in ensuring the sustained operability and support of existing products while strategically managing the transition to updated components or designs as needed. Also shall be aware about how to read PCB ckt & suggest alternative Qualifications, Experience & skills Mandatory skills & competencies: Education: BE Electrical / Elect...

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing ...

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Implementing RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Gr...

AMD seeks a passionate, collaborative leader with strong technical skills and the initiative to motivate an expert team. You will manage aSilicon Engineeringgroup and innovate with internal teams and external partners to create the next generation of computing technologies. THE PERSON: The ideal candidate has experience leading others in technical and managerial settings. You also have excellent communication, writing, and presentation skills. KEY RESPONSIBILITIES: ASIC design verification experience 12+ years Verification of high performance x86-core ISA features Architecting and development of testbench, test-bench components for high performance Cache, x86 ISA features, clock/reset/power ...

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: Define product features and capabilities, close architecture, and micro-architecture requirements, drive technical specifications for SoC and IP blocks to meet those requirements, and provide technical direction to execution teams Comprehend the SOC as a complete system which includes HW (Silicon), FW, BIOS SW and ensure that FW, BIOS SW are align...

We are looking for a React Native Developer to join our fast-paced, agile R&D environment, contributing to the development of talent management platforms. You will collaborate closely with cross-functional teams - including ML/AI Engineers, product managers, and UX designers - to create end-to-end solutions that seamlessly integrate front-end interfaces with robust back-end architectures. This role requires a balance of technical proficiency, creative problem-solving, and the ability to iterate rapidly with minimal bureaucracy. You Will Own React Native, Cross-Platform Application Development Build beautiful B2B mobile applications Collaborate with designers to implement intuitive UI/UX feat...

We are seeking an experienced and highly skilled Senior SOC Design for Test Engineer with aminimum of 5 years of hands-on experience in SOC Design for Test. As a key member of our team, you will play a pivotal role in ensuring the testability, manufacturability, and quality of our cutting-edge System on Chip designs Key Responsibilities Lead and manage SOC Design for Test efforts for complex projects, ensuring the successful execution coverage, manufacturability, and quality plans. Develop full chip and block level DFT implementation from the DFx Specifications and product coverage, quality, and manufacturability goals. Define and implement Test controllers at top level and block level, fuse...

Define and drive netlist-level power estimation methodologies using industry-leading tools (e.g., Synopsys PrimeTime PX, Cadence Voltus). Establish and maintain correlation frameworks between RTL and gate-level power, and between estimated and silicon power. Develop automated flows for toggling activity generation, vector-based and vectorless power estimation, and regression reporting. Analyze power consumption trends and identify hotspots; provide recommendations for low-power design optimization. Collaborate with RTL design, physical design, DFT, and architecture teams to ensure early and accurate power signoff. Lead methodology development for corner analysis, dynamic/static power separat...

Design, develop, and maintain embedded software components for the Matter protocol stack. Lead technical initiatives and guide the team in solving complex engineering challenges. Mentor junior engineers, conduct code reviews, and foster a culture of continuous learning and improvement. Collaborate with cross-functional teams to integrate Matter with Wi-Fi and Thread-based platforms. Perform hands-on debugging using industry-standard tools (e.g., JTAG, GDB, Logic Analyzers). Optimize performance and reliability of embedded systems in resource-constrained environments. Contribute to protocol compliance, certification, and interoperability testing. Participate in architecture discussions and te...

In your new role you will: Develop and implement Design for Test (DFT) methodologies for IoT products. Collaborate with design and backend teams to integrate DFT features . Create and validate test plans to ensure thorough coverage and fault detection. Support silicon bring-up and debug activities. Automate test processes such as ATPG/MBIST to enhance efficiency and accuracy. Test coverage analysis and improve test coverage to sign-off IJTAG cores, SoC. Your Profile You are best equipped for this task if you have: Bachelors in Electrical & Electronics/ECE or master s degree in VLSI. 4+ years of experience in DFT, ASIC design. Experience with DFT tools such as Tessent, Genus and Validation wi...

Design and lead high speed IP (USB3, PCIE, DPHY etc) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development analog design, layout, digital design, documentation and silicon validation. Would be required to participate in customer facing discussions. Requirements B.Tech/BE/ME/Mtech or Equivalent Exp - 2 +yrs- 5 years or Equivalent Hands on design experience in various analog IP like PLLs, data converters, serial interfaces etc. Must have participated in full cycles of analog IP creation right from spec to silicon debug and char Must have good communication skills and should be team player. Working experience in P...

B.Tech/BE/ME/Mtech Job Description Design and lead high speed IP (USB3, PCIE, DPHY etc) development. Need to be a strong individual contributor in analog domain. Will be required to participate in all aspects of development analog design, layout, digital design, documentation and silicon validation. Would be required to participate in customer facing discussions. Requirements B.Tech/BE/ME/Mtech Exp - 5 +yrs Hands on design experience in various analog IP like PLLs, data converters, serial interfaces etc. Must have participated in full cycles of analog IP creation right from spec to silicon debug and char Must have good communication skills and should be team player. Working experience in PHY...

Responsibilities include: In this position the individual will be responsible for designing, modifying and evaluating CMOS circuit structures for the most advanced high-performance low-power 3-dimensional NAND flash memory Verify designs in simulation and interact with layout, logic and other functional groups for implementation, full chip integration and silicon validation. Evaluation of these circuits will be done through FINESIM and VERILOG simulations. Collaborate with characterization engineers to fully characterize silicon, and partner with other designers to develop solutions for silicon issues Responsible for full chip silicon evaluation through probing. Interact with Memory Device t...

Job Title: Sr Staff DFT Engineer Job Location: Bangalore, India ( This position requires a full-time, on-site presence in our Bangalore, India office ) Job ID: AI2435 Key Responsibilities: Block-level and sub-system DFT micro-architecture including SCAN, MBIST, IP tests, JTAG Develop and execute test insertion flow for scan, MBIST, JTAG Estimate and achieve targeted test coverage. Run RTL and gate-level simulation for all DFT modes. Develop and debug timing constraints for all DFT modes. Verify test patterns pre-silicon and post-silicon Write scripts in TCL and Perl to achieve productivity enhancements through automation. Required Background: BSEE/MSEE or equivalent degree with 7+ years of e...

Description Job Title: Sr Staff DFT Engineer Job Location: Bangalore, India ( This position requires a full-time, on-site presence in our Bangalore, India office ) Job ID: AI2435 Key Responsibilities: Block-level and sub-system DFT micro-architecture including SCAN, MBIST, IP tests, JTAG Develop and execute test insertion flow for scan, MBIST, JTAG Estimate and achieve targeted test coverage. Run RTL and gate-level simulation for all DFT modes. Develop and debug timing constraints for all DFT modes. Verify test patterns pre-silicon and post-silicon Write scripts in TCL and Perl to achieve productivity enhancements through automation. Required Background: BSEE/MSEE or equivalent degree with 7...

Description Job Title: Principal DFT Engineer Job Location: Bangalore, India ( This position requires a full-time, on-site presence in our Bangalore, India office ) Job ID: AI2436 Key Responsibilities: Block-level, Sub-system, and SOC DFT architecture and methodology definition including SCAN, MBIST, IP tests, JTAG. Lead DFT architecture and implementation for different sub-systems and full-chip. Develop test insertion flow for scan, MBIST, JTAG. Estimate and achieve targeted test coverage and ATE test time. Develop timing constraints for all DFT modes. Drive pre and post silicon test patterns validation and bringup. Write scripts in TCL and Perl to achieve productivity enhancements through ...

Job Title: Principal DFT Engineer Job Location: Bangalore, India ( This position requires a full-time, on-site presence in our Bangalore, India office ) Job ID: AI2436 Key Responsibilities: Block-level, Sub-system, and SOC DFT architecture and methodology definition including SCAN, MBIST, IP tests, JTAG. Lead DFT architecture and implementation for different sub-systems and full-chip. Develop test insertion flow for scan, MBIST, JTAG. Estimate and achieve targeted test coverage and ATE test time. Develop timing constraints for all DFT modes. Drive pre and post silicon test patterns validation and bringup. Write scripts in TCL and Perl to achieve productivity enhancements through automation. ...

1. Front-End Development Build responsive, user-friendly interfaces using modern JavaScript frameworks (React, Vue, etc.) Collaborate with designers to implement intuitive UI/UX features and ensure consistent brand/application look and feel Optimize web pages for performance, accessibility, and cross-browser compatibility 2. Back-End Development Develop RESTful or GraphQL APIs using Node.js, Python, PHP, or similar back-end technologies Design and maintain databases (SQL or NoSQL) to ensure efficient data storage, retrieval, and scalability Work with AI/ML teams to integrate model outputs, leveraging microservices or serverless architectures as needed 3. Integration & Collaboration Implement...

Handle silicon wafers during the photovoltaic cellmanufacturing process, including cutting, cleaning, and quality inspection . Operate and monitor automated machines on theproduction line. Ensure strict adherence to safety protocols and clean-room standards . Maintain accurate process logs, production reports,and quality check records. Assist in troubleshooting equipment issues andcoordinate with engineers for preventive maintenance. Meet daily production and quality targets whilemaintaining efficiency and minimal wastage.

Physical Design Lead, Manager Job Description The Physical Design Manager leads and mentors teams responsible for designing and delivering customer-specific silicon solutions based on detailed requirements. This role drives the creation of custom integrated circuits (ICs) and oversees building a solid re-use methodology, enabling fast turnaround through physical design flows and ensuring project efficiency, quality, and innovation. Key Responsibilities Manage and mentor a team of physical design engineers, overseeing project schedules, resource allocation, and team performance. Lead all phases of the physical design process, including synthesis, floor planning, placement, clock tree synthesi...

The candidate will support Western Digital Memory Design teams, working on characterization test planning, development, execution and data analysis for all of 3D NAND Memory Die. In addition the ideal candidate will develop test programs on state-of-the-art engineering memory test systems Advantest T58XX, Teradyne EV Series and assist in high-speed load board design. RESPONSIBLITIES Responsible for defining and tracking characterization test plans through 3D NAND memory development cycles from first silicon through internal qualification and mass production. Define characterization test methodology and write characterization test programs on Memory ATE (Automated Test Equipment) Teradyne and...

Job Description Need to work in collaboration with global design teams across sites. Will be responsible for driving innovation in Analog IP designs. Responsible for design of IPs like Switched capacitor circuits , Voltage regulators, LDO, Current and Voltage reference, High Voltage charge pumps, temperature sensors, oscillators etc using industry standard EDA tools. Should provide technical leadership and mentor junior engineers. Responsible for developing processes and robust design methodology. Help build overall competency in Analog domain. Qualifications Bachelors/ Masters degree in Electrical/ Electronics Engineering with 8+ years of experience in Analog Circuit Design across different...