636 Silicon Jobs - Page 16

Manage day-to-day production activities for rubber and silicone molding (LSR, HCR, or thermoset rubber). Monitor machine efficiency Supervise operations on injection/compression/transfer molding presses for rubber or silicone products.

The FlashBlade team builds the industry s most innovative, high-performance, and highly available portfolio of products that are designed for the most demanding mission critical applications. While we'deliver a hardware storage array, over 90% of our engineering staff are software engineers. Our customers are the most important part of our business and they love FlashBlade for its simplicity of management, the constant flow of new and exciting upgrades, and ability to live on the cutting edge of technology while never taking downtime, ever. FlashBlade enables our customers to leverage the agility of the public cloud for both traditional IT and cloud-native applications WHAT YOU AND YOUR TEAM WILL BE DOING Full life cycle software development from architecture through development, release and maintenance. Requirements analysis and specification. Integration with existing infrastructure, and cross-team development to support new features and capabilities. Contributing to the architectural evolution of the FlashBlade Networking product area Designing, coding, and debugging systems in C and Python Support, maintain, and document software functionality WHAT you'll NEED TO BRING TO THIS ROLE... You will have proven ability and the desire to work in a collaborative and team oriented environment. Significant domain knowledge of Networking stack. Strong problem solving and debugging skills. Strong algorithmic and coding skills. Natural curiosity and the ability to design, implement, and test your product components while thriving in a highly collaborative and team oriented environment. Experience in systems development to include; IPv4 and IPv6 networking protocols, API design, distributed systems and/or device drivers. Familiarity with modern switch silicon packet processing and features like ECMP, QoS, Packet filtering etc 3+ years of experience working with remote teams at a product company. 4-7+ years experience developing on Linux or other *NIX variant at a product company. bachelors or higher in Computer Science, Computer Engineering, or Electrical Engineering. Linux Kernel or device driver experience. Storage experience is desirable but not necessary. You love technology, working with talented people and have a passion to build cool new products. You are flexible, accountable and have excellent communication skills. You value soft skills and are enterprising, thoughtful, and self-motivated. You thrive in a globally distributed team through self-discipline and self-motivation WHAT YOU CAN EXPECT FROM US: Pure Innovation : We celebrate those who think critically, like a challenge and aspire to be trailblazers. Pure Growth : We give you the space and support to grow along with us and to contribute to something meaningful. We have been Named Fortunes Best Large Workplaces in the Bay Area , Fortunes Best Workplaces for Millennials and certified as a Great Place to Work ! Pure Team : We build each other up and set aside ego for the greater good

Where youll be doing Assist enterprise account executives with pre-demo research, tracking deal progress, and supporting proposal preparation. Regularly engage prospects with relevant content and follow-ups to move deals forward. Conduct outreach to multiple decision-makers within accounts to multithread deals. Document all prospect interactions and activities in the CRM (HubSpot) with detailed notes to ensure accurate pipeline tracking and team visibility. Skills that make you a great fit Excellent verbal and written communication skills. Strong analytical skills and proficiency with Excel/Google Sheets. Leverages ChatGPT and other AI tools to increase productivity. Comfortable talking to senior decision makers. Highly organized and detail oriented. Good understanding of AI and tech products. Logistics Stipend: 20K per month Joining: ASAP! Location: Noida/Mumbai Why should you consider us seriously We believe that long-term, people over product and profits, prioritize culture over everything else. See Glassdoor reviews. We are a well-balanced team of experienced entrepreneurs and are backed by top investors across India and Silicon Valley (Chiratae Ventures, Blume Ventures, Abstract Ventures, Emergent Ventures; Senior execs at Google, Square, Genpact Flipkart; Co-founders of Infosys, Snapdeal, Slideshare, Zomato, etc.) Freedom and Responsibility Entrepreneurial Team Exponential Growth Healthcare (Physical Mental Wellness) Please Note: SquadStack is committed to a diverse and inclusive workplace. SquadStack is an equal opportunity employer and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status

MS or Ph D with a major in EE or Physics related field Solid background in analog CMOS circuit design Proficient with Cadence design environment and mixed-signal simulation Able to assume responsibility for a variety of technical tasks and to work independently (recommended) Digital communication system, digital signal processing, digital system design, RF system, MATLAB Architecture study and evaluation of advanced SerDes topologies SerDes design and verification of different high speed analog and mixed signal blocks including, but not limited to: drivers, front end circuits, samplers, comparators, ADCs, DACs, PLLs, clock distribution, etc Evaluate, measure, and debug silicon until it reaches high volume production Work with cross functional teams to optimize the designs

Senior Test Automation, Pipelines and Site Reliability Engineer, Priceless Platform, Pune, India Overview Come talk to us, if you are interested in scaling an AWS based global platform, and if you are a fantastic SRE or Test Automation engineer with experience in testing distributed platforms running at planet scale and ensuring that the platform and infrastructure is reliable. If you enjoy working in a high-growth, fast-paced startup like organization within Mastercard, we want to talk to you. The Priceless Platform was created by a Silicon Valley startup that Mastercard acquired. We are experiencing significant growth, and we are looking for seasoned engineers in Pune, India, with experience and passion scaling an AWS cloud and cloud native platform. An e-commerce like workflow platform, Priceless Platform is Mastercard s premium B2B2C platform. It delivers experiences and benefits to banks and partners globally, for their customers. Even after becoming part of Mastercard, we continue to run at high velocity, and drive impact. Our portfolio is expanding significantly, and we need to flawlessly execute to grow the business, while also designing and building for scale. The Role We are looking for engineers experienced and truly passionate about Automation, Reliability at scale, and CI / CD pipelines to rapidly find quality issues. As a Senior Test Automation and Pipelines Engineer, you will work on projects to enable reliability, security, and velocity on our Priceless Platform. You will work on automation practices like functional automation, scale and load testing, performance testing, chaos engineering, etc. Partnering with other Quality Engineers, you will write automated tests and shape them. Collaborating with platform engineers, you will ensure that our automation functions smoothly on automation and ephemerally built platforms. As part of the team, you will help build frameworks to integrate automated testing into CI/CD pipelines across multiple languages and frameworks. With your technical expertise, you will help promote a culture of site reliability, test automation, shared ownership, and transparency. An effective communicator, you will work cross-functionally to translate business requirements and engineering designs into test strategy and test cases and finally automate them. As we rapidly expand our portfolio, your principles and disciplined approach will help us scale without sacrificing quality. This is an opportunity to join a collaborative, innovative engineering culture and make an impact by working on some of our most mission-critical initiatives. We want engineers who can raise our bar for technical and cultural excellence. You will focus on the areas of test automation, CI/CD pipeline integration, and ensuring quality of our production platform. This role is based out of our Mastercard location in Pune, India. Responsibilities Hands on implementor - in test automation, performance testing, functional automation, test data management. As well as infrastructure automation Collaborate with test automation engineers, exemplifying technical expertise and fostering a culture of excellence through knowledge sharing and mentorship. Help create a culture of site reliability, shared ownership, and automation across the organization. Participate in technical design reviews and code quality processes focused on reliability, security, and testability. Participate in Reliability practices like chaos engineering, progressive rollout, and DevOps collaboration to bolster resilience. Architect monitoring, logging, and alerting to provide end-to-end observability. Tune performance and scalability via load testing, capacity planning, and architectural improvements. Develop playbooks for incident response, disaster recovery, and post-mortem analyses. Participate in building and enhancing test automation frameworks, test harnesses, and CI/CD integration for comprehensive test coverage. Be a part of on-call support for critical production systems on a rotating basis. Continuously improve SRE and test automation through emerging technologies and methodologies. Manage test environments, data, and infrastructure to enable comprehensive testing. Your background and experience You have been working as an engineer for 5+ years, in Test Automation, SRE or DevOps A track record of delivering complex automation in fast-paced environments. Proven and enthusiastic Cloud/AWS Engineering technical experience Experience taking part in leading code reviews, refactoring, gathering code quality metrics. Effective communication skills, both verbal and written, with strong relationship, collaborative, and organization skills. Experience with software development productivity metrics (e.g., code churn, commit size, test coverage,) and help to continuously improve code velocity, quality, and release frequency. Proficiency in test automation tools and frameworks (e.g. Playwright, Selenium WebDriver, Appium, TestNG, Junit, Cucumber etc) Solid understanding of software testing methodologies, principles, and best practices. Experience with continuous integration and delivery (CI/CD) pipelines, version control systems (e.g., Git) and build tools (e.g., Jenkins, TeamCity). Knowledge of software development lifecycle (SDLC) and agile methodologies. Familiarity with relational databases and ability to write SQL queries for data validation. Excellent problem-solving and analytical skills with keen attention to detail. Self-motivated and able to work independently as well as in a team environment. Certifications in software testing (e.g., ISTQB, CETPA, CSTE) and/or test automation tools/frameworks would be a plus. Education: Bachelor or Master s Degree in Computer Science or equivalent

Do you have a passion for invention and self-challengeDo you thrive on pushing the limits of what s considered feasibleAs part of an extraordinary modem team, you ll craft sophisticated leading-edge embedded firmware that deliver more performance in our products than ever before. You ll work across subject areas to transform improved hardware elements into a single, integrated design. Join us, and you ll help us innovate new wireless systems technologies that continually outperform the previous iterations! By collaborating with other product development groups across Apple, you ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world!As a Cellular 5G/4G Firmware Verification Engineer, you will be at the center of the embedded 5G/4G multimode cellular firmware effort within a silicon design group responsible for crafting and productizing state-of-the-art cellular SoCs. This position requires someone comfortable with all aspects of embedded firmware verification, that thrives in a dynamic multi-functional organization, is not afraid to debate ideas openly, and is flexible enough to pivot on constantly evolving requirements. Description We work with a team of component validation, integration, protocol test engineers, firmware developers and system engineers to create firmware verification test cases and end to end physical layer performance - Design and develop validation frameworks for the 4G/5G firmware. Also, design, develop, and execute test cases for the 4G/5G firmware and debug and analyze issues found during the testing - Create test automation of 4G/5G UEs, test simulators and test gNodeBs.Verify key protocol, signal processing and numerical algorithms with very tight time, latency and energy budgets. Work with Systems / Firmware teams to perform validation of new and existing features.We are looking for candidates who can assist in the development of pre-silicon emulation systems/virtual platforms and use them for pre-silicon firmware design and HW verification. Also, evaluate and implement cutting edge tools for build, formal verification and test. In-depth understanding of 5G and 4G 3GPP physical layer and protocol stack procedures and configurations Experience with firmware test case planning, design, and development for the 4G/5G functional and performance scenarios Strong understanding of automation tools and scripting languages, such as Python, C/C++, Java (a plus) Solid understanding of multiple 4G/5G signalling and physical layer test equipment (Keysight/Anritsu/RS) along with their automation interfaces Preferred Qualifications Bachelors degree in Electrical Engineering, Computer Science or related experience is required Strong analysis and debugging capabilities to be able to define issues and work with firmware development and systems design teams to close these issues Deep understanding of software engineering principles, and core computer science fundamentals Fundamental facility with build and source code control tools Versatile to learn new architecture, frameworks and experience with network emulators, silicon prototyping, emulation systems, and virtual platforms a plus

Are you looking for a unique opportunity to be a part of something greatWant to join a 20,000-member team that works on the technology that powers the world around usLooking for an atmosphere of trust, empowerment, respect, diversity, and communicationHow about an opportunity to own a piece of a multi-billion dollar (with a B!) global organizationWe offer all that and more at Microchip Technology, Inc. People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values ; we affectionately refer to it as the Aggregate System and it s won us countless awards for diversity and workplace excellence. Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you. Visit our careers page to see what exciting opportunities and company perks await! Job Description: Microchip AES Design team in Bangalore is looking for an experienced and motivated Design-For-Test Senior Engineer to provide test hardware solution for various microchip B usiness units. As a member of test development team, you will be responsible for understanding the existing DFT test structures and clock strategy used across multiple business units and provide architectural improvements to improve test coverage . The candidate should have experience with ATPG and MBIST. The candidate should have in depth knowledge of Tessent /Modus tool execution. Requirements/Qualifications: Qualified applicants will possess the following skills / experience: Hands on expertise on handling DFT on hierarchical designs. Hands on expertise on Tessent /Modus ATPG tool for DFT setup and pattern generations. Hands on expertise on Tessent /Modus MBIST tool for MBIST hardware generation. Hands on expertise on Tessent /Modus diagnosis tool for on-silicon debug. Hands on expertise SCAN pattern simulations and debug. ATPG with the pattern delivery to the test engineering team . Sound knowledge of Scan Stitching, Scan Compression, MBIST JTAG Techniques . Should have good post silicon DFT bring-up and debug experience . Should have a good knowledge in simulation debug and prior experience at SoC level . Excellent written and verbal communication skills. Self-motivated team player with strong problem-solving skills to collaborate with various teams to achieve desired goals. Experience: Bachelors/Masters in Electronics or equivalent degree with 7 + years of experience Travel Time: 0% - 25% To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

Masters graduate or PhD in a closely related fieldMinimum 5 years relevant industrial experienceProven track record of delivering high performance CMOS RF transceivers to mass productionExcellent knowledge of RF system analysis and able to work effectively with RF System and Application Engineers to define the specification Experience with design in advanced CMOS technologies (16nm or below)Strong analytical skills Excellent grasp of the integration challenges of complex RF systems-on-a-chip (SoCs) Expertise in RF IC layout optimization in advanced CMOS technologies and be able to provide effective supervision for layout implementation An innovative thinker with a passion for challenging technical problem solving A strong team player able to collaborate on complex projects as well as successfully working independently Able to communicate effectively with people across different timezones and culturesExcellent time management and organisation skills Your responsibilities will include the specification, architecture design, circuit design, implementation and verification of complete sub-systems for 5G RF ICs Your focus will be on developing innovative signal path or synthesizer designs with leading edge performance and excellent results on first silicon

Role: Senior Manager, IO Design Memory Technology Competencies: Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design) Extensive Hands-on design experience in IO Design(LVCMOS, HVCMOS, DDR, LVDS) 15+ years of Experience on handling IO designs, projects working with BU, Stake holders NAND Flash Design knowledge is plus Expertise in ESD, Powerbus, Floor plan, Layout guidelines Expertise, knowledge of advanced DDR algorithms : Training modes and DFE/CTLE/Compensation Techniques, Clock skew techniques Management and Lead experience to handle Team of IO engineers Experience in working with cross geo, cross team functions and stake holder management Expertise with package/board/Power integrity /signal integrity constraints is a plus. Strong communication skills & circuit design knowledge is preferred. Tool knowledge: spice tools: finesim, hspice & other flows Good to have: Lead team of experienced IO Design Engineers Strategic development of next generation IO for scaling speed Build Best in Class IP Design Handling BU communication on all IO Roadmap, RMA, FA Drive E/E IO Design capability and execution till Silicon to Productization Qualifications B.TECH/M.TECH in Electrical / Electronics / VLSI / Microelectronics with 15+ years of experience

Title: Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM) About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Circuit design, simulation, and characterization of full custom circuits Functional simulations and statistical analysis Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 6-8 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

Our Purpose Title and Summary Senior Test Automation, Pipelines and Site Reliability Engineer, Priceless Platform, Pune, India Overview Come talk to us, if you are interested in scaling an AWS based global platform, and if you are a fantastic SRE or Test Automation engineer with experience in testing distributed platforms running at planet scale and ensuring that the platform and infrastructure is reliable. If you enjoy working in a high-growth, fast-paced startup like organization within Mastercard, we want to talk to you. The Priceless Platform was created by a Silicon Valley startup that Mastercard acquired. We are experiencing significant growth, and we are looking for seasoned engineers in Pune, India, with experience and passion scaling an AWS cloud and cloud native platform. An e-commerce like workflow platform, Priceless Platform is Mastercard s premium B2B2C platform. It delivers experiences and benefits to banks and partners globally, for their customers. Even after becoming part of Mastercard, we continue to run at high velocity, and drive impact. Our portfolio is expanding significantly, and we need to flawlessly execute to grow the business, while also designing and building for scale. The Role We are looking for engineers experienced and truly passionate about Automation, Reliability at scale, and CI / CD pipelines to rapidly find quality issues. As a Senior Test Automation and Pipelines Engineer, you will work on projects to enable reliability, security, and velocity on our Priceless Platform. You will work on automation practices like functional automation, scale and load testing, performance testing, chaos engineering, etc. Partnering with other Quality Engineers, you will write automated tests and shape them. Collaborating with platform engineers, you will ensure that our automation functions smoothly on automation and ephemerally built platforms. As part of the team, you will help build frameworks to integrate automated testing into CI/CD pipelines across multiple languages and frameworks. With your technical expertise, you will help promote a culture of site reliability, test automation, shared ownership, and transparency. An effective communicator, you will work cross-functionally to translate business requirements and engineering designs into test strategy and test cases and finally automate them. As we rapidly expand our portfolio, your principles and disciplined approach will help us scale without sacrificing quality. This is an opportunity to join a collaborative, innovative engineering culture and make an impact by working on some of our most mission-critical initiatives. We want engineers who can raise our bar for technical and cultural excellence. You will focus on the areas of test automation, CI/CD pipeline integration, and ensuring quality of our production platform. This role is based out of our Mastercard location in Pune, India. Responsibilities Hands on implementor - in test automation, performance testing, functional automation, test data management. As well as infrastructure automation Collaborate with test automation engineers, exemplifying technical expertise and fostering a culture of excellence through knowledge sharing and mentorship. Help create a culture of site reliability, shared ownership, and automation across the organization. Participate in technical design reviews and code quality processes focused on reliability, security, and testability. Participate in Reliability practices like chaos engineering, progressive rollout, and DevOps collaboration to bolster resilience. Architect monitoring, logging, and alerting to provide end-to-end observability. Tune performance and scalability via load testing, capacity planning, and architectural improvements. Develop playbooks for incident response, disaster recovery, and post-mortem analyses. Participate in building and enhancing test automation frameworks, test harnesses, and CI/CD integration for comprehensive test coverage. Be a part of on-call support for critical production systems on a rotating basis. Continuously improve SRE and test automation through emerging technologies and methodologies. Manage test environments, data, and infrastructure to enable comprehensive testing. Your background and experience You have been working as an engineer for 5+ years, in Test Automation, SRE or DevOps A track record of delivering complex automation in fast-paced environments. Proven and enthusiastic Cloud/AWS Engineering technical experience Experience taking part in & leading code reviews, refactoring, gathering code quality metrics. Effective communication skills, both verbal and written, with strong relationship, collaborative, and organization skills. Experience with software development productivity metrics (e.g., code churn, commit size, test coverage,) and help to continuously improve code velocity, quality, and release frequency. Proficiency in test automation tools and frameworks (e.g. Playwright, Selenium WebDriver, Appium, TestNG, Junit, Cucumber etc) Solid understanding of software testing methodologies, principles, and best practices. Experience with continuous integration and delivery (CI/CD) pipelines, version control systems (e.g., Git) and build tools (e.g., Jenkins, TeamCity). Knowledge of software development lifecycle (SDLC) and agile methodologies. Familiarity with relational databases and ability to write SQL queries for data validation. Excellent problem-solving and analytical skills with keen attention to detail. Self-motivated and able to work independently as well as in a team environment. Certifications in software testing (e.g., ISTQB, CETPA, CSTE) and/or test automation tools/frameworks would be a plus. Education: Bachelor or Master s Degree in Computer Science or equivalent Who is Mastercard? Mastercard is a global technology company in the payments industry. Our mission is to connect and power an inclusive, digital economy that helps everyone, everywhere by making transactions safe, simple, smart, and accessible. Using secure data and networks, partnerships, and passion, our innovations and solutions help individuals, financial institutions, governments, and businesses realize their greatest potential. Our decency quotient, or DQ, drives our culture and everything we do inside and outside of our company. With connections across more than 210 countries and territories, we are building a sustainable world that unlocks priceless possibilities for all.

Who We Are Simpplr is the AI-powered platform that unifies the digital workplace - bringing together engagement, enablement, and services to transform the employee experience. It streamlines communication, simplifies interactions, automates workflows, and elevates the everyday experience of work. The platform is intuitive, highly extensible, and built to integrate seamlessly with your existing technology. More than 1,000 leading organizations - including AAA, the NHS, Penske, and Moderna - trust Simpplr to foster a more aligned and productive workforce. Headquartered in Silicon Valley with global offices, Simpplr is backed by Norwest Ventures, Sapphire Ventures, Salesforce Ventures, and Tola Capital. Learn more at simpplr.com . Job Title: Quality Engineer (QE) / Software Development Engineer in Test (SDET) Overview Simpplr is looking for a Quality Engineer or SDET who sees quality as an integrated part of the engineering process. You will be part of a cross-functional product team, contributing from story grooming to release. Your role will include building test frameworks, validating assumptions early, and ensuring a fast and reliable delivery pipeline. This is a hands-on engineering position focused on building quality into every layer of the stack. Join us in shaping the future of employee experience through a modern intranet platform used by leading enterprises across the globe. What Youll Do Engineer quality across the lifecycle Participate in requirement discussions and define test strategies alongside product managers and developers Influence design and architecture with a quality-first mindset Plan testing early and build the necessary tools and automation to validate continuously Build scalable test systems Design and maintain automation frameworks using Selenium, Cucumber BDD, and JUnit or TestNG Set up pre-merge validations and test environments that mirror production Automate end-to-end flows, component-level tests, and API validations that are fast and reliable Leverage data to drive quality Implement observability and build dashboards to track key quality indicators Collaborate with engineering and product to co-own and act on quality metrics Continuously improve test coverage and reduce escape rates through data-backed insights Integrate with CI/CD workflows Embed tests within GitHub workflows or Jenkins pipelines Create fail-fast mechanisms to catch issues before deployment Champion modern practices like contract testing, test data versioning, and environment stability Collaborate across disciplines Engage in sprint planning, backlog grooming, and technical design discussions Work closely with developers, infrastructure engineers, and data teams Coach junior engineers and help foster a culture of engineering excellence What Were Looking For Core qualifications 3 to 5 years of experience in quality engineering or SDET roles Strong coding skills in JS, playwright and experience with frameworks like Cucumber BDD, JUnit, or TestNG Hands-on experience for UI testing and tools like Postman, RestAssured, or JMeter for API testing Experience integrating tests into CI/CD pipelines such as GitHub Actions or Jenkins Ability to build test strategies, manage test data, and debug across the full stack Personal attributes Ownership mindset with a focus on proactive problem solving Excellent collaboration and communication skills Comfortable working in fast-paced product environments Bonus points Experience with performance or security testing Exposure to microservices or cloud-native testing approaches Certifications such as ISTQB or agile quality credentials Simpplr s Hub-Hybrid-Remote Model: At Simpplr we believe that when work is good, life is better and that belief guides all we do. Including how we approach our flexible work model. Simpplr operates with a Hub-Hybrid-Remote model. This model is role-based with exceptions and provides employees with the flexibility that many have told us they want. Hub - 100% work from Simpplr office. Role requires Simpplifier to be in the office full-time. Hybrid - Hybrid work from home and office. Role dictates the ability to work from home, plus benefit from in-person collaboration on a regular basis. Remote - 100% remote. Role can be done anywhere within your country of hire, as long as the requirements of the role are met.

About us Headquartered in the Silicon Valley with offices in London, Hyderabad and Singapore, Accellor is a Microsoft Gold Partner and a premier Salesforce Partner that uses best-of-breed cloud technology to deliver superior customer engagement and business effectiveness for clients. We bring a deep understanding of Financial, Retail, High Tech, Healthcare, and Retail industries, rolling out end-to-end implementation of salesforce.com and powerful third-party apps. We also build products that are sold on the AppExchange and used by both boutique businesses and Fortune 500 companies. Job Description Work with Sales and Marketing teams and Sales directors to ideate and assemble business proposal for software product development and related services. Prepare professional response to RFP/RFI s. Be part of the pre-sales proposal lifecycle or bid management. Create high-quality client facing presentations and documents (in MSOffice) related to software products, technology & services. Prowess in English language will be required to articulate solutions and proposed software success roadmaps. Work with technical leads and product designers to understand and articulate business solutions. The job may require flexibility in work hours to collaborate with stakeholders in different time-zones of USA or UK. Must to Have:- Minimum 3 years of relevant experience in presales. Must have excellent presentation and technical documentation skills (suggestively on Microsoft O365 tools). Must have excellent written and verbal English language skills. US experience (remotely supporting is fine). Services/consulting experience. Cloud/AI experience is mandatory. Must be qualified for customer facing. Good to Have:- Experience developing supporting pre-sales and marketing is desirable. Thorough understanding of the Software Development Lifecycle (e.g. Requirements, Design, Development, Testing). Excellent interpersonal, research, and communication skills. Technical person converted to presales is preferred but not mandatory. Midsize company experience would be a plus. Educational Qualifications Must be a Graduate or post-graduate. MBA would be a plus. Exciting Projects: We focus on industries like High-Tech, communication, media, healthcare, retail and telecom. Our customer list is full of fantastic global brands and leaders who love what we build for them. Collaborative Environment: You Can expand your skills by collaborating with a diverse team of highly talented people in an open, laidback environment or even abroad in one of our global canters. Work-Life Balance: Accellor prioritizes work-life balance, which is why we offer flexible work schedules, opportunities to work from home, and paid time off and holidays. Professional Development: Our dedicated Learning & Development team regularly organizes Communication skills training, Stress Management program, professional certifications, and technical and soft skill trainings. Excellent Benefits: We provide our employees with competitive salaries, family medical insurance, Personal Accident Insurance, Periodic health awareness program, extended maternity leave, annual performance bonuses, and referral bonuses. Disclaimer

Title: Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM) About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Circuit design, simulation, and characterization of full custom circuits Functional simulations and statistical analysis Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 6-8 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency, and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

As a Visual Designer on Tekion s in-house creative team, you'll translate product features into compelling visuals that connect with people. you'll support cross-functional efforts from marketing campaigns to product storytelling delivering pixel-perfect assets that are strategically sound and emotionally resonant. This is a mid-level role designed for someone who thrives on clear visual thinking, high craft standards, and the agility to support multiple teams in a hybrid, fast-moving environment Key Responsibilities: As a visual designer, you'll create clear, high-impact visuals for campaigns, product marketing, and internal communications. you'll design product visuals, infographics, and presentations that simplify complex ideas and help tell our story across the customer journey from first impression to active use. you'll keep our design systems sharp and consistent through Figma libraries and branded templates, while building visual narratives that support product launches, sales enablement, executive communications, and more. you'll share your work with clarity and purpose during team reviews, and work quickly without compromising on precision Skills and Experience: 3-5 years of experience in visual/marketing design and brand communication Mastery of Figma and Adobe Creative Suite (Illustrator, Photoshop); familiarity with modern tools like Spline or Rive is a plus Strong visual storytelling and presentation design skills Experience in in-house creative teams or high-velocity environments A systems mindset you think in scalable patterns and reusable design components, and collaborate clearly across functions Traits we value: optimism, accountability, and strategic creativity Preferred Skills Brand and marketing design Design systems and scalable templates Storyboarding and visual narrative building Typography and visual hierarchy Creative direction and conceptual thinking Perks and Benefits Competitive compensation Generous stock options Medical Insurance coverage Work with some ofthe brightestmindsfrom Silicon Valley s most dominant and successful Companies

Adaptive and Embedded Computing Group (AECG) seeks a Staff Silicon Design Verification Engineer to provide technical leadership and expertise in the verification of high-speed Crypto, Network-on-Chip (NoC), and cutting-edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success. THE PERSON: The ideal candidate has a proven track record in driving strategies and successfully executing verification strategies for Pre-Silicon Design IP and/or SOC designs. They should be strong team players with excellent communication and leadership skills, capable of positively and strategically influencing design teams to improve overall product quality. KEY RESPONSIBILITIES: Verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance. Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level. Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs. Develop and execute comprehensive verification plans, including testbenches and test cases. Collaborate with design, architecture, and software teams to define and implement verification strategies. Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification. Mentor and guide junior engineers, fostering a collaborative and innovative team environment. PREFERRED EXPERIENCE: Require experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium. Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs is a plus. Require familiarity with verification management tools as we'll as an understanding of database management particularly as it pertains to regression management. Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus. Experience with gate-level simulation, power-aware verification is a plus. Experience with silicon debug at the tester and board level, is a plus. Technical leadership of teams with 5+ engineers. This includes planning, execution, tracking, verification closure, and delivery to programs . ACADEMIC CREDENTIALS: Require BS w/ 4+ yrs or MS w/ 3+ yrs or PhD in Electrical Engineering, Computer Engineering or Computer Science.

The position will involve working with a very experienced physical design team of Server SOC and is responsible for delivering the physical design of tiles and FullChip to meet challenging goals for frequency, power and other design requirements for AMD next generation processors in a fast-paced environment on cutting edge technology. THE PERSON: The ideal candidate has significant experience in industry, with good attitude who seeks new challenges and has good analytical and problem-solving skills. You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc You are meticulous about Power, Performance and Area while driving schedule and managing cost. You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you. KEY RESPONSIBILITIES: RTL to GDS2 flow Handling Floor-plan, Physical Implementation of Power-plan, Synthesis, Placement, CTS, , Routing, Extraction, Timing Closure (Tile level, Full chip), Physical Verification (DRC & LVS), Crosstalk Analysis, EM/IR Handling different PNR tools - Synopsys FusionCompiler, Cadence Innovus, PrimeTime, StarRC, Mentor Graphics Calibre, Apache Redhawk Identify and implement opportunities for improving PPA PREFERRED EXPERIENCE: 16+ years of professional experience in physical design, preferably with high performance designs. Experience in automated synthesis and timing driven place and route of RTL blocks for high speed datapath and control logic applications. Experience in automated design flows for clock tree synthesis, clock and power gating techniques, scan stitching, design optimization for improved timing/power/area, and design cycle time reduction. Experience in floorplanning, establishing design methodology, IP integration, checks for logic equivalence, physical/timing/electrical quality, and final signoff for large IP delivery Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality, familiarity with tools for schematics, layout, and circuit/logic simulation Experience in STA, full chip timing Versatility with scripts to automate design flow. Proficiency in scripting language, such as, Perl and Tcl. Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5nm/3nm Excellent physical design and timing background. Good understanding of computer organization/architecture is preferred. Strong analytical/problem solving skills and pronounced attention to details. ACADEMIC CREDENTIALS: Qualification: Bachelors or Masters in Electronics/Electrical Engineering

Title: Memory IP Design Engineer- (eFuse/MTPM/OTP/MRAM/SRAM) About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Circuit design, simulation, and characterization of full custom circuits Functional simulations and statistical analysis Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 4-20 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills.

About Ema Ema is building the world s largest agentic AI platform to revolutionize enterprise productivity. Our proprietary technology enables companies to delegate repetitive tasks to Ema, the Universal AI employee, unlocking 10x gains in workforce efficiency. Founded by ex-Google, Coinbase, Flipkart, and Okta executives, we bring deep product and scaling expertise to this mission. Our team includes top engineers from Google, Microsoft Research, Facebook, Square, and Coinbase, and alumni of Stanford, MIT, UC Berkeley, CMU, and IITs. We ve raised over $60M from top-tier investors including Accel, Naspers/Prosus, Section32, SCB10X, Sozo Ventures, Hitachi Ventures, and prominent angels like Sheryl Sandberg, Jerry Yang, and Dustin Moskovitz. Ema is headquartered in Silicon Valley with a second hub in Bangalore, India. This is a hybrid role requiring in-office work three days per week. Role Overview As a Partner Success Architect, you will serve as a critical bridge between Ema s platform capabilities and our partners business and technical goals. You will own the technical co-creation process with partners, enabling them to build, position, and deliver innovative AI employee solutions powered by Ema. This role is deeply cross-functional, requiring collaboration with Sales, Product, Engineering, and Customer Success to amplify Ema s presence through strategic alliances. Key Responsibilities: Lead technical co-creation by running discovery sessions and prototype AI employee workflows with partners using Ema s GWE. Build pre-sales assets by creating solution templates, demos, and reference architectures to support sales and showcase capabilities. Drive Partner Enablement to own technical onboarding, design enablement materials, and support partners in scaling their solutions. Act as Trusted Advisor by providing ongoing technical guidance, troubleshooting, and feedback loops between partners and internal teams. Support GTM and Field Sales by delivering demos, proofs-of-value, and contribute to GTM assets and playbooks with field and partner teams. Track and Optimize Impact by measuring partner success with KPIs, gather market feedback, and represent Ema at events and co-marketing efforts. Qualifications: 5+ years of experience in solution architecture, partner engineering, or pre-sales in enterprise software or SaaS. Demonstrated expertise in designing or implementing complex technical solutions in a B2B environment, preferably in AI, ML, automation, or cloud platforms. Excellent communication and presentation skills, with the ability to simplify complex technical concepts for diverse audiences. Preferred Qualifications: Experience with Generative AI, LLMs, or agentic platforms in production settings. Familiarity with enterprise systems like Salesforce, ServiceNow, Workday, or similar. Prior experience in a startup or high-growth SaaS environment is preferable. Comfort working in fast-paced, ambiguous environments and scaling new programs from 0 to 1. Ema Unlimited is an equal opportunity employer and is committed to providing equal employment opportunities to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, sexual orientation, gender identity, or genetics.

About this opportunity We are seeking a Tech Lead FPGA/ASIC Verification to join the Ericsson Silicon organization. In this key role, you will provide strategic leadership to a team of dedicated engineers focused on developing world-class Radio and RAN Compute products. You will lead the FPGA verification team in defining, implementing, and optimizing verification strategies and environments for high-efficiency data transfer and processing with embedded subsystems. As part of our global organization, youll collaborate with talented teams across our various sites. We are committed to Agile principles, fostering a collaborative and innovative work environment that encourages creativity, teamwork, and strategic thinking What you will do Lead the definition of advanced verification requirements and strategies for FPGA and/or ASIC designs based on functional specifications and Ericsson development processes. Architect and implement comprehensive verification environments and test cases to execute verification plans, ensuring highquality deliverables. Analyze and optimize functional and code coverage metrics, driving towards completion targets and continuous improvement. Debug RTL in collaboration with designers. Collaborate with hardware, software, systems, and integration teams to understand overall product requirements and drive strategic and efficient solutions. Champion the continuous improvement of products, tools, and processes, contributing thought leadership and innovative ideas. Produce and oversee the generation of comprehensive verification documentation, ensuring clarity and precision including test procedures and results documentation. Devise test plans that cover functional verification and on target lab verification. Provide mentoring and guidance to team members You will bring 10+ years of experience in FPGA/ASIC verification, including leadership roles. Exceptional knowledge of UVM and SystemVerilog Proven ability to architect and create RTL testbenches from scratch, demonstrating advanced technical skills. Strong knowledge of object-oriented programming and embedded software design and testing. Expertise with modern FPGA device families and tools Experience with scripting languages such as Python, Tcl, shell scripting, etc. An analytical and strategic approach with a results-oriented mindset and the ability to deliver under pressure. Excellent English verbal and written communication skills, with the ability to convey complex ideas clearly and persuasively. High self-motivation and the ability to work independently while leading and inspiring teams. A track record of successful cross-team and cross-site cooperation, including leadership roles. A Bachelors degree in Electrical or Computer Engineering or equivalent.

As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence. THE PERSON: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES: Drive formal verification for the block and write formal properties and assertions to verify the design Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design Responsible for verification quality metrics like pass rates, code coverage and functional coverage PREFERRED EXPERIENCE: Project level experience with design concepts and RTL implementation for same Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics Good understanding of computer organization/architecture ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering

GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Circuit design, simulation, and characterization of full custom circuits Functional simulations and statistical analysis Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation & design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires MTech in Electrical (VLSI, Microelectronics and related fields) from a reputed university with 4-20 years of relevant experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design & simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in NVM Memory (MTPM/OTP/MRAM/SRAM/eFlash) designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects. Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS & SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45/32/28nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills.

You are an energetic, experienced, and organized writer passionate about cutting-edge technology. With a keen eye for detail and a knack for making complex topics accessible, you have honed your skills over 3-5 years in the software or hardware industry. Your proficiency with authoring tools like FrameMaker and Oxygen, combined with excellent problem-solving abilities, makes you a standout in your field. You excel in communication, both written and verbal, and thrive in a collaborative environment where you can work independently with minimal supervision. Your dedication to quality and your ability to learn new technologies quickly set you apart. You take pride in your work, care about others, and are committed to doing a good job. Familiarity with semiconductor design flows and tools such as Structured FrameMaker, Oxygen editor, and XML flows is a plus. What You ll Be Doing: Plan, organize, write, and edit various types of customer documentation. Collaborate with world-class engineers to create essential customer documentation in dynamic formats. Empower customers to design-in and optimize Synopsys products through clear, concise documentation. Translate complex technical information into user-friendly content. Ensure documentation meets industry standards and is easily accessible to global customers. Continuously update and maintain documentation to reflect product updates and new features. The Impact You Will Have: Enhance customer satisfaction by providing clear and comprehensive documentation. Facilitate the adoption and optimization of Synopsys products by global customers. Contribute to the overall success of Synopsys by ensuring high-quality documentation. Support the development of innovative solutions through effective communication. Help maintain Synopsys reputation as a leader in semiconductor IP and EDA software. Drive continuous improvement in documentation processes and standards. What You ll Need: Degree or masters in electronics, science, hardware, computing, software, physics, mathematics, or engineering discipline. Other technical disciplines also considered. 3-5 years of technical writing experience in the software or hardware industry. Excellent problem-solving skills and strong logical reasoning. Proficiency with authoring tools such as FrameMaker and Oxygen. Exceptional English writing and speaking skills. Who You Are: Excellent communication and interpersonal skills. Energetic and capable of learning new technologies as necessary. Team player who can work independently with minimal supervision. Detail-oriented and committed to producing high-quality work. Proactive and takes ownership of projects and tasks

Description for Internal Candidates Staff Digital IC Design Engineer - Digital Compute Team About Us At onsemi , we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world s most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our group develops MCU and DSP systems as well as hardware accelerators that are used in a large variety of different products and markets. The Role We are expanding the team to India and are looking for a Staff Digital IC Design Engineer with experiences in the development of embedded MCU/DSP systems . You will develop and benchmark such systems for a variety of processor cores and consult the product integration teams during the integration of these solutions into semiconductor products. Why Join Us We create a diverse set of world-class products in a friendly and team-oriented atmosphere. We provide an environment of continual learning and growth opportunities and support volunteer & charitable programs. We offer competitive benefit package and a great place to work. You will be able to build up a career in a successful international company, and you can participate in interesting international projects. What You ll Do + Architect, specify, implement, simulate, and benchmark MCU and DSP systems as well as hardware accelerators + Consult the product integration teams in the definition, the integration and use of these systems + Participate to the verification and FPGA prototyping of these systems + Coordinate the SDK development with the software team + Lead project activities + Contribute to design methodology and design flow improvements What You ll Need + Minimum BS/MS in Electrical Engineering or related technical field + At least 8 years of relevant work experience in semiconductor product development including engineering leadership + Experience with embedded CPUs (e.g. ARM Cortex, DSP), AMBA bus protocols (AHB/APB). + RTL design of digital IP blocks and systems in Verilog/SystemVerilog + Technical document writing + Excellent English written and verbal communication skills. \#LI-RT1 onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https: / / www.onsemi.com / careers / career-benefits We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Senior Principal Digital IC Design Engineer - Digital Compute Team About Us At onsemi, we help improve lives through silicon solutions every day. Our intelligent power and sensing technologies solve the world s most complex challenges and lead the way in creating a safer, cleaner, and smarter world. Our group develops MCU and DSP systems as well as hardware accelerators that are used in a large variety of different products and markets. The Role We are expanding the team to India and are looking for a Senior Principal IC Design Engineer with experience in the development of embedded MCU/DSP systems. You will develop and benchmark such systems for a variety of processor cores and consult the product integration teams during the integration of these solutions into semiconductor products. \#LI-RT1 onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company benefits can be found here: https: / / www.onsemi.com / careers / career-benefits We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.