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DFT Design Engineer - Memory Team Samsung Electronics

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You will be working at Samsung Semiconductor India Research (SSIR), which is one of the largest R&D centers outside Korea for Samsung Electronics. Your role will involve: - Good Experience in Top/Block, FLAT/Hier DFT insertion flow methodologies - Executed scan & MBIST insertion, ATPG and verification at full chip level - Experience in timing closure in DFT modes - understanding of shift, capture timing constraints, MBIST constraints and their impacts - Generate, review and validate DFT constraints to achieve timing closure of high-speed design - Experience in timing closure in DFT modes, RTL analysis, logic synthesis, physical design, signoff verification (STA, Formality, Simulations) - Exp...

Posted 2 days ago

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