123 Serdes Jobs - Page 5

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

WHAT YOU DO AT AMD CHANGES EVERYTHING. We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.. AMD together we advance_. PMTS SILICON DESIGN ENGINEER. As a SerDes Verification Architect, you will be responsible ...

Job Requirement: We are looking to hire engineers with 5 to 10 years of experience in Analog circuit design. Candidate needs to have comprehensive knowledge of Analog design with experience in some blocks like OpAmps, Comparators, Bandgap References, LC and ring oscillator, PLLs, CDR, LDO, Tx/Rx etc Should have understanding of process technologies and device behaviour and reliability issues, ESD and latchup Should have understanding of various aspects of signal integrity. Experience in Rx, Tx, T-coil ESD, CDR, equalization techniques like CTLE/DFE in PCIE or Ethernet is preferred. Strong documentation skills and collaborative attitude are must haves

Role & responsibilities - Experience working with high-end SOC, processor and FPGA-based designs - Experience in DDR4/DDR5, DDR4/5, or PCIe gen 3/4/5/6, HDMI, CNVI or Serdes interfaces hardware design - Hands-on experience with Cadence Allegro tools for schematics and PCB layout (CHDL or OrCAD) - Board bring-up experience amd Proficiency in using high-end lab equipment like GHz oscilloscopes, electronic loads, etc

Job Overview As a Test and Validation Engineer for TE Connectivity you will focus on test system design and verification-validation testing of high-speed products in cable assemblies targeting high speed communications and connectivity within datacenters and wireless infrastructure. You will be expected to independently work on projects in the areas of validation for product, test system design including selection of hardware and programming. You will work collaboratively within a broader cross functional team of electrical, mechanical, manufacturing, & operations to execute leading edge products designs. You will be the responsible for the electrical validation of a product/platform beginni...

Position Summary Senior Analog Designer with relevant experience of 512 years in Analog and Mixed-Signal Design. Must have full IP design experience in at least one of the domains listed below. Roles and Responsibilities Low-jitter and high-frequency PLL design experience, including both LC and ring-based PLLs General-purpose ADC and thermal sensor IP design experience High-speed SerDes design experience LDO, BGR, and other power management block design Ideal candidate should be ready for challenging design assignments and exposure to silicon validation Opportunity to gain full exposure to the IP design cycle in advanced Samsung Foundry processes (4nm and below) Skills and Qualifications B.T...

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shi...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Serdes PHY Analog Design Job Function BDC SerDes Mixed-Signal design team is actively looking for experienced (4-12+ years) analog circuit designers to work on high speed SerDes PHYs . You will be directly involved in delivering next-generation custom PHY designs for SoCs and will be part of a growing team involved in architecture analysis in leading-nodes - finfets & beyond. Design goals include low-power analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Experience in designing multiple analog building blocks - LDO, high speed TX...

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Analog layout design requires knowledge of designing layouts of complex VLSI (very large scale integration) circuits using graphic editing tools in the Analog domain. A major portion of the job is in the creation of new physical design data from concepts, partial schematics, or a working knowledge of overall requirements. Responsibilities include checking the design integrity with respect to semiconductor ground rules and the logical function of the circuit. Symbolic circuit data (schematics) are converted to physical shapes which represent the semiconductor process. The role ranges from manual shapes and checking tool manipulations to extended team coordination and methodology creation. The...

1. Hands on work on custom layout for analog blocks like High Speed SerDes and General purpose IO designs with Cadence Virtuoso on latest technologies like 5nm and below and also take leadership roles in delivery of IPs 2. Work on Floor planning, power design, signal routing strategy, EMIR awareness andparasitic optimisations 3. Understand and apply analog Layout techniques to ensure the design meets performance with minimum possible area and good yield. 4. Participate in building and enhancing layout flow for faster, higher quality design process. 5. Checking physical verifications like DRC/LVS/ERC/ANT/DFM and other IBM internal checks 6. Collaborate with Circuit Designers to solve challeng...

You're an experienced and passionate Analog and Mixed-Signal (A&MS) Senior Circuit Design Expert with a strong background in PLL and SERDES design . You bring a deep understanding of mixed-signal techniques for dynamic and static power reduction, performance enhancement, and area reduction. Your expertise covers circuit architectures simulation, circuit layout, and knowledge of bipolar, CMOS, passive structures, and interconnect failure modes in advanced FinFET technology nodes. You excel at developing Analog Full Custom circuit macros , including PLLs, Clock Path Functions, clocking solutions, TX/RX datapaths, and power management and regulation for High Speed PHY IP in both planar and FinF...

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Comp...

• Drive Area estimation, Floor Planning, Placement, Routing, Power planning, Verification, EMIR, ESD-LUP Verification & Tape out. • Understanding of low parasitic, high frequency design techniques. • Finfet process & Lower nodes; 2nm/3nm/5nm/7nm Required Candidate profile • Exp with Cadence (Virtuoso), Synopsys (CC), Calibre & ICV verification tools like LVS, DRC, Extraction. • Debugging/fixing LVS/DRC errors • Experience with EMIR, PERC tools. • Skill/TCL scripting.

Knowledge of High-Speed Board Design Experience in designing with memories like DDR3 / DDR4 / eMMC / NAND / NOR Flash etc. Experience in designing with High-speed communication protocols like PCIe / SerDes / USB3.0 / SGMII / SFP+ /10G/100G/ Hands-on experience with MII, SGMII, RGMII, HSGMII, QSGMII, XGMII and its PHY interfaces Hands-on experience with Intel or Broadcom or Marvel or MediaTek Quad/Octal port Ethernet PHYs transceivers Should have design experience in Multiport Gigabit Network Switches, Hubs and Gigabit Router Added Advantage for knowledge of PoE 802.3at , PoE+ 802.3bt Type 2 , or PoE++ 802.3bt Type 3 or 4PPoE PoE++ Type 4 Should Have Experience of different Gbit Standard such...

Requirement : Analog Circuit Design Lead Experience Range : 7 - 12 Yrs. Work Location(s) : Bengaluru, Karnataka Candidates who are ready to join Immediately Requirements: Experience in entire Analog IP development including circuit design, layout, AMS verification, and characterization. Must have led the entire Analog IP development cycle and team. Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc. Analog/custom layout design in advanced CMOS process. Ability to understand design constraints and implement high-quality...

Job Details: : Intel is a leader in the wireless communication industry, offering products that set the benchmark for performance and innovation. We are seeking a motivated Junior SerDes PHY Integration Engineer to join our team. In this role, you will focus on integrating physical layer components for high-speed SerDes systems, playing a crucial part in ensuring their performance and reliability.Key Responsibilities:SerDes PHY IntegrationsSupport the integration of the physical layer for SerDes systems, including transmitter and receiver architectures, equalization techniques, and signal integrity.Simulation and ValidationAssist in conducting simulations using MATLAB and Python, along with ...

Analog Design Engineer Skills & Experience Required: 5+ years of relevant experience. Has relevant knowledge and hands on experience of SerDes design at high data rates, up to 20Gbps. Study the assigned block, analyze the circuit carefully, and work on the hand analysis. Understand the required performance, the targeted specs and trade-off between different performance metrices. Write behavioral model of the circuit blocks for system-level simulations. Simulate and verifying designed schematics using Synopsys tools using circuit simulators. Debug to find out the root cause for any performance degradation. Being capable of solving all the faced issues. Working with layout team on layout optim...

locationsIndia, Bangaloreposted onPosted Today job requisition idJR0275251 Job Details: About The Role : Intel is at the forefront of the wireless communication industry, offering cutting-edge products that set the standard for performance and innovation. We are seeking a highly skilled SerDes PHY System Engineer to join our team. In this pivotal role, you will be responsible for the design and development of physical layer components for high-speed SerDes systems, ensuring their performance and reliability. Key Responsibilities: SerDes PHY DesignLead the design and development of the physical layer for SerDes systems, including transmitter and receiver architectures, equalization techniques...

Defining and developing ASIC RTL design and verification at both chip and block levels. Writing and modifying test cases, checkers, and scoreboards in a system Verilog-based test environment. Collaborating with cross-functional teams to ensure seamless integration of analog and digital components. Conducting AMS verification, particularly for high-speed SerDes designs supporting multi-protocols. Utilizing Synopsys analog mixed-signal design tools for efficient design and verification processes. Programming and scripting using TCL, Perl, and Python to automate and streamline workflows. The Impact You Will Have: Enhancing the performance and reliability of our high-performance silicon chips. C...

Hands on experience in Circuit Design implementation of IPs including LDOs, Band Gap reference, Good working knowledgein Current Generators, POR, ADC/DACs, PLLs, Oscillators, Good working knowledge in General Purpose IOs, Temperature sensor, SERDES, PHYs, Good in Die to Die interconnect, High-speed IOs,

As a Functional verification engineer, you will be working on IBM server processors/SOC or ASICs used in IBM servers. Develop the verification environment and test bench and creating testcases. Debug fails using waveform, trace tools and debug RTL code Develop skills in IBM Functional verification tools and methodologies. Work with design as well as other key stakeholders in resolving/debugging logic design issues and deliver a quality design Required education Bachelor's Degree Required technical and professional expertise 5 + years of experience in Functional Verification of Processors or ASICs. Minimum 3+ years of experience in any of the following Computer architecture knowledge, Process...

Must have experience in working with MNC clients Must be good at Honouring Committed Schedules, Quality delivery, Clarity in Communication Familiarity with Serdes components like serializer or de-serializer circuits Strong fundamentals and knowledge of AMS design flow Must have familiarity with layout issues, working with layout team to fix them Must be good at preparing the Review PPT, run through the review meeting and closing all action items Must ensure the design meets PPA goals Good at debugging to ensure meeting all performance simulation issues Must be able to pass QA checks as demanded by the client Must be able to generate all relevant design views using sign-off tools Qualificatio...