Senior Technical Architect - SoC (System on Chip) Physical Design

Role Overview: You will be stepping into a deep technical leadership position where your main focus will be on architecting and guiding turnkey SoC physical design projects. Your role will involve extensive hands-on expertise in RTL2GDS implementation at advanced nodes like 3nm/5nm, customer interaction, and taking ownership of project methodology, technical quality, and solution engineering from start to finish. Key Responsibilities: - Define and drive end-to-end RTL-to-GDSII flows customized for specific customer technology, tools, and deliverables. - Lead complex top-level and hierarchical SoC designs to ensure quality and compliance with signoff requirements. - Provide guidance on floorplan strategy, power planning, PPA closure, IR/EM signoff, and integration challenges. - Understand customer requirements, offer technical solutions, suggest execution strategies, and recommend staffing needs. - Collaborate with customer architects and stakeholders for reviews, issue resolution, and milestone achievements. - Mentor physical design teams on advanced technology node implementation, complex SoC partitioning, and tool optimizations. - Review block-level signoff issues, identify methodology gaps, and promote technical excellence across projects. - Take ownership of PD reference flows, checklists, automation scripts, and ECO methodologies for continuous improvement. - Drive low power implementation (UPF), hierarchical signoff closure, and ensure flow correlation across synthesis, STA, and physical domains. Qualifications Required: - 15-22 years of hands-on experience in physical design implementation with successful tapeouts on advanced tech nodes. - Proficiency in PD tools and flows including synthesis, STA, PNR, and Signoff domain such as Synopsys Fusion Compiler, ICC2, PrimeTime, ICV, Cadence Innovus/Tempus, Ansys RedHawk, Caliber, UPF, CLP, etc. - Strong understanding of low power flows, multi-voltage/multi-Vt, UPF, and power intent checks. - Experience in managing or technically leading multiple successful tapeouts, including full-chip or subsystems. - Proficient in scripting languages like TCL and Python with the ability to drive flow optimizations. - Excellent problem-solving, debugging, and documentation skills. - Previous experience in a customer-facing or solution architect role would be advantageous.,