We are looking for an experienced leader for high performance SOCs/MCUs, for board and packaging group. Essential Functions: Highly experienced in board and package design from block level to final board and package delivery. Should have the ability to work independently with little supervision and drive the team to define, develop and execute the product plan from specification to release. Must be a natural team player and strive towards fostering a highly creative and productive working environment Qualifications Minimum Requirements: MTech/BTech in EC/ EE/CS with hardware engineering experience of 4 to 15 years. Experience in Microcontroller and Microprocessor based complex design Experience in latest packaging Technologies and Manufacturing process Strong domain knowledge of system clocking, system modes, power management, debug Additional Preferred Qualifications Experience in IC packaging layout design, emphasizing advanced technologies like SiP (System-in-Package), flip-chip, and 3D packaging. Comprehensive knowledge of packaging design aspects, encompassing power distribution, thermal control, and signal fidelity. Thermal simulation experience is added advantage. Profound understanding of semiconductor manufacturing methodologies and packaging assembly processes. Board level System architecture and design includes memory or communication interfaces. SOC specifications and board level system specifications. Development and design of SOC power supply, system power supply specifications, and PMIC specifications. Interface specifications incorporating SOC-peripheral devices Experience with high-speed interface i.e. PCIe Gen3/4/5/, LPDDR 4/4x/5/5x, UFS, Ethernet, Flash memory Board level DC/AC simulations. Schematic, Layout and BOM generation using modern CAD tools Experience with SoC Bring-up activities Familiarity with PCB technologies, DFM, DFA, materials, stackup design, assembly rules and manufacturing process Experience with tools: Ansys HFSS or Cadence SI/PI, or other SI/PI, Cadence APD (Allegro Package Designer) for IC package layout design, SIwave, HSPICE, ADS, Q3D Ability to automate the SI, PI and Packaging activities using scripting tools like Python, TCL Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Programming Languages: basic Linux, C, basic Python, JavaScript(nodejs), HCL (Hashicorp Configuration Language), basic HTML & CSS Job Description In your new role you will: Working on the Cloud & Connectivity platform team Working on further development to CI / CD pipeline for SAE Application development for Cloud connectivity project Take up tasks for the long term roadmap of SAE Your Profile You are best equipped for this task if you have: Working on the Cloud & Connectivity platform team Working on further development to CI / CD pipeline for SAE Application development for Cloud connectivity project Take up tasks for the long term roadmap of SAE Contact: swati.gupta@infineon.com We are on a journey to create the best Infineon for everyone.

Principal Accountabilities: Collaborate effectively with the US and UK based Design and Verification teams. Assist in integrating design verification processes to achieve first-pass silicon success, performance goals, and schedule compliance. Perform any additional tasks as assigned by the manager. Key Performance Measures: Learn quickly and demonstrate a strong willingness to continuously acquire new skills. Meet deadlines with high-quality deliverables. Actively share skills and knowledge with team members. Collaborate effectively with team members. Maintain a high level of professionalism in all tasks and interactions. Demonstrate elements of Spirit of Renesas in all aspects of work Embrace and embody the companys organizational culture and values. Qualifications 7+ years of experience in mixed-signal IC design and/or verification. Proficient in Verilog, SystemVerilog, VerilogAMS, and UVM. Ability to independently solve complex technical and non-technical issues as they arise. Strong understanding of analog circuits, digital design processes, and top-level integration. Solid knowledge of PMIC and DC-DC converters. Excellent simulation debugging skills, with the ability to analyze waveforms and identify issues in schematics, models, or RTL. Proficient in Unix environment and shell scripting, with a working knowledge of Python. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Work together with system architects and micro architects to define high level specifications that are implementable. Contribute to RTL development including running tool flows like lint, CDC, Conformal low power and DFT checks Work closely with functional verification teams on test-plan development and debug. Understand timing constraints, run synthesis and deliver synthesized netlist to PD team and provide constraints support for PD teams. UPF writing, power aware equivalence checks and low power checks. Collaborate with other functional teams including DFT, physical design and emulation teams to achieve project milestones. Provide support to functional validation teams in post silicon debug. Qualifications MTech/BTech in EE/CS with hardware engineering experience of 1 to 15 years. Experience in micro-architecture development, RTL design, front-end flows (Lint, CDC, low-power checks, etc.), synthesis/DFT/FV/STA Experience in Microcontroller and Microprocessor architecture, Interconnect, Cache Coherency. Experience in protocols like AHB/AXI/CHI, Memory (ROM, RAM, Flash, LPDDR/DDR3/4) and memory controllers. Strong domain knowledge of clocking, system modes, power management, debug, security and other architectures is a must. Any of following experience would be a plus: High Speed Peripherals like DDR, PCIe, Ethernet, GPU, VPU (Video Processing Unit); NIC/FlexNOC interconnect; Flash memory subsystems. Experience with post-silicon bring-up and debug is a plus. Able to work with teams across the globe and possess good communication skills Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

In your new role you will: Manage a Digital Verification Team working in R&D projects in a complex technical area Resource pipeline balancing, allocate projects and co-ordinate the team Building up and developing competencies and methodologies for IP/SoC Verification Be the technical interface to internal development groups, project management and external development partners Drive innovation in the form of new advancements (state-of-the-art verification methods, tool integration and flow automation) Envisage, implement, institutionalize and maintain the verification methods and infrastructure (e.g. automation to improve quality/efficiency in terms of cost and time) Accountable together with the PJM & CoC Head in meeting Quality, Cost, Deliverables. Represent your group in cross site methodology exchange You are best equipped for this task if you have: A degree in Electrical Engineering, Computer Science or similar technical field At least 10 years of experience in the semiconductor industry inrelevant R&D departments and people management experience is must Experience in Product Development, Digital Verification or Digital Design Profound and proven problem-solving capabilities as well as strong communication skills to manage global and multi-cultural stakeholders and networks successfully Good knowledge in your own technical area but a focus on management and coordination role Excellent presentation skills which enable you to master the alignment across internal and external contacts in a multi-cultural environment Highly motivated with ability to prioritize and perform under pressure Proven ability to achieve results in a very dynamic and multi-site environment Strong analytical and communication skills We are on a journey to create the best Infineon for everyone.

Title: Oracle EBS Technical Lead About GlobalFoundries Introduction: The Oracle EBS Technical consultant will be based in GLOBALFOUNDRIES office in Bangalore and work closely with Oracle EBS Functional team, Implementation partners, Vendor resources and Business users. Your Job : Lead EBS R12 Technical development ensuring quality, consistency, and efficiency. Develop RICEFW components as per development standards Conduct code reviews, provide technical guidance, and mentor team members. Ensure adherence to EBS best practices and coding standards. Collaborate with functional teams to understand business requirements and translate them into technical solutions - RICEFW objects. Translates client requirements into technical specifications and configures application to meet requirements Estimates project effort once requirements are gathered including level of effort for customer work Documents designs for non-standard requirements developing other required project documentation Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs Required Qualifications : Bachelor s degree or foreign equivalent from an accredited institution required Minimum of 10 years of experience in Oracle EBS R12 Very strong technical knowledge of Oracle EBS R12, must have a strong understanding of either Financial modules ( AP,AR,GL,FA,SLA & IBY ) or Order to Cash modules ( OM, INV, AR and Shipping) or Procure to Pay modules ( PO, AP, INV and Warehouse Management) Strong experience in developing and implementing interfaces, extensions, customizations and reports in EBS R12 Expert knowledge of Oracle EBS architecture, table structures and dependencies Proficient in SQL, PL/SQL, Oracle Forms, Oracle Reports, Oracle RDBMS 11g, Oracle Workflow, XML Publisher, OAF Must be familiar with the APPS data model and Oracle s coding Standards. Basic understanding for Java Good understanding of application security, integration, performance and quality requirements Good with software development lifecycle practices and methodologies Excellent communication and interpersonal skills Team player with a positive attitude Strong analytical mind and ability to work under pressure with tight deadlines GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard. As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities. All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations. Information about our benefits you can find here: https: / / gf.com / about-us / careers / opportunities-asia

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Basic qualifications: Strong academic and technical background in electrical engineering. A Bachelor s degree in EE / Computer is required, and a Master s degree is preferred. 3 years experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications. Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision. Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind! Required experience : Hands-on and thorough knowledge of synthesis, place and route, timing, extraction and other backend tools and methodologies for technologies 16nm or less. Proven expertise in synthesis, timing closure and formal verification (equivalence) at the block and full-chip level. Full chip or block level ownership from architecture to GDSII, driving multiple complex designs to production. Experience with Cadence and/or Synopsys physical design tools/flows. Familiarity and working knowledge of System Verilog/Verilog. Experience with DFT tools and techniques. Experience in working with IP vendors for both RTL and hard-mac blocks. Good scripting skills in python or Perl Preferred experience: Good knowledge of design for test (DFT), stuck-at and transition scan test insertion. Familiarity with DFT test coverage and debug. Familiarity with ECO methodologies and tools. Your base salary will be determined based on your experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe , CXL , and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com . Senior Design Verification Engineer We are seeking talented Design Verification Engineers with proven expertise in industry-standard protocols such as PCIe and CXL. You will play a key role in the functional verification of designs, from developing block-level and system-level verification plans to writing test sequences, executing tests, and collecting and closing coverage. Responsibilities: Develop and execute block-level and system-level verification plans. Write and execute test sequences and collect and close coverage. Collaborate with RTL designers to debug failures and refine verification processes. Utilize coding and protocol expertise to contribute to functional verification. Develop user-controlled random constraints in transaction-based verification methodologies. Write assertions, cover properties, and analyze coverage data. Create VIP abstraction layers for sequences to simplify and scale verification deployments. Basic Qualifications: Minimum of 8 years experience in supporting or developing complex SoC/silicon products for server, storage, and/or networking applications. Strong academic and technical background in Electrical Engineering or Computer Engineering (bachelor s degree required, master s preferred). Professional attitude with the ability to prioritize tasks, prepare for customer meetings, and work independently with minimal guidance. Knowledge of industry-standard simulators, revision control systems, and regression systems. Entrepreneurial, open-minded behavior and a can-do attitude, with a focus on customer satisfaction. Required Experience: Interpreting PCIe/CXL standard protocol specifications to develop and execute verification plans in simulation environments. Experience using Verification IPs from third-party vendors for PCIe/CXL, focusing on Gen3 or above. Ability to independently develop test plans and sequences in UVM to generate stimuli. Experience writing assertions, cover properties, and analyzing coverage data. Developing VIP abstraction layers for sequences to simplify and scale verification deployments. Preferred Experience: Expertise in verifying Physical Layer, Link Layer, and Transaction Layer of PCIe/CXL protocols, including compliance on PCIe/CXL EP/RC. Experience with buffering and queuing with QoS on complex NOC-based SoCs. Analyzing performance at the system level on switching fabrics. Salary: Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Title: Oracle EBS Technical Lead About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com . Introduction: The Oracle EBS Technical consultant will be based in GLOBALFOUNDRIES office in Bangalore and work closely with Oracle EBS Functional team, Implementation partners, Vendor resources and Business users. Your Job : Lead EBS R12 Technical development ensuring quality, consistency, and efficiency. Develop RICEFW components as per development standards Conduct code reviews, provide technical guidance, and mentor team members. Ensure adherence to EBS best practices and coding standards. Collaborate with functional teams to understand business requirements and translate them into technical solutions - RICEFW objects. Translates client requirements into technical specifications and configures application to meet requirements Estimates project effort once requirements are gathered including level of effort for customer work Documents designs for non-standard requirements developing other required project documentation Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs Required Qualifications : Bachelor s degree or foreign equivalent from an accredited institution required Minimum of 10 years of experience in Oracle EBS R12 Very strong technical knowledge of Oracle EBS R12, must have a strong understanding of either Financial modules ( AP,AR,GL,FA,SLA & IBY ) or Order to Cash modules ( OM, INV, AR and Shipping) or Procure to Pay modules ( PO, AP, INV and Warehouse Management) Strong experience in developing and implementing interfaces, extensions, customizations and reports in EBS R12 Expert knowledge of Oracle EBS architecture, table structures and dependencies Proficient in SQL, PL/SQL, Oracle Forms, Oracle Reports, Oracle RDBMS 11g, Oracle Workflow, XML Publisher, OAF Must be familiar with the APPS data model and Oracle s coding Standards. Basic understanding for Java Good understanding of application security, integration, performance and quality requirements Good with software development lifecycle practices and methodologies Excellent communication and interpersonal skills Team player with a positive attitude Strong analytical mind and ability to work under pressure with tight deadlines

Not Applicable Specialism Managed Services Management Level Senior Associate & Summary At PwC, our people in project portfolio management focus on optimising project portfolios to drive strategic business outcomes. These individuals oversee project selection, prioritisation, and resource allocation to facilitate successful project delivery. In project management at PwC, you will oversee and coordinate various projects to facilitate successful delivery within budget and timeline. You will leverage strong organisational and communication skills to effectively manage teams and stakeholders. Why PWC At PwC, you will be part of a vibrant community of solvers that leads with trust and creates distinctive outcomes for our clients and communities. This purposeled and valuesdriven work, powered by technology in an environment that drives innovation, will enable you to make a tangible impact in the real world. We reward your contributions, support your wellbeing, and offer inclusive benefits, flexibility programmes and mentorship that will help you thrive in work and life. Together, we grow, learn, care, collaborate, and create a future of infinite experiences for each other. Learn more about us . & Summary A career withi n Capital Projects and Infrastructure (CP&I) to support the advisory services. Support teams in delivering the projects Analyze regional economic trends, market trends, policy changes and regulatory developments to assess the impact on investments Participate in mentorship and knowledge sharing activities within the team, providing support to junior team members and contributing to their professional development (only applicable to Senior Associate) Participate in the development and presentation of proposals for business development activities Mandatory skill sets Worked in the electronics and semiconductor sector but overall, in the manufacturing sector with business acumen. Preferred skill sets The person should have strong excel, word and presentation skills. Years of experience required 2 6 years Education qualification MBA , BTech Education Degrees/Field of Study required Bachelor of Technology, Master of Business Administration Degrees/Field of Study preferred Required Skills Consulting Accepting Feedback, Accepting Feedback, Active Listening, Agile Methodology, Analytical Thinking, Business Case Development, Business Process Improvement, Change Control Processes, Communication, Costing, Creativity, Embracing Change, Emotional Regulation, Empathy, Inclusion, Intellectual Curiosity, IT Project Lifecycle, Kanban (Project Management), Learning Agility, Optimism, Plan of Action and Milestones (POA&M), Process Mapping, Process Standardization, Program Management, Project Budgeting {+ 23 more} No

OUR STORY At ST, we believe in the power of technology to drive innovation and make a positive impact on people, business, and society. We are a global semiconductor company, and our advanced technology & chips forms the hidden part of the world we live in today. When you join ST, you will be part of a global business of more than 115+ nationalities and present in 40 countries, 50,000+, diverse and dedicated creators & makers of technology around the world! Developing technologies takes more than talent: it takes amazing people who understands collaboration and respect. People with passion and desire to disrupt the status quo, push boundaries and drive innovation - whilst unlocking your own potential. YOUR ROLE Looking for a dynamic, committed and a result oriented team member in GBS S2P India (Commission & Incentives team). The desired candidate will play a pivotal role in the management of commission & incentive activities globally for all regions - AME, EMEA, APeC, China, Japan via Salesforce and ServiceNow. JOB PROFILE 1) Audits Business managers submissions of Budgets and validates Results 2) Checks HR Feeds for changes in Plans, Employee details & updates records. 3) Publishes data requested by the Sales teams, HR, Business managers, Finance. 4) Finalises monthly accrual, forecasts, payments of the Sales incentives. 5) Performs and secures approvals for the split searches, adjustments, Rep commission. YOUR QUALIFICATION & EXPERIENCE 1) Graduation degree with specialisation in Finance : BBA / MBA 2) 3-5 years or prior experience in managing sales incentives. SKILLS 1) Expert working knowledge of Excel and Power BI 2) Excellent command over written and spoken English. 3) Skills to perform and flourish in a GBS environment. 4) Ready to work in UK shift timings with few hours of overlap with Americas. Working at ST means innovating for a future that we want to make smarter, greener, in a responsible and sustainable way. Our technology starts with you. Join us and start the future! To discover more, visit st.com/careers

We are seeking AI Software Engineers to join our AI Systems team. The ideal candidate will have industry experience working on machine learning, data science or computer vision topics. The position will involve taking these skills and applying them to solve some of the key issues facing the self-driving vehicle industry and advanced safety systems. Our mission is to use the latest machine learning and AI inference networks to develop the best AI inference for self-driving vehicle and advanced driver safety engineers. Renesas is the leading automotive electronics supplier globally, and this is a rare opportunity to deploy your AI software to the billions of devices we ship to customers every year. You will join our High Performance Computing (HPC) AI Solutions global research and development organization of around 100 software engineers. Responsibilities Design, develop, deploy, and maintain AI software for our self-driving vehicle customers. Leverage cloud native technologies and environments (GitHub/GitLab, Terraform, Docker, Kubernetes etc) to deploy our products on our multiple hardware devices (CPU, AI accelerator etc). Design the implementation and management of our AI solutions using the latest optimized machine learning technologies to make our internal and customer engineer s life easier and meet their AI workflow needs. Develop novel algorithms and approaches to advance the state of the art of AI-accelerated inference solutions Working in a globally distributed team and deliver the software product as a team in an agile development schedule Qualifications Qualifications Bachelor s or Master s degree in computer science, machine learning, mathematics, physics, electrical engineering or related field. Experience in C/C++, Python, or other related programming language for atleast 2 years professionally. Having individual project repositories in github etc can be an added advantage Atleast 2 years experience with software engineering, including deploying to one or more embedded devices or platforms. 2 years experience deploying applications with machine learning, data science or AI frameworks (eg TensorFlow/Keras, PyTorch, Pandas, ONNX), and ML tools (eg Weights and Biases, MLFlow, Airflow). Having previously worked with transformer type networks with know-how of attention blocks design and optimization in any hardware will be an added advantage. Familiarity with opens source AI compiler tools such as Apache TVM and prior experience in concepts like quantization, pruning etc and IR lowering during AI model compilation. Familiar with concepts of applications using cloud technologies (eg Kubernetes, Docker) and deployed to one or more cloud providers (eg Amazon Web Services, Microsoft Azure, Google Cloud) Ability to speak and write in English at a business level Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

We are seeking a highly skilled experienced PDN PV expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define PDN PV flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in PDN PV domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 10-15 years of hands-on experience in PDN (IR Drop EM analysis) PV (Physical Verification) domains Experience on PDN PV Signoff on lower tech-nodes Ability to debug PV issues (LVS, DRC, ERC, ANTENNA, ESDLUP etc) IR-EM-Power issues independently Ability to drive PDN PV methodology automation Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Location: NOIDA Exp-7-15Y We are seeking a highly skilled experienced Synthesis Static Timing Analysis (STA) expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define Synthesis STA flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in Synthesis STA domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain Good understanding of RTL, Synthesis, LEC, VCLP, Timing Constraints, UPF, Timing Closure Signoff Experience with EDA tools like Genus, Fusion Compiler, Primetime, Tempus, Conformal Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

We are seeking a highly skilled experienced engineer with SDC/RDC/CDC skills to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to collaborate with design and verification teams to implement robust CDC/RDC solutions into organization standard flows You will work with EDA Vendors to proactively review latest tools and flows offerings in this domain evaluate latest offerings and benchmark with organization used tools, flows, and methodologies You will be an actor of change for deploying new tools methodologies across the organization Qualifications Specific skills knowledge : Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 6-10 Years of Experience Expertise in RTL Level checks understanding Expertise in CDC verification tools like Mentor Graphics Questa CDC and Synopsys SpyGlass CDC Expertise in utilizing tools like Synopsys Prime Time, Cadence Tempus, and Mentor Graphics for timing analysis Expertise in utilizing RDC verification tools and methodologies to identify and resolve reset-related issues. Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Analog and Connectivity Business Unit (AC) is looking for a Staff Product Engineer to join our team to drive the product development of state-of-the-art Sensor Signal Conditioning products. This is a unique and exciting opportunity to work with a cross-functional team to bring a product to volume production starting from product conception to production release. The job scope includes but is not limited to, development of the test plan to ensure datasheet specifications are met. Own the qualification plan and the execution to comply with various JEDEC/AEC quality standards. Own product quality assessment through reliability tests. Collaborate with multi-functional teams such as Design, Test, Applications and Failure Analysis teams during first silicon debug and to root cause field failures. Creation and maintenance of product BOM. Monitor production data to address yield and quality deficiencies using statistical analysis. KEY RESPONSIBILITIES Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste Qualifications 12+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with ATE tester platforms (eg. Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as Spotfire, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment EDUCATION: BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Full PE product lifecycle ownership from concept to end of life with a focus on ensuring the delivery of the highest quality products to our end customers Definition of ATE test, qualification and manufacturing plans Product release into manufacturing with adherence to stringent tier 1-customer requirements Datasheet and automotive compliance reports Real time customer support for design, product and quality related issues Temperature/Voltage/Process characterization and production limit setting Product new product introduction and yield ownership Product BOM release and maintenance Excursion management for both suppliers and customers Use commercially available yield tools for yield improvement and monitoring, generate weekly reports and review with PE teams KPI achievement in product related deliverables including NPI execution and velocity, product cost (Gross margin improvements), product quality performance and failure analysis cycle times PAT, SYL, SBL, SPC limit and disposition optimizations to protect quality without excessive waste REQUIREMENTS: 7+ years experience in product engineering. A strong analog circuit background is a must. Familiarity with power management IC testing would be a plus Familiarity with ATE tester platforms (eg. Teradyne J750, Advantest 93K) Knowledge of analog and mix-signal circuitry and the common building blocks, device physics, test methodology and DFT knowledge Experience with common lab test equipment (DC power supply, oscilloscope, multi-meters etc). Bench characterization experience is a plus Familiarity with JEDEC/AEC qualification standards and stress test conditions. Experience with qual hardware/software development would be preferred Experience in yield management tools such as PDF Exensio, JMP. Apply statistical analysis to isolate the issue and make data-driven decisions Ability to managing supplier excursions and customer escalations through problem solving Knowledge of Semiconductor Failure Analysis is preferable Strong verbal and written communication skills A good team player. Effective in fast paced, dynamic work environment Qualifications BS in Electrical/Electronic Engineering MS in Electrical/Electronic Engineering is preferred Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Manage multiple new products through their full product lifecycle, Product Compliance to Sustainment of production released parts Generate Characterization, Qualification, Bench-to-ATE Correlation and Test Limit plans for new products based on REA guidelines and JEDEC standards Drive measurements/data collection and statistical analysis for Characterization, Qualification, Correlation, Production Test Limit setting, and any other specialized testing for datasheet parameters Cost reduction via yield improvement and test time reduction from safe launch study at both NPI and MP stage. Excursion management (Low yield and RMAs) and MRB lot disposition. Work with DE/TE team to design and implement production test solutions. Continually look for opportunities to improve the NPI process. Focus areas include streamlining Test, Qualification and Characterization plans and strategies, reducing documentation overhead, and leveraging NPI efficiencies such as Qualification by Similarity (QBS) Be a mentor to junior Product Engineering team members to accelerate their technical and career growth Contribute technical expertise to business critical projects as required to advance MID (Memory Interface Division) business objectives Qualifications Preferred with 10+ years experience from Product Engineer, Quality Engineer, Test Engineer, Validation Engineer and FA Engineer in fabless. Deep knowledge of Digital / Analog Product Characterization Technique. Hands-on experience to work on Characterization Plan, PVT test, Report. Strong statistical data analysis background for NPI/MP products. Hands-on experience from PDF (TIBCO Spotfire, Exensio), JMP, Galaxy Examinator, VB, etc. Strong working knowledge of Product / Package Qualification Process. Hands-on experience from HTOL / ESD / LU / HTS / TC / ELFR / UHAST / Endurance / Retention, etc. Experienced in ATE testing on V93K (PS1600 /PS9G/PSSL) ATE testers in CP/FT test. Hands-on experience from ATE test debug analysis with Test program , STDF, datalog, etc. Experienced in Bench testing of Electrical Characteristics, Tx/Rx Jitter, Eye Diagram for Memory Interface Products (RCD, DB, TS, SPD, etc) Familiar with Digital / Analog Product DFT / DFM method. JEDECT Spec and Product Datasheet. Deep knowledge of CMOS Process in HKMG / FINFET process. Ability to manage complex projects in parallel and on schedule . Preferred with Project Management experience. Solid organizational skills with attention to detail for risk management Good communication / reporting skills Self-motivated to work independently and in a team environment with project teams from different regions / timezones High energy, driven-to-succeed personality in fast pace environment Experience working with databases and creating regular reports Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

[ Location: NOIDA] Exp: 06-15Y We are seeking a highly skilled experienced PDN PV expert to join our Flows Methodologies Team. This role requires strong analytical skills, attention to detail, and the ability to work collaboratively with cross-functional teams. Proficiency in relevant EDA tools and a solid understanding of digital design principles are essential for success in these positions Scope of Responsibilities: As part of the Design Enablement team of the organization, you need to work closely with SoC cross functional teams to develop and define PDN PV flow methodology to meet SoC IP level objectives on low geometry nodes (3/5/16nm) Your scope of work will cover tools and flows definition, requirement management for SoC designs You will work with EDA Vendors to proactively review latest tools and flows offerings in PDN PV domains. Evaluate latest offerings and benchmark with organization used tools, flows, and methodologies. You will be an actor of change for deploying new tools methodologies across the organization Qualifications Bachelor or Master or Ph. D. in Electronics Engineering and specialization in VLSI domain 6-10, 10-15 years of hands-on experience in PDN (IR Drop EM analysis) PV (Physical Verification) domains Experience on PDN PV Signoff on lower tech-nodes Ability to debug PV issues (LVS, DRC, ERC, ANTENNA, ESDLUP etc) IR-EM-Power issues independently Ability to drive PDN PV methodology automation Strong scripting skills for Automation and Flow development using PERL/TCL/Python. Can - do attitude, openness to new environment, people and culture Strong communication skills (written and verbal), problem solving, attention to detail, commitment to task, and quality focus Ability to work independently and as part of a team Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Analog Field Applications engineer to work with an array of customers across end equipment ranging from Industrial, Video, Communications, Lighting, Medical and Industrial segments and work with them solving complex problems on a daily basis. FAE role is expected to have the perfect blend of engineering knowledge coupled with the ability to successfully influence people for their business objectives. 6-10 Years of experience in technical engineering field. Should have basic Hardware design skills especially on Power Analog Product designs. Working as a Field Application Engineer, Analog Product knowledge is an added advantage - should be able to meet customers and address to resolve the technical issues. Design Engineers is good, should have willing to travel to customer places. Solve customer technical challenges from system prospective. Build up customer relationship and maximize Renesas product contents in customer s applications. Work together with sales force and product line in driving revenue growth. Execute the business targets from time to time. Identify product gap in the marketplace and provide new product opportunity to business unit. Qualifications Qualifications / Specific Knowledge / Skills: BE in Electrical/ Electronics Engineering /Computer Science/Computer Engineering or MSc in Electrical/Computer Science/Computer Engineering from a reputed University is good to have. Minimum of 3 years work experience in semiconductor technical sales or field applications engineering. Familiarity with timing, Video, Sensor Products topologies is added advantage. Knowledge of PCB design for noise protection. Strong problem-solving skills, self-motivated, and self-driven. Willing to learn new processes and tools. Willingness to travel to customer locations to promote demand creation essential. Must have passport and ability to travel internationally to receive technical training from our international business units. Must have own transportation to facilitate local conveyance. Ability to maintain technical expertise/competence with the ever-changing technology. Strong oral and written communication skills. Well organized and good at time management. Enthusiastic, creative with a desire to learn about business and technical topics. Ability to multi-task and work in a fast-paced environment. Team player, and willing to help where needed within scope of the role. Attractive compensation package offered. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

: We are looking for a highly skilled and experienced Physical Design Lead to join our VLSI team. The ideal candidate will have a strong background in physical design and a deep understanding of the VLSI design flow. This role involves leading a team of engineers and working closely with cross-functional teams to ensure the successful implementation and optimization of physical designs. Key Responsibilities: Lead the physical design team in the implementation of complex digital designs, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Collaborate with RTL design, verification, and DFT teams to ensure design quality and robustness. Develop and implement physical design methodologies and best practices to improve design efficiency and quality. Perform static timing analysis, power analysis, and signal integrity analysis to ensure design performance and reliability. Interface with foundry and EDA tool vendors to resolve design issues and improve design flow. Mentor and coach junior engineers, providing technical guidance and support. Participate in design reviews and provide feedback to improve design quality and efficiency. Qualifications Qualifications: Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field. Ability to understand design specifications, can contribute to design planning, partitioning, and setup a feasible seed for convergence PD cycle. Extensive experience in physical design, including floorplanning, placement, clock tree synthesis, routing, and timing closure. Good understanding of EDA tools such as Fusion Compiler, Innovus, Primetime, Tempus, VCLP, LEC, Calibre, Red Hawk. Strong understanding of static timing analysis, power analysis, and signal integrity analysis. Excellent problem-solving skills and attention to detail. Ability to work effectively in a team environment and communicate clearly with cross-functional teams. Experience in mentoring and coaching junior engineers is a plus. Company Description About Renesas: Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

This position requires an experienced technical lead familiar with validation processes through multiple product iterations and ideally, prior management experience. In particular, experience with DDR5 buffer chip products for high-speed analog characterization and knowledge of memory interfaces for server and enterprise applications is preferred. This candidate will need to be comfortable with dual roles of serving as a bench characterization lead and manage a small team of supporting engineers locally. Essential Duties and Responsibilities: Component Bench Characterization: Leverage best known test procedures including de-embedding, high-impedance probing, and noise compensation to resolve complex measurement challenges as data rates continue to scale. Support Design/Validation teams to characterize key parameters of high-speed memory devices. Work collaboratively with Designers to debug and optimize performance with open-ended tests that are not only driven by specifications. Validation Infrastructure Development: Develop new test infrastructure to support effective characterization and validation of high-speed memory interfaces. Maintain relationships with contacts for key equipment vendors and participate and lead in pathfinding/roadmap initiatives. Identify cycle time and cost improvements, including automations, to improve validation efficiency. Data Analysis and Reporting: Ability to synthesize results and identify next set of relevant experiments to understand issue. Generate consistent, well-written, and easily understandable reports in different formats as relevant to the audience. Develop and prove creative uses of LLM/AI techniques to analyze large validation data sets and generate effective visualizations and improve cycle time to final reports. Technical Communication: Effectively document test methodology and procedures to ensure reproducible and accurate results. Explain complex topics in appropriate level of detail to each relevant stakeholder. Work effectively with fellow Validation Engineers in diverse regions across language and technical knowledge differences. Team Management: Demonstrate ability to support/assist/mentor direct reports while also nurturing a culture of accountability and independence. Support development of direct reports to grow capabilities and advance in their career trajectory. Qualifications Required Qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, or a related field. 10+ years of hands-on experience in characterizing high-speed interfaces, particularly memory-related applications. Strong understanding of memory interface architecture and operation, preferably DDR5. In-depth knowledge of memory interface protocols and standards (e. g. , JEDEC specifications). Expertise in using typical high speed interface test equipment (BERT, Scope, Compliance S/W). Proficiency in scripting languages (e. g. , Python, Perl) for test automation and analysis. Excellent analytical and problem-solving skills. Strong communication and interpersonal skills. Preferred Qualifications: Masters degree in Electrical Engineering or a related field. Experience with advanced signal integrity measurements and applications for Design correlation. Experience with modern software tools for data visualization, analysis, and reporting; in particular dynamic interactive tools - including LLMs Company Description Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what s next in electronics.

Technical Manager role requiring 15+ years of experience of Digital design in Analog Mixed signal ICs for developing Power Management ICs as part of 2. 6B$ Power Business Unit at Renesas. Primary responsibilities include leading team which will fully own defining the microarchitecture to developing all Digital components of power management ICs, starting from System requirements. Due to the complex nature of Chips and significant Analog as well as Digital contents, collaboration with cross-functional teams to ensure successful integration of Digital and Analog components in ICs, is a must. The candidate will work on a wide range of exciting and cutting edge PMICs, including Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Manage the Digital Design team in terms of costs, methods and staffing to support device/silicon design requirements and to meet design deadlines as set by the program schedule. Mentor direct reports, giving appropriate guidance and support, and reviewing technical and behavioural performance regularly Must have experience of defining Dig-Ana boundary and Digital design scope for Power Management ICs/Analog intensive ICs Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc. Must be aware of Power Sensitive digital design and doing Power estimation for the Digital I/Ps Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions, DFT architecture and integration. Should be able to create Sequences (including Power UP/Down) and State Machines and Transitions to/from any state to another based on the IC requirements. Should be an expert of one or more Power Chip Communication I/Ps and protocols e. g. I2C, PMBUS, SVI3, SVID etc. Should be able to implement and analyse filters feedback loops in Digital, conversant with Z-domain analysis. Must have done multiple silicon debugs, root cause analysis of issues, design to silicon correlation etc. Should understand commonly used control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and pros/limitations of each. Must be able to bring in innovative ideas to improve designs to meet challenging specifications and achieve better system performance. Should be able to setup Digital design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Qualifications Bachelor s or master s degree in electrical engineering 15+ years in Digital Design and experience of working on Mixed Signal ICs, especially PMICs. Solid understanding and design experience of complex AMS designs. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a technical leader, people manager team player, mentor and should strive towards fostering a highly creative and productive working environment Collaboration with Senior leadership to develop team objectives in accordance with wider company strategy. Ability to work with Senior Management to develop and work to budget. Cross cultural awareness and sensitivity. Results-oriented and able to deliver on-time under tight schedule pressure. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Looking for a 10+ years experienced Engineer with in-depth understanding of Analog concepts, experience of from scratch design of complex Analog I/Ps sub-blocks, integrating I/Ps and sub systems and ownership, experienced of fully owning smaller ICs (Point of loads, Single Converters) and owning major I/Ps in large PMICs, to join the 2. 6B$ Power Business Unit. The candidate will get to work on a wide range of exciting products such as PMICs, Linear and Switching DC-DC converters powering the next generation of most sought-after phones and handheld devices. This is an early-stage growth opportunity where in the candidate will get to learn, build and over time contribute and influence the charter for Renesas s massive Power product portfolio. Essential Functions: Must be proficient in designing and owning complex I/Ps like +ve/-ve Charge Pumps, Source-Sink LDOs, Ultra-low power Oscillators (including Relaxation type), Temperature Sensor, Current Sense, SAR ADCs, House Keeping blocks, Protection (Thermal, Under-Voltage, Over-Voltage, Over Current etc) and analog blocks including Bandgap references, V2I, Analog Buffers, Op-Amps, Comparators, High speed level shifters etc. Thorough understanding of Switch Cap circuits will be advantageous. Must have in-depth Understanding of and should be able to Implement Compensate the Control Loops, Analog feedback loops and should know trade-offs between various compensation strategies. Should be able to build/support Block level spec break down from Top level chip requirements and independently own, design complete switching converter e. g. Buck, Boost, Buck-Boost etc and LDOs. Must be able to do block level error budgeting depending on the block requirements. Must be aware of relative differences of various control loop architectures (Constant Freq, Constant ON/OFF Time, Current mode etc) and decide/implement the best option to meet converter level performance specifications and other system requirements. Must be able to bring in innovative ideas to improve designs to meet challenging specifications. Should have in-depth knowledge of Analog layouts and be able to work closely with layout lead from floor planning till Chip Top completion and verification and do trade-offs based on desired performance Must be conversant with the standard design, extraction and simulation flows tools, speed, convergence, accuracy trade-offs and should be able to optimize setups based on Pre/Post (with/without) Parasitic using simulator options, debug and navigate through tool related challenges. Should be able to setup design flows and methodologies including checklists, reviews to ensure quality designs and take them all the way to Silicon success. Should be able to mentor Freshers and Junior engineers for upscaling their technical skills as well as other skills needed for better efficacy. Should have experience of end-to-end IC development flow, Silicon debugs, and taking ICs to production Should be able to lead a small group of Engineers and navigate through all stages of IC development while handling and mitigating challenges, ensuring high quality silicon while adhering to the schedules based on business needs. Should have in-depth understanding of ESD, LU and other IC level issues and be able to define protection for the I/O ring for the IC Qualifications Bachelor s or master s degree in electrical engineering 10+ years in Analog Circuit Design, Simulation and Verification Solid understanding and design experience of complex analog designs with full ownership. Chip design, Verification, Silicon validation, debugs, Qual support and taking ICs to production. Must be a natural team player, mentor and strive towards fostering a highly creative and productive working environment Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.

Collaborate with system architects and micro-architects to define high-level, implementable SoC specifications. Own end-to-end SOC RTL delivery while analysing and optimizing design for power, performance, and area (PPA) targets. Influence SoC definition, features, and adopt physical design friendly partitioning. Lead RTL design and integration of multi-subsystem SoCs , supporting complex architectures with multi-core, multi-power, and multi-reset domains . Demonstrate strong proficiency with front-end flows , including Lint, CDC, low-power (UPF) checks, synthesis, DFT , and Static Timing Analysis (STA) . Drive the development of robust Safety, Security, and Debug architectures for advanced SoCs with multiple interconnects. Design and integrate standard interface protocols such as AHB, AXI, CHI , and memory interfaces including ROM, RAM, Flash, LPDDR/DDR3/4 . Engage cross-functionally with DFT, physical design, verification, emulation, and validation teams to ensure first-time-right silicon and on-time project delivery. Support post-silicon debug, bring-up, and validation , working closely with lab and silicon validation teams. Continuously evaluate and adopt new design methodologies and best practices to improve productivity and shift-left the design cycle. Mentor junior engineers, review their work, and provide technical leadership and guidance across multiple design projects. Provide overall leadership and tracking of the team s goals. Contribute to the innovation quotient of the team via Desing Patents, Industry Standard Publications, AI-enabled design methodologies etc. Qualifications M. Tech/ B. Tech in Electrical Engineering or Computer Science with 12+ years of RTL design experience. Proven expertise in Verilog/SystemVerilog RTL design, integration, and microarchitecture. Strong understanding of SoC architecture, AMBA protocols (AXI, AHB, APB), clock/power domains, and memory subsystems. Experience with EDA tools for synthesis, lint, CDC, RDC, and timing analysis. Familiarity with UPF/low-power design, formal verification techniques, and static/dynamic checks. Excellent leadership, communication, and project management skills. Experience working with global cross-functional teams. Company Description Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you. Renesas employs roughly 21, 000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what s next in electronics and the world.