Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our powerful, award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. Diversity, equity & inclusion are integral parts of our culture and drivers of innovation at Keysight. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. The Keysight Finance and Business Intelligence Initiatives and Solutions Team (FBIS) is chartered to provide finance system solution design and development expertise, consulting, and project management in support of the numerous Finance and Business enterprise initiatives. FBIS is a very global and diverse team involved in critical project work that impacts the achievement of Keysight goals. FBIS is primarily engaged in Plan of Record (POR) process management, solution benchmarking/ROI & recommendations; and overall project management comprising business requirements analysis, functional solution design, product development, testing and deployment. The candidate should have work experience and expertise in financial modules of Oracle EBS; especially in the areas of General Ledger and/ or Accounts Receivable, Implementation & Configuration and it s integration with Boundary applications. The candidate should also have experience in Business process re-engineering, mapping business processes with financial accounting flows and enabling custom solutions as needed from time to time. Overall, the person should have very good grounding in GL/AR processes and be able to work with applications like OneStream/BI/Trintech and other external integrated Business applications. This role will also be involved on managing Finance integration activities for Mergers, Acquisitions & Divestitures (MA&D) executed by Keysight in support of the company s growth initiatives. Responsibilities Analyze, solution, design, development, and deployment of ERP, EPM and BI solutions including related business processes and prereferral applications. Develop & execute the financial systems deployment plan which includes enabling ERP setups, boundary applications & reporting systems to achieve a given project objective Provide ERP and process expertise and consultancy to Operations to achieve next level process optimization. Ensure effective management of change associated with ERP financial process changes - including enhancements, fixes, and documentation. Enable cross functional coordination to align Finance plan & activities with cross functional tracks Ensure integration of solutions throughout the key business flow with an end-to-end solution The Finance SME will be responsible to partner closely with various Finance Operations, Information Technology and Business functions throughout the project lifecycle. Measures of Success Increase customer satisfaction: Effective, efficient Customer consulting by identifying and recommending the innovation/improvement ideas for solutions Increase speed to opportunity: Build/increase FBIS capability, capacity & flexibility, Contribution to FBIS University and Progress per plan on individual development plan Leverage the operating model: Zero compliance issues for process and application design, signoff by sox lead and zero audit issues Accelerate growth: Complete your assigned projects on time, in scope and within resource plan, utilizing project management toolkit. Qualifications Careers Privacy Statement ***Keysight is an Equal Opportunity Employer.**Educational Qualifications: A Bachelors/ master s degree or equivalent University degree preferably in Accounting or Finance. Certified Accountant (CA/ICWA/CPA//CFA or equivalent) / MBA-Fin (from reputed collage) is preferable. Work Experience: 4-6 years post qualification experience in ERP financial modules, primarily in Oracle ERP especially in the areas of General Ledger and understanding of linkages of ERP with EPM packages and BI reporting tools. Communication: Excellent oral and written communication skills with ability to communicate effectively across different levels & geographies Strong Solution Engineering Skills with demonstrated ability in analyzing complex business problems, identifying and implementing solutions that fit into the overall finance system architecture Ability to work in a collaborative decision-making model with stakeholders across the company. Independent, results oriented, with a hands-on attitude Ability to think strategically and tactically Proficiency in using standard desktop computer applications Analyze, solution, design, development, and deployment of ERP, EPM and BI solutions including related business processes and prereferral applications. Develop & execute the financial systems deployment plan which includes enabling ERP setups, boundary applications & reporting systems to achieve a given project objective Provide ERP and process expertise and consultancy to Operations to achieve next level process optimization. Ensure effective management of change associated with ERP financial process changes - including enhancements, fixes, and documentation. Enable cross functional coordination to align Finance plan & activities with cross functional tracks Ensure integration of solutions throughout the key business flow with an end-to-end solution The Finance SME will be responsible to partner closely with various Finance Operations, Information Technology and Business functions throughout the project lifecycle. Measures of Success Increase customer satisfaction: Effective, efficient Customer consulting by identifying and recommending the innovation/improvement ideas for solutions Increase speed to opportunity: Build/increase FBIS capability, capacity & flexibility, Contribution to FBIS University and Progress per plan on individual development plan Leverage the operating model: Zero compliance issues for process and application design, signoff by sox lead and zero audit issues Accelerate growth: Complete your assigned projects on time, in scope and within resource plan, utilizing project management toolkit.

"> Search Jobs Find Jobs For Where Search Jobs ASIC DFT, Engineer Hyderabad, Telangana, India Engineering Employee Apply Save Job Share Email LinkedIn X Facebook Jump to Overview Job Description Benefits Culture How We Hire Overview Our Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. Play Video Job Description Category Engineering Hire Type Employee Job ID 5945 Remote Eligible No Date Posted 04/11/2024 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a driven and detail-oriented individual with a passion for cutting-edge technology and continuous learning. With 0-1 years of related experience, you possess a sufficient understanding of DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. You have moderate experience in generating scan patterns and coverage statistics for various fault models like stuck-at, IDDQ, transition faults, and path delay. Your experience in scan stuck-at and at-speed coverage exploration, simulation, and debug is commendable. Familiarity with state-of-the-art EDA tools for DFT, design, and verification is a plus. Additionally, you have some knowledge of STA for DFT mode timing constraint development and exploration. Your debugging skills and demonstrated experiences in Perl/TCL/Python scripting are an advantage. You are an excellent communicator and can effectively work with cross-functional teams across geographies. Design experience in MBIST, LBIST, and Analog DFT is an added advantage. You value inclusion and diversity and are committed to contributing to a collaborative and innovative work environment. What You ll Be Doing: Implementing DFT architectures and methodologies, including Scan insertion, ATPG, JTAG, and SIMS. Generating scan patterns and coverage statistics for various fault models. Exploring, simulating, and debugging scan stuck-at and at-speed coverage. Utilizing state-of-the-art EDA tools for DFT, design, and verification. Developing and exploring STA for DFT mode timing constraints. Collaborating with cross-functional teams across geographies to achieve project goals. The Impact You Will Have: Enhancing the reliability and quality of our high-performance silicon chips through robust DFT methodologies. Contributing to the efficiency of our chip design and verification processes. Supporting the continuous innovation of our technology and products. Ensuring seamless integration of DFT in our chip design workflows. Improving fault detection and coverage, thereby reducing time-to-market for our products. Fostering a collaborative and inclusive work environment that drives technological advancements. What You ll Need: 0-3 years of related experience in DFT architectures and methodologies. Moderate experience in generating scan patterns and coverage statistics for various fault models. Experience in scan stuck-at and at-speed coverage exploration, simulation, and debug. Familiarity with state-of-the-art EDA tools for DFT, design, and verification. Basic knowledge of STA for DFT mode timing constraint development and exploration. Who You Are: Excellent communicator with the ability to work effectively with cross-functional teams. Detail-oriented and driven by a passion for technology and continuous learning. Strong debugging skills and experience in scripting languages like Perl, TCL, and Python. Committed to fostering an inclusive and diverse work environment. Adaptable and eager to take on new challenges and responsibilities. The Team You ll Be A Part Of: You will join a dynamic and innovative team focused on developing and implementing cutting-edge DFT methodologies to enhance the reliability and performance of our silicon chips. The team collaborates closely with cross-functional groups across geographies to drive technological advancements and achieve project goals. Together, we are committed to continuous learning, innovation, and fostering an inclusive work environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability. Apply Save Job test Share Email LinkedIn X Facebook Benefits At Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. Were proud to provide the comprehensive benefits and rewards that our team truly deserves. Visit Benefits Page Health & Wellness Comprehensive medical and healthcare plans that work for you and your family. Time Away In addition to company holidays, we have ETO and FTO Programs. Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more. ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back. Retirement Plans Save for your future with our retirement plans that vary by region and country. Compensation Competitive salaries. *Benefits vary by country and region - check with your recruiter to confirm Get an idea of what your daily routine around the office can be like Explore Hyderabad View Map Hiring Journey at Synopsys Apply When you apply to join us, your resume, skills, and experience are first reviewed for consideration. Phone Screen Once your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have. Interview Next up is interviewing (in person or virtual). You ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you re looking for in your next role. Offer Congratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept! Onboarding There will be some steps you need to take before you start to ensure a smooth first day, including new hire documentation. Welcome! Once you ve joined, your manager, team, and a peer buddy will help you get acclimated. Over the next few weeks, you ll be invited to join activities and training to help you ramp up for a successful future at Synopsys!

About You: You are a talented and dedicated Senior Layout Design Engineer specializing in analog and mixed-signal (A&MS) integrated circuits. You excel in collaborative environments, working seamlessly with cross-functional teams to drive technological innovation. Your meticulous attention to detail and unwavering commitment to quality are hallmarks of your work. You are constantly striving to enhance layout design methodologies and best practices, utilizing your profound knowledge of semiconductor process technologies and industry-standard EDA tools. Your exceptional problem-solving abilities, effective communication, and strong teamwork make you an indispensable asset. What You ll Be Doing: Develop and implement layout designs for A&MS integrated circuits. Optimize layouts using industry-standard EDA tools. Perform physical verification and design rule checks. Participate in Layout reviews and provide feedback. Collaborate with circuit designers on specifications and constraints. Enhance layout design methodologies and best practices. Stay updated with industry trends in A&MS layout design. The Impact You Will Have: Ensure high quality and performance of A&MS integrated circuits. Drive innovation with cutting-edge layout designs. Improve manufacturability and reliability through meticulous design. Contribute valuable feedback during design reviews. Foster continuous improvement in design methodologies. Mentor junior engineers by sharing your expertise.