Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Responsibilities The position lies in Invoice Processing team in Accounts Payable. The person should possess sound knowledge of overall P2P flow with good understanding of Accounts Payable process. The key responsibilities and expectations from this role involve: Working closely with vendors and business requestors for gathering the information as per the local tax and banking requirements before performing the vendor set up in Oracle. Providing active support on various internal & external audits and projects. Trouble shooting employee & vendor queries. Should have the ability to perform root cause analysis and apply permanent fix. Should have good accounting and analytical skills. Exposure to Oracle R-12 or any other ERP. Knowledge of AP module preferred. Should possess effective communication skills - verbal and written. Should be a team player, flexible and responsible. Qualifications MBA with 2-4 years of AP experience of experience from good reputed MNC Careers Privacy StatementKeysight is an Equal Opportunity Employer. The position lies in Invoice Processing team in Accounts Payable. The person should possess sound knowledge of overall P2P flow with good understanding of Accounts Payable process. The key responsibilities and expectations from this role involve: Working closely with vendors and business requestors for gathering the information as per the local tax and banking requirements before performing the vendor set up in Oracle. Providing active support on various internal & external audits and projects. Trouble shooting employee & vendor queries. Should have the ability to perform root cause analysis and apply permanent fix. Should have good accounting and analytical skills. Exposure to Oracle R-12 or any other ERP. Knowledge of AP module preferred. Should possess effective communication skills - verbal and written. Should be a team player, flexible and responsible.

Overview Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do. Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers. Responsibilities The position in Accounts Payable. The person should possess sound knowledge of Accounts Payable process in addition to meeting following key requirements: > Should have good accounting and analytical skills. > Should have worked on Oracle R-12 or any other ERP. Knowledge of AP module preferred. > Should be able to support various audits and projects. > Should be able to trouble shoot employee & vendor queries. Should have the ability to perform root cause analysis and apply permanent fix. > Must be able to provide strong support to the team. > Should possess effective communication skills - verbal and written. Qualifications MBA with 6-7 years of AP experience of experience from good reputed MNC. Careers Privacy StatementKeysight is an Equal Opportunity Employer. The position in Accounts Payable. The person should possess sound knowledge of Accounts Payable process in addition to meeting following key requirements: > Should have good accounting and analytical skills. > Should have worked on Oracle R-12 or any other ERP. Knowledge of AP module preferred. > Should be able to support various audits and projects. > Should be able to trouble shoot employee & vendor queries. Should have the ability to perform root cause analysis and apply permanent fix. > Must be able to provide strong support to the team. > Should possess effective communication skills - verbal and written.

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . Principal Technical Program Manager Analog Devices Software Engineering Solutions group is seeking an experienced senior-level Program Manager to oversee development of cutting-edge software product solutions for next generation SoC products . The successful candidate will be responsible for leading programs through the product lifecycle, taking responsibility for planning, execution, and driving PM processes. Job requirement: BS or MS degree in EE or Comp Sci. Typically requires minimum of 10 years related and progressive experience with program management in the software field. Management of large-scale projects with global teams Strong technical background; you have been a developer earlier in your career. Ability to manage all aspects of programs including technical, financial, legal and customer interactions. Ability to effectively use program management tools to plan, drive and report on projects. Demonstrated leadership, decision-making, teamwork, interpersonal and communication skills are essential coupled with an excellent execution track record working in large multi-discipline development teams spanning multiple time zones. Strong analytical skills. Ability to solve complex problems through design of appropriate experiments and analysis of complex data. Strong embedded software knowledge and an understanding of the hardware development process. Experienced with the tasks related to the New Product Introduction (NPI) process as it relates to combined HW/SW programs. Works with the developers directly to plan, status, track progress, and deduce schedule impacts. Excellent organizational skills and the ability to drive aggressive schedules. A natural leader and facilitator. Proficient with Microsoft Office Software and tools. Proficient with Atlassian products (Confluence, Jira). Positive attitude and proactive / self-motivated / willing to accept responsibility. Certified Scrum Master preferred. PMI PMP preferred. Some travel required. Job responsibilities: Own and drive large-scale software programs to meet ADI business objectives. Manage projects to meet defined scope, schedule, budget and quality requirements. Drive risk management and defect tracking to solve problems before they arise. Lead software requirements and change management to meet customer expectations. Manage resource requirements and allocations. Ensure that program management KPIs are met through project metrics. Lead project core teams and provide clear and concise reports for management. Drive standardized PLC processes throughout the company. Implement continuous improvement and continuous learning mentality with teams. Drive retrospectives and lessons learned activities. The ideal candidate is results-driven and self-motivated with experience in software program management, a track record of execution excellence, and the ability to communicate and work effectively with business and technical teammates at all levels of the organization. You are someone who started off as an engineer/developer and migrated to project/program management over your career. You are typically the most structured and organized individual in your organization. You know how to get the right things done on time in an organization.

Diploma OR Engineering Freshers (Female only) Looking to work in a Japanese MNC to handle office administration at Mahabalipuram, Chennai. Inventory management and coordinate procurement activities. Good communication skill is mandatory Required Candidate profile Any diploma or engineering fresh graduates & certification in office administration is pref. Only Female candidates Willing to work at Mahabalipuram, Chennai Pick up & drop arranged by the company

About Marvell . Your Team, Your Impact Marvells data center engineering group is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid state drive (SSD) electronics markets and accelerator solutions. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect Design and execute post silicon validation tests for SSD Chipsets, during R&D processes. Develop, port and execute bare metal SW to validate Storage SoCs. Job will involve Pre and Post Si testing of the bare metal functionality of the Storage SoC, including performance, and power. The candidate will also review and prepare test plans and test results documentation. Develop testing and benchmarking applications. Analyze the test results and generate professional validation reports. Provide technical support to Field Application Engineers who support customers. Provide technical support to Test Engineers who design tests for mass production. What Were Looking For We are looking for hardware validation/applications engineer with experience in Solid States Drive. Proficient in C/C++ , Arm Assembly , 64 bit Arm CPU architecture. Experience in Firmware Development under Bare Metal/Linux Environment and Debugging on SoCs for embedded Applications Understanding of SSD controller is preferred Experience in interfaces like NAND/PCIe/NVMe/DDR is a plus Good communication skills in English, written and spoken. Candidate should be flexible, proactive and have the ability to work in a team Should be able to work on a given task independently Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

About Marvell . Your Team, Your Impact Marvells data center engineering group is a leading provider of innovative storage technologies, including ultra fast read channels, high performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems. What You Can Expect Development, porting, execution, and debug of bare metal SW on multiple SSD blocks to validate proper functionality. Create, maintain and improve code to support new features and standards. Work with Design, FW, and Validation teams to debug any issues found and find root cause on failure cases. Create and review tests plans and prepare test result documents to be shared internally/externally. Create tests to measure performance, throughput, and power of multiple SoC blocks. What Were Looking For Bachelors degree in Software, Computer or Electrical Engineering, and at least 3-5 years professional experience and/or Masters degree in Software, Computer or Electrical Engineering, and at least 2-3 years professional experience, in following domains - Pre-Si Validation, Post-Si Validation, Stress & PVT testing. Excellent C/C++ SW development skills, a good understanding of embedded SW development, Linux and basic knowledge of ARM/RISC micro-processor or SOC architecture. Working knowledge of DDR, SPI, PCIe, NVMe, is a plus. Experience with embedded SW development and proven debug abilities and skills. Familiar with typical lab tools: Emulators, Oscilloscopes, Logic Analyzers. Able to work across disciplines and manage time across several demands. Excellent written and oral communication skills (English). Additional Compensation and Benefit Elements With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. #LI-CP1

An experienced and passionate Applications Engineer, ready to join our dynamic team. You thrive in fast-paced environments and are driven by the opportunity to work with high-end customers in the Mobile Industry Processor Interface (MIPI ) domain. With your strong technical background in ASIC design, you are adept at providing top-tier technical support and guidance. Your excellent communication skills enable you to effectively interact with customers and internal teams alike. You are not just looking for a job, but a place where you can make a significant impact and grow your career. What You ll Be Doing: Providing technical support to field engineers and customers utilizing Synopsys MIPI UFS Intellectual Property (IP) Partnering with high-tech customers through the full cycle of ASIC design, from installation and training to RTL design and production testing Conducting reviews on customers major SoC design milestones Authoring application notes and white papers to promote the IPs ease of use and address specific challenges Providing feedback to internal teams for continuous product improvements based on customer feedback Ensuring successful integration of Synopsys MIPI IP solutions into customers SoCs The Impact You Will Have: Enhancing customer satisfaction by providing expert support and ensuring seamless integration of Synopsys IP Driving innovation by collaborating with customers on cutting-edge SoC designs Contributing to the development of industry-leading IP solutions through continuous feedback and improvement processes Expanding Synopsys market presence in the MIPI domain through successful customer engagements Promoting the adoption of Synopsys IP by authoring impactful documentation and white papers Supporting the growth of Synopsys IP portfolio by identifying and addressing customer needs What You ll Need: Bachelors degree with 5+ years or Masters degree with 2+ years of relevant experience in the ASIC design process Proficiency in Verilog HDL, synthesis, simulation, and verification Knowledge of Place and Route, Design Reuse, Physical Design, or Analog Design is a plus Familiarity with MIPI UFS/UniPro protocols, high-speed SERDES, or parallel interfaces is advantageous Experience with Synopsys tool suites is a plus Strong verbal and written communication skills in English

Responsible for Analog design for MSIPs from architecture to production silicon Will set up and manage the team of Analog/Mixed Signal design experts Work out innovative design techniques to overcome challenges Team designs of bandgap, temperature sensors, Signa Delta ADCs , DAC, Voltage monitoring Ips, PLL Ensure right talent is identifies , managed , groomed and enable a stellar team performance Works together with global cross functional team for team s success Qualifications BS or MS degree in Electrical Engineering/Computer Science/Computer Engineering. 10 - 15 years of experience in the fields of Analog/Mixed Signal design for leading edge technologies Innovation mindset with system modelling, architecture and best design practices Ability to lead a large team that will cover different R&D project for AMS IP development . Strong knowledge about custom SOC flow desirable. Understanding of Analog, digital flow and post silicon test/characterization is a desirable skill High in drive and bringing positive energy leading towards a mission Strong personal value system Preferred Skills High drive and people leadership skill Demonstrated experience with Analog/Mixed Signal Design and IP/Product ownership with Analog and Digital subsystems Thorough knowledge of AMS design flow with digital top SOC integration methodology Closely work with Analog Design and layout team by reviewing and guiding for best-in-class performance People management expertise, ability to bring good people and lead them from front

Working on functional verification of high-speed serial link PHY IPs for USBx, PCIex, Ethernet, Display, and HDMI protocol standards. Studying IP/design blocks/firmware specifications and building/updating verification plans and test cases. Building/updating functional verification environments to execute test plans. Implementing checkers, assertions, random test generators, high-level transactional models, and bus functional models (BFMs) as per verification plan needs. Performing simulation, random and direct stimulus development, and coverage review. Working closely with digital designers for debugging and achieving the desired coverage. The Impact You Will Have: Ensuring the accuracy and functionality of high-speed interface IPs, contributing to the development of cutting-edge technology. Enhancing the reliability and performance of Synopsys products through meticulous verification processes. Driving innovation in the semiconductor industry by verifying complex digital designs. Collaborating with a team of skilled professionals to deliver high-quality IPs that meet industry standards. Improving the efficiency of the verification process through automation and advanced verification methodologies. Contributing to the overall success of Synopsys by ensuring the delivery of robust and reliable IPs to customers.

You are a highly experienced and motivated professional with a solid background in SoC RTL Design . With over 12 years of experience , you have honed your skills in RTL Design, Lint, CDC, RDC, Synthesis, and Constraints Development . You possess a deep understanding of design concepts, ASIC flows, and stakeholder management . Your technical expertise allows you to debug and diagnose violations and errors, set up flows and methodologies for RTL Signoff tools, and develop timing constraints . You are an effective leader, capable of managing and growing a team, providing continuous feedback, and improving the quality of deliverables . Your excellent communication skills help you interact with customers, peers, and management to understand needs, report status, and resolve issues efficiently. What You'll Be Doing: Manage and lead a team of 7-8 SoC/Subsystem RTL Design Engineers for various customer engagements. Work with Synopsys customers to understand their needs and define RTL Signoff and design scope and activities . Lead the team to perform various RTL Design and Signoff activities for SoC Subsystems such as SoC u-Architecture and Integration, RTL Design (Verilog/SystemVerilog), Lint, CDC, RDC, Synthesis, Constraints Development. Assist and mentor the team in day-to-day activities and grow the capabilities of the RTL Design team for future assignments. Review various results and reports to provide continuous feedback to the team and improve the quality of deliverables. Report status to management and provide suggestions to resolve any issues that may impact execution. Understand the complexity and requirements of RTL Quality Signoff and propose resource requirements to complete the activities. Work with peers to improve methodology and improve execution efficiency. Collaborate with other Synopsys teams including BU AEs and Sales to develop, broaden, and deploy Tools. Train the team in design concepts and root-cause analysis. The Impact You Will Have: Drive the successful delivery of SoC Subsystems by leading a skilled team of RTL Design Engineers. Enhance the quality and efficiency of RTL Design and Signoff processes through continuous feedback and methodology improvements. Ensure customer satisfaction by understanding their needs and delivering high-quality solutions. Contribute to the growth and development of the RTL Design team, expanding their capabilities for future projects. Support Synopsys reputation as a leader in chip design and verification through successful project execution. Foster collaboration and innovation within the team and across different Synopsys departments. What You'll Need: B.E/B.Tech/M.E/M.Tech in electronics with a minimum of 12+ years of experience in SoC RTL Design . Technical expertise in various aspects of RTL Design and Signoff: LINT, CDC, RDC. Technical expertise on setting up flows and methodologies for quick deployment of RTL Signoff tools. Technical expertise in debugging and diagnosing violations and errors. Technical expertise in developing timing constraints and running preliminary synthesis for timing constraints check and area estimation. Ability to lead and manage a team to perform RTL Signoff on complex SoC/Subsystem. Experience with planning and managing various activities related to RTL Signoff and Design. Strong understanding of design concepts, ASIC flows, and stakeholders. Good communication skills.

An experienced and visionary ASIC Verification Engineer, Architect who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in verification methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL, UCIe etc. You can define and execute Testbench architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What You ll Be Doing: Defining and developing ASIC RTL verification at both chip and block levels. Creating and executing verification plans for complex digital designs, particularly focusing on PCIe/CXL protocols. Collaborating with cross-functional teams to ensure seamless integration and functionality of designs. Utilizing advanced verification methodologies and tools to achieve high-quality results. Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement. Communicating with internal and external stakeholders to align on project goals and deliverables. The Impact You Will Have: Enhancing the reliability and performance of Synopsys digital verification processes. Improving time-to-market for robust Synopsys Interface IP controller through efficient verification methodologies. Mentoring and nurturing a highly skilled verification team, elevating overall project quality. Influencing strategic decisions that shape the future of Synopsys capabilities. Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements. What You ll Need: Extensive experience in ASIC RTL verification. In-depth knowledge of PCIe, CXL , UCIe and similar IO protocols. Proficiency in advanced digital design verification tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 15+ years in relevant domain.

You are an experienced and highly motivated professional with a strong background in analog and mixed-signal (A&MS) layout design . You thrive in a collaborative environment and possess a keen eye for detail and design integrity. Your technical expertise in using industry-standard EDA tools , coupled with your problem-solving abilities, makes you a valuable asset to any team. You have a deep understanding of semiconductor process technologies and their impact on layout design, and you are always eager to stay updated with the latest industry trends and advancements. With exceptional communication and interpersonal skills, you work effectively in team-oriented environments and contribute positively to the collective success. What You'll Be Doing: Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits. Create and optimize layout designs using industry-standard EDA tools. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Participate in design reviews and provide feedback to improve design quality. Work closely with circuit designers to understand design specifications and constraints. Contribute to the development and enhancement of layout design methodologies and best practices. Stay updated with the latest industry trends and advancements in A&MS layout design. The Impact You Will Have: Enhance the reliability and performance of our PVT sensor IPs through meticulous layout design. Ensure manufacturability and integrity of designs, avoiding costly errors in production. Contribute to the development of cutting-edge technologies in the semiconductor industry. Support the continuous improvement of design methodologies and best practices. Facilitate the integration of our IPs into SOC subsystems, aiding in the creation of high-performance silicon chips. Drive the technological innovations that keep Synopsys at the forefront of the industry. What You'll Need: Bachelor's or master's degree in electrical engineering or a related field. 3+ years of experience in A&MS layout design for integrated circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura.

You are a passionate and meticulous Digital Verification Engineer with a keen interest in functional verification of High Speed interface IPs. With a dynamic personality and a strong eagerness to learn, you are driven to excel in Pre-silicon verification activities. Your understanding of digital design and HDL implementation sets you apart, and you thrive in environments where you can build and update verification plans and test cases . You are well-versed in scripting and automation using TCL, PERL, or Python , and possess excellent debug and diagnostic skills . Collaboration with digital designers is second nature to you, ensuring you achieve the desired coverage and performance in your projects. Your innovative mindset and commitment to excellence make you an invaluable asset to any verification team. What You'll Be Doing: Work on Functional Verification of High speed serial link PHY IPs for USBx, PCIex, Ethernet, Display & HDMI protocol standards. Study IP/design blocks/Firmware Specifications and build/update verification plans as well as the test cases. Build/update functional verification environments to execute the test plans. Implement checkers, assertions, random test generators, high level transactional models, and bus functional models (BFMs) as per the verification plan needs. Perform simulation, random and direct stimulus development, and coverage review. Work closely with digital designers for debug and achieve the desired coverage. The Impact You Will Have: Ensure the reliability and performance of High Speed interface IPs, critical to various advanced technologies. Contribute to the development of cutting-edge verification methodologies. Enhance the quality and efficiency of verification processes. Collaborate effectively with cross-functional teams to achieve project goals. Drive innovation in verification techniques, improving overall product quality. Support the creation of high-performance silicon chips that empower modern technology. What You'll Need: B.Tech/M.Tech with 3+ years of relevant experience. Understanding of functional verification flow with awareness of verification tools and methodologies such as VMM, OVM/UVM, and System Verilog. Proficiency in scripting and automation using TCL, PERL, or Python. Strong debug and diagnostic skills. Experience in building and updating verification environments and test plans.

What You'll Be Doing: Developing emulation solutions for industry-standard protocols such as AXI, AMBA, JTAG, AVB, CAN, and TSN. Engaging in software development using C/C++ and synthesizable RTL development using Verilog. Verifying emulation solutions to ensure they meet the highest standards of quality and performance. Interacting with customers during the deployment and debugging phases to provide technical support and ensure successful implementation. Collaborating with cross-functional teams to integrate emulation solutions with other Synopsys products and technologies. Continuously improving and optimizing emulation solutions to meet evolving industry needs and standards. The Impact You Will Have: Enhancing the efficiency and performance of semiconductor design processes through advanced emulation solutions. Contributing to the development of high-performance silicon chips and software content that drive technological innovation. Supporting semiconductor customers in overcoming design and verification challenges, leading to successful product launches. Improving the reliability and functionality of emulation solutions, thereby increasing customer satisfaction and trust in Synopsys products. Driving continuous improvement and innovation within the emulation solutions domain. Facilitating seamless integration of emulation solutions with other Synopsys technologies, enhancing overall product offerings. What You'll Need: Strong programming skills in C/C++ and understanding of OOPS concepts. Good understanding of digital design concepts. Knowledge of HDL languages such as System Verilog and Verilog. Experience with scripting languages like Perl or TCL is a plus. Understanding of ARM architecture is an added advantage. Knowledge of UVM and functional verification will be a plus.

Develop Multiport SRAM/Register file architectures and circuit implementation techniques. Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation. Designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures. Learn and apply skills in memory compilers having Transistor level circuit Design. Resolves a wide range of issues in creative ways Inter-team interaction customer focus Frequently networks with senior internal and external personnel in own area of expertise Experience of FinFet Technology for Memory Design Can coordinate, facilitate and monitor the daily activities of a small to large group of support resources within their section or project team While holding a leadership role is able to control to the memory development at a prominent level With minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilities Proactively addresses and communicates issues impacting productivity In this role, the Staff Engineer will be part of team contributing to Different type of Architectures of embedded SRAM, Register files and ROM. As Staff Engineer, the individual will be involved in challenging projects and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology and Finfet, SRAM design , processor design , Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule. Skills/Experience: BE/B.Tech/ME/M.Tech/MS in Electrical & Electronics Engineering from premium institute/university with minimum of 4 years of experience in VLSI Design Deep understanding of SRAM/Register File architectures and advanced custom circuit implementations. Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation. Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometre technology nodes Wmastery in scripting using Perl, python for automation Deep understanding of SRAM single port and multi-port design Fundamentals: Understanding of RC circuit of 1 st and 2 nd order. Basics of Digital design (realizationof Boolean function using Gates, Mux etc) Fundamentals of Transfer function and its analysis for stability etc. Strong CMOS fundamentals Knowledge of CMOS fabrication Good digital design knowledge

Applications Engineer position offers a wonderful opportunity to work on most challenging technical problems in verification domain and innovative technologies under Synopsys Verification Platform. Looking for an experienced and motivated professional who enjoys problem solving, open to continuous learning, passionate to work on cutting edge technologies and has excellent communication skills. It gives exposure to the breadth of HDL/HVL, methodologies, static and formal verification, dynamic simulation aspects including debug and experience in working in a diverse environment where interaction with domain experts across global locations will be involved. Key Requirements Experience: Bachelors degree in Electronics with 7+ Years or Master s degree in Electronics with 5+ Years Experience in verification technologies (Simulation, UVM, SVA, LRM understanding) Strong HDL language support (Verilog, VHDL, System Verilog) Simulation, UVM, Design Verification Digital design fundamental and RTL coding understanding Good Debugging skills. Scripting - Perl, TCL, Make, Shell Scripting. Role - VCS Simulation Technology Product Engineer Solid fundamentals in Digital design, HDLs (Verilog/VHDL) and System Verilog Exposure to Synopsys EDA tools (SpyGlass, VC SpyGlass, Verdi) would be added advantage Excellent written and oral communication skills is a must as the role requires interfacing global teams, proposing solutions Must have working knowledge on UNIX, TCL and/or any other scripting language to be effective Team player, partners with multiple stakeholders, has attention to detail and innovative mindset Motivated, doer and self-organized team worker with good social communication skills Open to travel, ability to multi-task, be detail-oriented Drive VCS/related technology customer deployment working closely with field and R&D Drive competitive engagements, requirements gathering for delivery strong product roadmap Work directly with R&D, Product Validation & Customers to suggest improvements in implementation and validation Use in-depth product understanding to provide technical expertise, diagnose, troubleshoot issues

Designing and implementing SOC solutions for various applications, ensuring high performance and reliability. Collaborating with cross-functional teams to define and develop SOC architecture and specifications. Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements. Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives. Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies. Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation. Job Description and Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG). At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, and methodology to enable our customers to complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality, and RTL Design. The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors. Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC. Understand the design/architecture and develop timing constraints for synthesis and timing. Run preliminary synthesis to ensure that the design can be synthesized as intended. Run formality to ensure equivalence of RTL and gates. Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer.

You're an experienced and highly motivated individual with a passion for technology and innovation. You have a strong technical background in RTL, Physical Design, and post-silicon test and testability development. Your expertise in debugging and developing Process, Voltage, Temperature, Current, and Droop sensors is unparalleled. You thrive in a dynamic environment and excel in communication, teamwork, and leadership. You're eager to learn and contribute to the development of state-of-the-art PVT IP sensors that are integral to the silicon lifecycle monitoring process. You possess a mindset geared towards meticulous IP debug and documentation, ensuring the highest standards of product development and performance. What You'll Be Doing: Serving as the single point of contact for post-silicon debug activities. Enabling Product Requirement Documents (PRDs). Working to enable IP as a product development platform. Handling hands-on post-silicon test setups. Collaborating on top-level physical design, board-level, and package-level designs. Developing post-silicon reports and conducting debug analysis. The Impact You Will Have: Driving the successful development and deployment of PVT IP sensors. Enhancing the reliability and performance of Synopsys silicon lifecycle monitoring solutions. Ensuring high-quality product development through meticulous testing and debugging. Contributing to continuous innovation in chip design and software security. Supporting Synopsys leadership in the market for PVT IP developments. Empowering the creation of high-performance silicon chips used in various advanced technologies. What You'll Need: Hands-on experience in post-silicon test setups. Sound knowledge of Digital/AMS chip design and post-silicon debug. BS or MS degree in Electrical Engineering with 3+ years of experience. Understanding of top-level physical design, board-level, and package-level designs. Expertise in RTL development and physical design.

Contribute to the development and enhancement of layout design methodologies and best practices. Work closely with different function design leaders to understand/enhance processes and help to enhance methodology. Collaborate with internal infrastructure teams on compute grid, storage management, and job scheduling architecture, efficiency, maintenance, and forecasting. Understanding CAD infrastructure and methodology will help to set up project environments. Contribute to enhancing quality assurance methodology by adding more quality checks/gatings. Front End development process understanding and support internal tools development and automation to help improve productivity across ASIC design cycles. Work with design engineers on new tools/technology and new features evaluation and adoption. Perform physical verification and design rule checks to ensure design integrity and manufacturability. Stay updated with the latest industry trends and advancements in A&MS layout design. Understanding of tools like VC Spyglass, Verdi, & views like SDF, Liberty, etc., and other frontend views will add value to this position. Writing RTL Code and TCL is a good addition. The Impact You Will Have: Enhance layout design methodologies and best practices, contributing to the overall quality and efficiency of the design process. Improve project forecasting capabilities by leveraging advanced monitoring and scheduling techniques. Boost productivity across ASIC design cycles through the development and automation of internal tools. Ensure design integrity and manufacturability through meticulous physical verification and design rule checks. Stay at the forefront of industry advancements, bringing the latest trends and technologies into Synopsys design practices. Collaborate effectively with cross-functional teams, driving innovation and continuous improvement in design methodologies. What You ll Need: Bachelor s or master s degree in engineering or a related field. 2 to 3+ years of experience in A&MS frontend and backend views & collaterals development flows. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as Calibre or Assura. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). Good communication and interpersonal skills.

Collaborating with R&D and Application Engineers to define and validate the latest hybrid emulation technologies. Engaging in field discussions with customers to provide expert insights and advanced debugging support. Participating in strategic bring-ups to ensure successful implementation of new technologies. Conducting product validation to ensure the highest quality and performance standards are met. Creating and maintaining comprehensive documentation for our products. Developing and delivering training sessions to enhance the knowledge and skills of internal teams and customers. The Impact You Will Have: Driving the adoption and usability of our hybrid emulation technologies among customers. Providing valuable technical insights that influence the direction of product development. Ensuring the successful deployment of new technologies through strategic bring-ups and customer support. Maintaining high standards of product quality and performance through rigorous validation processes. Enhancing the technical knowledge and capabilities of internal teams and customers through effective training. Contributing to the continuous improvement and innovation of our products. What You ll Need: Extensive experience in hybrid emulation and related technologies. Strong technical expertise in product validation, advanced debugging, and strategic bring-ups. Proficiency in creating and maintaining comprehensive product documentation. Excellent communication and presentation skills for delivering effective training sessions. Ability to work collaboratively with R&D and other Application Engineers.

Providing technical support and expertise to global customers using Synopsys Implementation products. Engaging in specific flagship projects and providing enabling solutions in all parts of the design implementation flow. Participating in technical campaigns to drive Synopsys solution adoption through hands-on involvement. Acting as a customer advocate while interfacing with the product development team to influence product roadmap and future technologies. Contributing to technical articles in the Knowledge Base to provide self-help guidance for common customer issues. Rolling out new product methodologies by providing training and technical support to customers. The Impact You Will Have: Delivering comprehensive support and effective technical solutions to enhance customer satisfaction. Driving innovation by addressing design challenges and improving product performance based on customer feedback. Collaborating with R&D teams to advance future technologies and product features. Promoting Synopsys tools to grow market presence and adoption. Ensuring seamless EDA transitions to optimize customer outcomes. Strengthening Synopsys reputation as a leader in silicon design and verification.

Managing a team of software engineers to develop and optimize test vectors for VLSI chip testing. Coordinating with multiple teams to ensure seamless integration and functionality of software solutions. Programming in C/C++ to develop high-quality software for detecting manufacturing defects in VLSI chips. Conducting rigorous testing to ensure the reliability and performance of software solutions. Learning from existing documentation and source code to integrate new ideas and improve algorithms. Engaging in continuous improvement of software quality and performance. The Impact You Will Have:Enhancing the reliability and performance of VLSI chips used in advanced technologies like AI and automated cars. Ensuring the highest quality of integrated circuits delivered to major design houses. Driving innovation in chip design and validation through optimized software solutions. Contributing to the success of Synopsys cutting-edge technology in the semiconductor industry. Improving the efficiency and effectiveness of software development processes. Fostering a collaborative and high-performing engineering team. What You will Need: Proficiency in programming, preferably in C/C++. Experience in managing and leading small teams of software engineers. Strong knowledge of data structures and algorithms. Good understanding of digital logic and VLSI concepts. In-depth understanding of timing analysis in VLSI.

Serving as the primary technical interface with customers, assisting them in evaluating, using, and applying TCAD tools. Providing technical support, troubleshooting, and resolving complex issues related to TCAD products. Managing new and existing customer relationships, ensuring high levels of customer satisfaction. Preparing and delivering technical training and presentations to customers and internal teams. Conducting beta testing, benchmarking, and onsite evaluations to support product development and customer needs. Collaborating with R&D to specify new features and drive continuous product improvement. The Impact You Will Have: Enhancing customer experience and satisfaction with Synopsys TCAD products. Driving the successful adoption and integration of TCAD tools in leading semiconductor companies. Contributing to the development and refinement of state-of-the-art TCAD tools. Strengthening Synopsys market position through exceptional technical support and customer engagement. Facilitating knowledge transfer and training to empower customers and internal teams. Playing a key role in the continuous innovation and advancement of semiconductor technology. What You ll Need: PhD in Electrical Engineering, Physics, or a related field. Strong background in semiconductor manufacturing technology and device physics. Proficiency in numerical methods and simulation tools. Excellent IT skills, particularly in Linux, Python, and TCL scripting. Minimum of three years of experience with TCAD simulation tools. Who You Are: A proactive and customer-oriented professional with excellent communication skills. Detail-oriented with strong problem-solving abilities. A collaborative team player who thrives in a dynamic environment. Adaptable and able to manage multiple priorities effectively. Passionate about technological innovation and continuous learning.

Sales Engineer with 2 to 5 years of experience in Automotive sales. Responsible for identifying new opportunities, fostering relationships with key automotive OEMs, Tier 1 suppliers. Interested May Apply or share updated profile for Detailed JD. Required Candidate profile Bachelor’s degree in Engineering (Mechanical, Electrical, Automotive, or related field) 2 to 5 years of experience in business development, sales within the automotive or electronics industries.

JOB DESCRIPTION : PROCUREMENT EXECUTIVE COMPANY DESCRIPTION Om Electronic Corporation is a leading distributor of semiconductors and electronic components, headquartered in Mumbai, India. We are dedicated to fueling technological advancement with our exceptional range of high-quality products and unparalleled service. With our deep industry knowledge and extensive network of world-class manufacturers, we provide a comprehensive selection of electronic components that are both reliable and high-performing. Rooted in Mumbai, India, and connected globally, Om Electronic Corporation blends local expertise with an expansive network to deliver the most advanced and effective technology solutions. ROLE DESCRIPTION We are seeking a detail-oriented and proactive Procurement Executive to join our growing operations team. The ideal candidate will be responsible for vendor sourcing, price negotiations, supporting the sales team with timely and competitive quotes, and maintaining strong supplier relationships. This role is vital to ensuring efficiency in our procurement cycle and enabling cost-effective and timely component sourcing. LOCATION : Mumbai EMPLOYMENT TYPE : Hybrid KEY RESPONSIBILITIES Vendor Management & Sourcing: Obtain quotes from both authorized and independent vendors for semiconductors and electronic components. Evaluate vendor capabilities, reliability, and pricing structures. Identify and onboard new suppliers to diversify the vendor base. Pricing & Sales Support: Provide accurate and timely pricing to the sales team for RFQ submissions. Track price trends and ensure cost optimization while maintaining quality standards. Review and update vendor pricing databases regularly. Negotiation & Relationship Building: Negotiate payment terms, lead times, and commercial terms with suppliers. Build long-term relationships with key vendors to ensure consistent supply and service levels. Resolve vendor-related issues and escalate critical challenges when necessary. Reporting & Coordination: Coordinate with internal teams to align procurement schedules with project timelines. Maintain procurement records, vendor information, and documentation for audits. Report directly to the Chief Operations Officer with weekly procurement summaries and insights. QUALIFICATIONS & SKILLS Education: - Bachelors degree in Electronics, Supply Chain, or Business Administration. Experience: - 2 to 5 years of experience in procurement or sourcing, preferably in the electronics or semiconductor industry.