Radiologist as Consultant with MD/DMRD Sara Medicaid

- 5 years

60 - 70 Lacs

Thane, Pune, Mumbai (All Areas)

Work from Office

MD/DNB/DMRD Radiology Consultant with the relevant Exp. (any), procedures & knowledge of CT/USG in a corporate chain of path labs in different parts of Mumbai, Pune & Thane @ best CTC subject to Exp. Shruti (HRM) T: 9819454343 E: cv@sarajobs.com Perks and benefits Family Accommodation may get subject to Location

Posted 4 months ago

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DFT Experts - Technical Lead Newsoft Consultants

7 - 12 years

35 - 80 Lacs

Pune, Bengaluru, Hyderabad

Work from Office

• Should have worked hands-on extensively on full chip DFT design, • implementation, vector generation/verification, JTAG, Boundary scan & Simulation. • Experience with Scan, Compression, ATPG & Simulations with Mentor/Synopsys/ Cadence tools. Required Candidate profile • Participated in Successful Tapeouts of SoC/ASIC chips at 14nm or below. • Develop/Automate flows & scripts in Perl/Tcl to enhance the DFT methodologies & process. • Logic BIST knowledge is a plus.

Posted 4 months ago

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STA Lead Team Computers

5.0 - 8.0 years

25 - 40 Lacs

bengaluru

Work from Office

We are seeking an experienced Full-Chip STA Engineer to drive timing closure and sign-off across the entire SoC/ASIC design. The role requires expertise in multi-block integration, multi-mode/multi-corner analysis, and sign-off methodology for advanced technology nodes. Key Responsibilities: Perform full-chip static timing analysis for all functional and test modes across multiple PVT corners. Own SDC constraint generation, validation, and refinement at top-level. Collaborate with block-level STA, physical design, synthesis, and clock teams to achieve timing closure . Debug and resolve full-chip setup/hold violations through ECOs, floorplan changes, and clock optimizations. Conduct MMMC (Multi-Mode, Multi-Corner) timing analysis, including OCV, AOCV, and POCV variations. Integrate timing reports from multiple blocks, perform hierarchical timing closure, and ensure sign-off compliance. Work with DFT teams to analyze scan shift and at-speed test timing . Automate report generation, violation tracking, and closure metrics using Tcl, Perl, or Python . Provide guidance on timing budgets for IP/block owners. Interface with foundries and EDA vendors to resolve tool and library issues.

Posted Date not available

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DFT Experts - Tech Lead NEWSOFT CONSULTANTS

7.0 - 12.0 years

35 - 80 Lacs

hyderabad/secunderabad, pune, bangalore/bengaluru

Hybrid

Posted Date not available

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